From: Matthew Brost <matthew.brost@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
"Sumit Semwal" <sumit.semwal@linaro.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"Christian König" <christian.koenig@amd.com>
Subject: Re: [Intel-gfx] [PATCH v3 10/16] drm/i915/guc: Convert golden context prep to iosys_map
Date: Fri, 18 Feb 2022 14:06:50 -0800 [thread overview]
Message-ID: <20220218220650.GA36686@jons-linux-dev-box> (raw)
In-Reply-To: <20220216174147.3073235-11-lucas.demarchi@intel.com>
On Wed, Feb 16, 2022 at 09:41:41AM -0800, Lucas De Marchi wrote:
> Use the saved ads_map to prepare the golden context. One difference from
> the init context is that this function can be called before there is a
> gem object (and thus the guc->ads_map) to calculare the size of the
> golden context that should be allocated for that object.
>
> So in this case the function needs to be prepared for not having the
> system_info with enabled engines filled out. To accomplish that an
> info_map is prepared on the side to point either to the gem object
> or the local variable on the stack. This allows making
> fill_engine_enable_masks() operate always with a iosys_map
> argument.
>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Daniel Vetter <daniel@ffwll.ch>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 52 +++++++++++++---------
> 1 file changed, 32 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> index d924486490c1..0077a63832ad 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> @@ -67,6 +67,12 @@ struct __guc_ads_blob {
> iosys_map_wr_field(&(guc_)->ads_map, 0, struct __guc_ads_blob, \
> field_, val_)
>
> +#define info_map_write(map_, field_, val_) \
> + iosys_map_wr_field(map_, 0, struct guc_gt_system_info, field_, val_)
> +
> +#define info_map_read(map_, field_) \
> + iosys_map_rd_field(map_, 0, struct guc_gt_system_info, field_)
> +
> static u32 guc_ads_regset_size(struct intel_guc *guc)
> {
> GEM_BUG_ON(!guc->ads_regset_size);
> @@ -417,24 +423,24 @@ static void guc_mmio_reg_state_init(struct intel_guc *guc,
> }
>
> static void fill_engine_enable_masks(struct intel_gt *gt,
> - struct guc_gt_system_info *info)
> + struct iosys_map *info_map)
> {
> - info->engine_enabled_masks[GUC_RENDER_CLASS] = 1;
> - info->engine_enabled_masks[GUC_BLITTER_CLASS] = 1;
> - info->engine_enabled_masks[GUC_VIDEO_CLASS] = VDBOX_MASK(gt);
> - info->engine_enabled_masks[GUC_VIDEOENHANCE_CLASS] = VEBOX_MASK(gt);
> + info_map_write(info_map, engine_enabled_masks[GUC_RENDER_CLASS], 1);
> + info_map_write(info_map, engine_enabled_masks[GUC_BLITTER_CLASS], 1);
> + info_map_write(info_map, engine_enabled_masks[GUC_VIDEO_CLASS], VDBOX_MASK(gt));
> + info_map_write(info_map, engine_enabled_masks[GUC_VIDEOENHANCE_CLASS], VEBOX_MASK(gt));
> }
>
> #define LR_HW_CONTEXT_SIZE (80 * sizeof(u32))
> #define LRC_SKIP_SIZE (LRC_PPHWSP_SZ * PAGE_SIZE + LR_HW_CONTEXT_SIZE)
> -static int guc_prep_golden_context(struct intel_guc *guc,
> - struct __guc_ads_blob *blob)
> +static int guc_prep_golden_context(struct intel_guc *guc)
> {
> struct intel_gt *gt = guc_to_gt(guc);
> u32 addr_ggtt, offset;
> u32 total_size = 0, alloc_size, real_size;
> u8 engine_class, guc_class;
> - struct guc_gt_system_info *info, local_info;
> + struct guc_gt_system_info local_info;
> + struct iosys_map info_map;
>
> /*
> * Reserve the memory for the golden contexts and point GuC at it but
> @@ -448,14 +454,15 @@ static int guc_prep_golden_context(struct intel_guc *guc,
> * GuC will also validate that the LRC base + size fall within the
> * allowed GGTT range.
> */
> - if (blob) {
> + if (!iosys_map_is_null(&guc->ads_map)) {
> offset = guc_ads_golden_ctxt_offset(guc);
> addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;
> - info = &blob->system_info;
> + info_map = IOSYS_MAP_INIT_OFFSET(&guc->ads_map,
> + offsetof(struct __guc_ads_blob, system_info));
> } else {
> memset(&local_info, 0, sizeof(local_info));
> - info = &local_info;
> - fill_engine_enable_masks(gt, info);
> + iosys_map_set_vaddr(&info_map, &local_info);
> + fill_engine_enable_masks(gt, &info_map);
> }
>
> for (engine_class = 0; engine_class <= MAX_ENGINE_CLASS; ++engine_class) {
> @@ -464,14 +471,14 @@ static int guc_prep_golden_context(struct intel_guc *guc,
>
> guc_class = engine_class_to_guc_class(engine_class);
>
> - if (!info->engine_enabled_masks[guc_class])
> + if (!info_map_read(&info_map, engine_enabled_masks[guc_class]))
> continue;
>
> real_size = intel_engine_context_size(gt, engine_class);
> alloc_size = PAGE_ALIGN(real_size);
> total_size += alloc_size;
>
> - if (!blob)
> + if (iosys_map_is_null(&guc->ads_map))
> continue;
>
> /*
> @@ -485,12 +492,15 @@ static int guc_prep_golden_context(struct intel_guc *guc,
> * what comes before it in the context image (which is identical
> * on all engines).
> */
> - blob->ads.eng_state_size[guc_class] = real_size - LRC_SKIP_SIZE;
> - blob->ads.golden_context_lrca[guc_class] = addr_ggtt;
> + ads_blob_write(guc, ads.eng_state_size[guc_class],
> + real_size - LRC_SKIP_SIZE);
> + ads_blob_write(guc, ads.golden_context_lrca[guc_class],
> + addr_ggtt);
> +
> addr_ggtt += alloc_size;
> }
>
> - if (!blob)
> + if (iosys_map_is_null(&guc->ads_map))
> return total_size;
>
> GEM_BUG_ON(guc->ads_golden_ctxt_size != total_size);
> @@ -595,13 +605,15 @@ static void __guc_ads_init(struct intel_guc *guc)
> struct intel_gt *gt = guc_to_gt(guc);
> struct drm_i915_private *i915 = gt->i915;
> struct __guc_ads_blob *blob = guc->ads_blob;
> + struct iosys_map info_map = IOSYS_MAP_INIT_OFFSET(&guc->ads_map,
> + offsetof(struct __guc_ads_blob, system_info));
> u32 base;
>
> /* GuC scheduling policies */
> guc_policies_init(guc);
>
> /* System info */
> - fill_engine_enable_masks(gt, &blob->system_info);
> + fill_engine_enable_masks(gt, &info_map);
>
> blob->system_info.generic_gt_sysinfo[GUC_GENERIC_GT_SYSINFO_SLICE_ENABLED] =
> hweight8(gt->info.sseu.slice_mask);
> @@ -617,7 +629,7 @@ static void __guc_ads_init(struct intel_guc *guc)
> }
>
> /* Golden contexts for re-initialising after a watchdog reset */
> - guc_prep_golden_context(guc, blob);
> + guc_prep_golden_context(guc);
>
> guc_mapping_table_init(guc_to_gt(guc), &blob->system_info);
>
> @@ -663,7 +675,7 @@ int intel_guc_ads_create(struct intel_guc *guc)
> guc->ads_regset_size = ret;
>
> /* Likewise the golden contexts: */
> - ret = guc_prep_golden_context(guc, NULL);
> + ret = guc_prep_golden_context(guc);
> if (ret < 0)
> return ret;
> guc->ads_golden_ctxt_size = ret;
> --
> 2.35.1
>
WARNING: multiple messages have this Message-ID (diff)
From: Matthew Brost <matthew.brost@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
"Sumit Semwal" <sumit.semwal@linaro.org>,
"Daniele Ceraolo Spurio" <daniele.ceraolospurio@intel.com>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"Christian König" <christian.koenig@amd.com>,
"John Harrison" <John.C.Harrison@Intel.com>
Subject: Re: [PATCH v3 10/16] drm/i915/guc: Convert golden context prep to iosys_map
Date: Fri, 18 Feb 2022 14:06:50 -0800 [thread overview]
Message-ID: <20220218220650.GA36686@jons-linux-dev-box> (raw)
In-Reply-To: <20220216174147.3073235-11-lucas.demarchi@intel.com>
On Wed, Feb 16, 2022 at 09:41:41AM -0800, Lucas De Marchi wrote:
> Use the saved ads_map to prepare the golden context. One difference from
> the init context is that this function can be called before there is a
> gem object (and thus the guc->ads_map) to calculare the size of the
> golden context that should be allocated for that object.
>
> So in this case the function needs to be prepared for not having the
> system_info with enabled engines filled out. To accomplish that an
> info_map is prepared on the side to point either to the gem object
> or the local variable on the stack. This allows making
> fill_engine_enable_masks() operate always with a iosys_map
> argument.
>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Daniel Vetter <daniel@ffwll.ch>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 52 +++++++++++++---------
> 1 file changed, 32 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> index d924486490c1..0077a63832ad 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> @@ -67,6 +67,12 @@ struct __guc_ads_blob {
> iosys_map_wr_field(&(guc_)->ads_map, 0, struct __guc_ads_blob, \
> field_, val_)
>
> +#define info_map_write(map_, field_, val_) \
> + iosys_map_wr_field(map_, 0, struct guc_gt_system_info, field_, val_)
> +
> +#define info_map_read(map_, field_) \
> + iosys_map_rd_field(map_, 0, struct guc_gt_system_info, field_)
> +
> static u32 guc_ads_regset_size(struct intel_guc *guc)
> {
> GEM_BUG_ON(!guc->ads_regset_size);
> @@ -417,24 +423,24 @@ static void guc_mmio_reg_state_init(struct intel_guc *guc,
> }
>
> static void fill_engine_enable_masks(struct intel_gt *gt,
> - struct guc_gt_system_info *info)
> + struct iosys_map *info_map)
> {
> - info->engine_enabled_masks[GUC_RENDER_CLASS] = 1;
> - info->engine_enabled_masks[GUC_BLITTER_CLASS] = 1;
> - info->engine_enabled_masks[GUC_VIDEO_CLASS] = VDBOX_MASK(gt);
> - info->engine_enabled_masks[GUC_VIDEOENHANCE_CLASS] = VEBOX_MASK(gt);
> + info_map_write(info_map, engine_enabled_masks[GUC_RENDER_CLASS], 1);
> + info_map_write(info_map, engine_enabled_masks[GUC_BLITTER_CLASS], 1);
> + info_map_write(info_map, engine_enabled_masks[GUC_VIDEO_CLASS], VDBOX_MASK(gt));
> + info_map_write(info_map, engine_enabled_masks[GUC_VIDEOENHANCE_CLASS], VEBOX_MASK(gt));
> }
>
> #define LR_HW_CONTEXT_SIZE (80 * sizeof(u32))
> #define LRC_SKIP_SIZE (LRC_PPHWSP_SZ * PAGE_SIZE + LR_HW_CONTEXT_SIZE)
> -static int guc_prep_golden_context(struct intel_guc *guc,
> - struct __guc_ads_blob *blob)
> +static int guc_prep_golden_context(struct intel_guc *guc)
> {
> struct intel_gt *gt = guc_to_gt(guc);
> u32 addr_ggtt, offset;
> u32 total_size = 0, alloc_size, real_size;
> u8 engine_class, guc_class;
> - struct guc_gt_system_info *info, local_info;
> + struct guc_gt_system_info local_info;
> + struct iosys_map info_map;
>
> /*
> * Reserve the memory for the golden contexts and point GuC at it but
> @@ -448,14 +454,15 @@ static int guc_prep_golden_context(struct intel_guc *guc,
> * GuC will also validate that the LRC base + size fall within the
> * allowed GGTT range.
> */
> - if (blob) {
> + if (!iosys_map_is_null(&guc->ads_map)) {
> offset = guc_ads_golden_ctxt_offset(guc);
> addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;
> - info = &blob->system_info;
> + info_map = IOSYS_MAP_INIT_OFFSET(&guc->ads_map,
> + offsetof(struct __guc_ads_blob, system_info));
> } else {
> memset(&local_info, 0, sizeof(local_info));
> - info = &local_info;
> - fill_engine_enable_masks(gt, info);
> + iosys_map_set_vaddr(&info_map, &local_info);
> + fill_engine_enable_masks(gt, &info_map);
> }
>
> for (engine_class = 0; engine_class <= MAX_ENGINE_CLASS; ++engine_class) {
> @@ -464,14 +471,14 @@ static int guc_prep_golden_context(struct intel_guc *guc,
>
> guc_class = engine_class_to_guc_class(engine_class);
>
> - if (!info->engine_enabled_masks[guc_class])
> + if (!info_map_read(&info_map, engine_enabled_masks[guc_class]))
> continue;
>
> real_size = intel_engine_context_size(gt, engine_class);
> alloc_size = PAGE_ALIGN(real_size);
> total_size += alloc_size;
>
> - if (!blob)
> + if (iosys_map_is_null(&guc->ads_map))
> continue;
>
> /*
> @@ -485,12 +492,15 @@ static int guc_prep_golden_context(struct intel_guc *guc,
> * what comes before it in the context image (which is identical
> * on all engines).
> */
> - blob->ads.eng_state_size[guc_class] = real_size - LRC_SKIP_SIZE;
> - blob->ads.golden_context_lrca[guc_class] = addr_ggtt;
> + ads_blob_write(guc, ads.eng_state_size[guc_class],
> + real_size - LRC_SKIP_SIZE);
> + ads_blob_write(guc, ads.golden_context_lrca[guc_class],
> + addr_ggtt);
> +
> addr_ggtt += alloc_size;
> }
>
> - if (!blob)
> + if (iosys_map_is_null(&guc->ads_map))
> return total_size;
>
> GEM_BUG_ON(guc->ads_golden_ctxt_size != total_size);
> @@ -595,13 +605,15 @@ static void __guc_ads_init(struct intel_guc *guc)
> struct intel_gt *gt = guc_to_gt(guc);
> struct drm_i915_private *i915 = gt->i915;
> struct __guc_ads_blob *blob = guc->ads_blob;
> + struct iosys_map info_map = IOSYS_MAP_INIT_OFFSET(&guc->ads_map,
> + offsetof(struct __guc_ads_blob, system_info));
> u32 base;
>
> /* GuC scheduling policies */
> guc_policies_init(guc);
>
> /* System info */
> - fill_engine_enable_masks(gt, &blob->system_info);
> + fill_engine_enable_masks(gt, &info_map);
>
> blob->system_info.generic_gt_sysinfo[GUC_GENERIC_GT_SYSINFO_SLICE_ENABLED] =
> hweight8(gt->info.sseu.slice_mask);
> @@ -617,7 +629,7 @@ static void __guc_ads_init(struct intel_guc *guc)
> }
>
> /* Golden contexts for re-initialising after a watchdog reset */
> - guc_prep_golden_context(guc, blob);
> + guc_prep_golden_context(guc);
>
> guc_mapping_table_init(guc_to_gt(guc), &blob->system_info);
>
> @@ -663,7 +675,7 @@ int intel_guc_ads_create(struct intel_guc *guc)
> guc->ads_regset_size = ret;
>
> /* Likewise the golden contexts: */
> - ret = guc_prep_golden_context(guc, NULL);
> + ret = guc_prep_golden_context(guc);
> if (ret < 0)
> return ret;
> guc->ads_golden_ctxt_size = ret;
> --
> 2.35.1
>
next prev parent reply other threads:[~2022-02-18 22:12 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-16 17:41 [Intel-gfx] [PATCH v3 00/16] drm/i915/guc: Refactor ADS access to use iosys_map Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-16 17:41 ` [Intel-gfx] [PATCH v3 01/16] iosys-map: Add offset to iosys_map_memcpy_to() Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-16 17:41 ` [Intel-gfx] [PATCH v3 02/16] iosys-map: Add a few more helpers Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-17 8:42 ` [Intel-gfx] " Thomas Zimmermann
2022-02-17 8:42 ` Thomas Zimmermann
2022-02-17 8:42 ` Thomas Zimmermann
2022-02-20 4:28 ` [Intel-gfx] " Lucas De Marchi
2022-02-20 4:28 ` Lucas De Marchi
2022-02-20 4:28 ` Lucas De Marchi
2022-02-16 17:41 ` [Intel-gfx] [PATCH v3 03/16] drm/i915/gt: Add helper for shmem copy to iosys_map Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-16 17:41 ` [Intel-gfx] [PATCH v3 04/16] drm/i915/guc: Keep iosys_map of ads_blob around Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-16 17:41 ` [Intel-gfx] [PATCH v3 05/16] drm/i915/guc: Add read/write helpers for ADS blob Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-16 17:41 ` [Intel-gfx] [PATCH v3 06/16] drm/i915/guc: Convert golden context init to iosys_map Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-16 17:41 ` [Intel-gfx] [PATCH v3 07/16] drm/i915/guc: Convert policies update " Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-16 17:41 ` [Intel-gfx] [PATCH v3 08/16] drm/i915/guc: Convert engine record " Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-16 17:41 ` [Intel-gfx] [PATCH v3 09/16] drm/i915/guc: Convert guc_ads_private_data_reset " Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-18 20:36 ` [Intel-gfx] " Matthew Brost
2022-02-18 20:36 ` Matthew Brost
2022-02-16 17:41 ` [Intel-gfx] [PATCH v3 10/16] drm/i915/guc: Convert golden context prep " Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-18 22:06 ` Matthew Brost [this message]
2022-02-18 22:06 ` Matthew Brost
2022-02-16 17:41 ` [Intel-gfx] [PATCH v3 11/16] drm/i915/guc: Replace check for golden context size Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-18 20:39 ` [Intel-gfx] " Matthew Brost
2022-02-18 20:39 ` Matthew Brost
2022-02-16 17:41 ` [Intel-gfx] [PATCH v3 12/16] drm/i915/guc: Convert mapping table to iosys_map Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-18 20:45 ` [Intel-gfx] " Matthew Brost
2022-02-18 20:45 ` Matthew Brost
2022-02-16 17:41 ` [Intel-gfx] [PATCH v3 13/16] drm/i915/guc: Convert capture list " Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-18 20:50 ` [Intel-gfx] " Matthew Brost
2022-02-18 20:50 ` Matthew Brost
2022-02-16 17:41 ` [Intel-gfx] [PATCH v3 14/16] drm/i915/guc: Convert guc_mmio_reg_state_init " Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-18 20:56 ` [Intel-gfx] " Matthew Brost
2022-02-18 20:56 ` Matthew Brost
2022-02-16 17:41 ` [Intel-gfx] [PATCH v3 15/16] drm/i915/guc: Convert __guc_ads_init " Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-18 21:07 ` [Intel-gfx] " Matthew Brost
2022-02-18 21:07 ` Matthew Brost
2022-02-16 17:41 ` [Intel-gfx] [PATCH v3 16/16] drm/i915/guc: Remove plain ads_blob pointer Lucas De Marchi
2022-02-16 17:41 ` Lucas De Marchi
2022-02-18 21:12 ` [Intel-gfx] " Matthew Brost
2022-02-18 21:12 ` Matthew Brost
2022-02-17 7:24 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Refactor ADS access to use iosys_map (rev3) Patchwork
2022-02-17 7:26 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-17 7:56 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-02-18 19:44 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Refactor ADS access to use iosys_map (rev4) Patchwork
2022-02-18 19:46 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-18 20:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-02-19 12:47 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-02-19 18:46 ` Lucas De Marchi
2022-02-22 16:50 ` Vudum, Lakshminarayana
2022-02-22 16:46 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
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