* [PATCH 1/2] intel-iommu: remove VTD_FR_RESERVED_ERR
@ 2022-02-10 9:28 Jason Wang
2022-02-10 9:28 ` [PATCH 2/2] intel-iommu: block output address in interrupt address range Jason Wang
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Jason Wang @ 2022-02-10 9:28 UTC (permalink / raw)
To: mst, peterx; +Cc: Jason Wang, qemu-devel
This fault reason is not used and is duplicated with SPT.2 condition
code. So let's remove it.
Signed-off-by: Jason Wang <jasowang@redhat.com>
---
hw/i386/intel_iommu.c | 6 ------
hw/i386/intel_iommu_internal.h | 5 -----
2 files changed, 11 deletions(-)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 5b865ac08c..55281ee1b4 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -469,11 +469,6 @@ static void vtd_report_dmar_fault(IntelIOMMUState *s, uint16_t source_id,
assert(fault < VTD_FR_MAX);
- if (fault == VTD_FR_RESERVED_ERR) {
- /* This is not a normal fault reason case. Drop it. */
- return;
- }
-
trace_vtd_dmar_fault(source_id, fault, addr, is_write);
if (fsts_reg & VTD_FSTS_PFO) {
@@ -1629,7 +1624,6 @@ static const bool vtd_qualified_faults[] = {
[VTD_FR_PAGING_ENTRY_RSVD] = true,
[VTD_FR_CONTEXT_ENTRY_TT] = true,
[VTD_FR_PASID_TABLE_INV] = false,
- [VTD_FR_RESERVED_ERR] = false,
[VTD_FR_MAX] = false,
};
diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
index a6c788049b..d0bb43ae87 100644
--- a/hw/i386/intel_iommu_internal.h
+++ b/hw/i386/intel_iommu_internal.h
@@ -303,11 +303,6 @@ typedef enum VTDFaultReason {
VTD_FR_PASID_TABLE_INV = 0x58, /*Invalid PASID table entry */
- /* This is not a normal fault reason. We use this to indicate some faults
- * that are not referenced by the VT-d specification.
- * Fault event with such reason should not be recorded.
- */
- VTD_FR_RESERVED_ERR,
VTD_FR_MAX, /* Guard */
} VTDFaultReason;
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 2/2] intel-iommu: block output address in interrupt address range 2022-02-10 9:28 [PATCH 1/2] intel-iommu: remove VTD_FR_RESERVED_ERR Jason Wang @ 2022-02-10 9:28 ` Jason Wang 2022-02-10 9:47 ` Peter Xu 2022-02-10 9:46 ` [PATCH 1/2] intel-iommu: remove VTD_FR_RESERVED_ERR Peter Xu 2022-03-17 4:38 ` Jason Wang 2 siblings, 1 reply; 6+ messages in thread From: Jason Wang @ 2022-02-10 9:28 UTC (permalink / raw) To: mst, peterx; +Cc: Jason Wang, qemu-devel According to vtd spec v3.3 3.14: """ Software must not program paging-structure entries to remap any address to the interrupt address range. Untranslated requests and translation requests that result in an address in the interrupt range will be blocked with condition code LGN.4 or SGN.8. """ This patch blocks the request that result in interrupt address range. Signed-off-by: Jason Wang <jasowang@redhat.com> --- hw/i386/intel_iommu.c | 27 ++++++++++++++++++++++++++- hw/i386/intel_iommu_internal.h | 4 ++++ 2 files changed, 30 insertions(+), 1 deletion(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 55281ee1b4..5ef48271d8 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -1020,6 +1020,7 @@ static int vtd_iova_to_slpte(IntelIOMMUState *s, VTDContextEntry *ce, uint32_t offset; uint64_t slpte; uint64_t access_right_check; + uint64_t xlat, size; if (!vtd_iova_range_check(s, iova, ce, aw_bits)) { error_report_once("%s: detected IOVA overflow (iova=0x%" PRIx64 ")", @@ -1064,11 +1065,33 @@ static int vtd_iova_to_slpte(IntelIOMMUState *s, VTDContextEntry *ce, if (vtd_is_last_slpte(slpte, level)) { *slptep = slpte; *slpte_level = level; - return 0; + break; } addr = vtd_get_slpte_addr(slpte, aw_bits); level--; } + + xlat = vtd_get_slpte_addr(*slptep, aw_bits); + size = ~vtd_slpt_level_page_mask(level) + 1; + + /* + * From VT-d spec 3.14: Untranslated requests and translation + * requests that result in an address in the interrupt range will be + * blocked with condition code LGN.4 or SGN.8. + */ + if ((xlat > VTD_INTERRUPT_ADDR_LAST || + xlat + size - 1 < VTD_INTERRUPT_ADDR_FIRST)) { + return 0; + } else { + error_report_once("%s: xlat address is in interrupt range " + "(iova=0x%" PRIx64 ", level=0x%" PRIx32 ", " + "slpte=0x%" PRIx64 ", write=%d, " + "xlat=0x%" PRIx64 ", size=0x%" PRIx64 ")", + __func__, iova, level, slpte, is_write, + xlat, size); + return s->scalable_mode ? -VTD_FR_SM_INTERRUPT_ADDR : + -VTD_FR_INTERRUPT_ADDR; + } } typedef int (*vtd_page_walk_hook)(IOMMUTLBEvent *event, void *private); @@ -1620,10 +1643,12 @@ static const bool vtd_qualified_faults[] = { [VTD_FR_PAGING_ENTRY_INV] = true, [VTD_FR_ROOT_TABLE_INV] = false, [VTD_FR_CONTEXT_TABLE_INV] = false, + [VTD_FR_INTERRUPT_ADDR] = true, [VTD_FR_ROOT_ENTRY_RSVD] = false, [VTD_FR_PAGING_ENTRY_RSVD] = true, [VTD_FR_CONTEXT_ENTRY_TT] = true, [VTD_FR_PASID_TABLE_INV] = false, + [VTD_FR_SM_INTERRUPT_ADDR] = true, [VTD_FR_MAX] = false, }; diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index d0bb43ae87..730e1b97d6 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -288,6 +288,8 @@ typedef enum VTDFaultReason { * context-entry. */ VTD_FR_CONTEXT_ENTRY_TT, + /* Output address in the interrupt address range */ + VTD_FR_INTERRUPT_ADDR = 0xE, /* Interrupt remapping transition faults */ VTD_FR_IR_REQ_RSVD = 0x20, /* One or more IR request reserved @@ -303,6 +305,8 @@ typedef enum VTDFaultReason { VTD_FR_PASID_TABLE_INV = 0x58, /*Invalid PASID table entry */ + /* Output address in the interrupt address range for scalable mode */ + VTD_FR_SM_INTERRUPT_ADDR = 0x87, VTD_FR_MAX, /* Guard */ } VTDFaultReason; -- 2.25.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] intel-iommu: block output address in interrupt address range 2022-02-10 9:28 ` [PATCH 2/2] intel-iommu: block output address in interrupt address range Jason Wang @ 2022-02-10 9:47 ` Peter Xu 0 siblings, 0 replies; 6+ messages in thread From: Peter Xu @ 2022-02-10 9:47 UTC (permalink / raw) To: Jason Wang; +Cc: qemu-devel, mst On Thu, Feb 10, 2022 at 05:28:15PM +0800, Jason Wang wrote: > According to vtd spec v3.3 3.14: > > """ > Software must not program paging-structure entries to remap any > address to the interrupt address range. Untranslated requests and > translation requests that result in an address in the interrupt range > will be blocked with condition code LGN.4 or SGN.8. > """ > > This patch blocks the request that result in interrupt address range. > > Signed-off-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> -- Peter Xu ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] intel-iommu: remove VTD_FR_RESERVED_ERR 2022-02-10 9:28 [PATCH 1/2] intel-iommu: remove VTD_FR_RESERVED_ERR Jason Wang 2022-02-10 9:28 ` [PATCH 2/2] intel-iommu: block output address in interrupt address range Jason Wang @ 2022-02-10 9:46 ` Peter Xu 2022-03-17 4:38 ` Jason Wang 2 siblings, 0 replies; 6+ messages in thread From: Peter Xu @ 2022-02-10 9:46 UTC (permalink / raw) To: Jason Wang; +Cc: qemu-devel, mst On Thu, Feb 10, 2022 at 05:28:14PM +0800, Jason Wang wrote: > This fault reason is not used and is duplicated with SPT.2 condition > code. So let's remove it. > > Signed-off-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> -- Peter Xu ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] intel-iommu: remove VTD_FR_RESERVED_ERR 2022-02-10 9:28 [PATCH 1/2] intel-iommu: remove VTD_FR_RESERVED_ERR Jason Wang 2022-02-10 9:28 ` [PATCH 2/2] intel-iommu: block output address in interrupt address range Jason Wang 2022-02-10 9:46 ` [PATCH 1/2] intel-iommu: remove VTD_FR_RESERVED_ERR Peter Xu @ 2022-03-17 4:38 ` Jason Wang 2022-03-20 12:01 ` Michael S. Tsirkin 2 siblings, 1 reply; 6+ messages in thread From: Jason Wang @ 2022-03-17 4:38 UTC (permalink / raw) To: mst, Peter Xu; +Cc: qemu-devel HI Michael: Want to take this series? Thanks On Thu, Feb 10, 2022 at 5:28 PM Jason Wang <jasowang@redhat.com> wrote: > > This fault reason is not used and is duplicated with SPT.2 condition > code. So let's remove it. > > Signed-off-by: Jason Wang <jasowang@redhat.com> > --- > hw/i386/intel_iommu.c | 6 ------ > hw/i386/intel_iommu_internal.h | 5 ----- > 2 files changed, 11 deletions(-) > > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c > index 5b865ac08c..55281ee1b4 100644 > --- a/hw/i386/intel_iommu.c > +++ b/hw/i386/intel_iommu.c > @@ -469,11 +469,6 @@ static void vtd_report_dmar_fault(IntelIOMMUState *s, uint16_t source_id, > > assert(fault < VTD_FR_MAX); > > - if (fault == VTD_FR_RESERVED_ERR) { > - /* This is not a normal fault reason case. Drop it. */ > - return; > - } > - > trace_vtd_dmar_fault(source_id, fault, addr, is_write); > > if (fsts_reg & VTD_FSTS_PFO) { > @@ -1629,7 +1624,6 @@ static const bool vtd_qualified_faults[] = { > [VTD_FR_PAGING_ENTRY_RSVD] = true, > [VTD_FR_CONTEXT_ENTRY_TT] = true, > [VTD_FR_PASID_TABLE_INV] = false, > - [VTD_FR_RESERVED_ERR] = false, > [VTD_FR_MAX] = false, > }; > > diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h > index a6c788049b..d0bb43ae87 100644 > --- a/hw/i386/intel_iommu_internal.h > +++ b/hw/i386/intel_iommu_internal.h > @@ -303,11 +303,6 @@ typedef enum VTDFaultReason { > > VTD_FR_PASID_TABLE_INV = 0x58, /*Invalid PASID table entry */ > > - /* This is not a normal fault reason. We use this to indicate some faults > - * that are not referenced by the VT-d specification. > - * Fault event with such reason should not be recorded. > - */ > - VTD_FR_RESERVED_ERR, > VTD_FR_MAX, /* Guard */ > } VTDFaultReason; > > -- > 2.25.1 > ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] intel-iommu: remove VTD_FR_RESERVED_ERR 2022-03-17 4:38 ` Jason Wang @ 2022-03-20 12:01 ` Michael S. Tsirkin 0 siblings, 0 replies; 6+ messages in thread From: Michael S. Tsirkin @ 2022-03-20 12:01 UTC (permalink / raw) To: Jason Wang; +Cc: qemu-devel, Peter Xu Will do, thanks! On Thu, Mar 17, 2022 at 12:38:35PM +0800, Jason Wang wrote: > HI Michael: > > Want to take this series? > > Thanks > > On Thu, Feb 10, 2022 at 5:28 PM Jason Wang <jasowang@redhat.com> wrote: > > > > This fault reason is not used and is duplicated with SPT.2 condition > > code. So let's remove it. > > > > Signed-off-by: Jason Wang <jasowang@redhat.com> > > --- > > hw/i386/intel_iommu.c | 6 ------ > > hw/i386/intel_iommu_internal.h | 5 ----- > > 2 files changed, 11 deletions(-) > > > > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c > > index 5b865ac08c..55281ee1b4 100644 > > --- a/hw/i386/intel_iommu.c > > +++ b/hw/i386/intel_iommu.c > > @@ -469,11 +469,6 @@ static void vtd_report_dmar_fault(IntelIOMMUState *s, uint16_t source_id, > > > > assert(fault < VTD_FR_MAX); > > > > - if (fault == VTD_FR_RESERVED_ERR) { > > - /* This is not a normal fault reason case. Drop it. */ > > - return; > > - } > > - > > trace_vtd_dmar_fault(source_id, fault, addr, is_write); > > > > if (fsts_reg & VTD_FSTS_PFO) { > > @@ -1629,7 +1624,6 @@ static const bool vtd_qualified_faults[] = { > > [VTD_FR_PAGING_ENTRY_RSVD] = true, > > [VTD_FR_CONTEXT_ENTRY_TT] = true, > > [VTD_FR_PASID_TABLE_INV] = false, > > - [VTD_FR_RESERVED_ERR] = false, > > [VTD_FR_MAX] = false, > > }; > > > > diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h > > index a6c788049b..d0bb43ae87 100644 > > --- a/hw/i386/intel_iommu_internal.h > > +++ b/hw/i386/intel_iommu_internal.h > > @@ -303,11 +303,6 @@ typedef enum VTDFaultReason { > > > > VTD_FR_PASID_TABLE_INV = 0x58, /*Invalid PASID table entry */ > > > > - /* This is not a normal fault reason. We use this to indicate some faults > > - * that are not referenced by the VT-d specification. > > - * Fault event with such reason should not be recorded. > > - */ > > - VTD_FR_RESERVED_ERR, > > VTD_FR_MAX, /* Guard */ > > } VTDFaultReason; > > > > -- > > 2.25.1 > > ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-03-20 12:06 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2022-02-10 9:28 [PATCH 1/2] intel-iommu: remove VTD_FR_RESERVED_ERR Jason Wang 2022-02-10 9:28 ` [PATCH 2/2] intel-iommu: block output address in interrupt address range Jason Wang 2022-02-10 9:47 ` Peter Xu 2022-02-10 9:46 ` [PATCH 1/2] intel-iommu: remove VTD_FR_RESERVED_ERR Peter Xu 2022-03-17 4:38 ` Jason Wang 2022-03-20 12:01 ` Michael S. Tsirkin
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