From: Maxim Levitsky <mlevitsk@redhat.com>
To: kvm@vger.kernel.org
Cc: Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Sean Christopherson <seanjc@google.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>,
"H. Peter Anvin" <hpa@zytor.com>, Joerg Roedel <joro@8bytes.org>,
linux-kernel@vger.kernel.org,
Thomas Gleixner <tglx@linutronix.de>,
Jim Mattson <jmattson@google.com>,
x86@kernel.org, Dave Hansen <dave.hansen@linux.intel.com>,
Wanpeng Li <wanpengli@tencent.com>,
Maxim Levitsky <mlevitsk@redhat.com>
Subject: [PATCH v4 0/6] nSVM/SVM features
Date: Tue, 22 Mar 2022 19:40:44 +0200 [thread overview]
Message-ID: <20220322174050.241850-1-mlevitsk@redhat.com> (raw)
This is a set of patches for optional SVM nested features.
V4: rebased on top of kvm/queue + my patch series 'SVM fixes + refactoring'
and incorporated all review feedback.
This was tested with kvm unit test, running on L0,L1, and L2,
and no new failures were seen.
This time I also tested this with all new features disabled in L1,
and in L2, to avoid repeating an issue I had in nested tsc scaling.
Best regards,
Maxim Levitsky
Maxim Levitsky (6):
KVM: x86: nSVM: correctly virtualize LBR msrs when L2 is running
KVM: x86: nSVM: implement nested LBR virtualization
KVM: x86: nSVM: support PAUSE filtering when L0 doesn't intercept
PAUSE
KVM: x86: nSVM: implement nested vGIF
KVM: x86: allow per cpu apicv inhibit reasons
KVM: x86: SVM: allow AVIC to co-exist with a nested guest running
arch/x86/include/asm/kvm-x86-ops.h | 1 +
arch/x86/include/asm/kvm_host.h | 6 ++
arch/x86/kvm/svm/avic.c | 7 ++
arch/x86/kvm/svm/nested.c | 83 +++++++++++++--
arch/x86/kvm/svm/svm.c | 162 +++++++++++++++++++++++------
arch/x86/kvm/svm/svm.h | 41 ++++++--
arch/x86/kvm/x86.c | 14 ++-
7 files changed, 264 insertions(+), 50 deletions(-)
--
2.26.3
next reply other threads:[~2022-03-22 17:41 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-22 17:40 Maxim Levitsky [this message]
2022-03-22 17:40 ` [PATCH v4 1/6] KVM: x86: nSVM: correctly virtualize LBR msrs when L2 is running Maxim Levitsky
2022-03-22 17:40 ` [PATCH v4 2/6] KVM: x86: nSVM: implement nested LBR virtualization Maxim Levitsky
2022-03-24 18:21 ` Paolo Bonzini
2022-03-27 15:12 ` Maxim Levitsky
2022-03-28 17:12 ` Paolo Bonzini
2022-03-29 8:46 ` Maxim Levitsky
2022-03-22 17:40 ` [PATCH v4 3/6] KVM: x86: nSVM: support PAUSE filtering when L0 doesn't intercept PAUSE Maxim Levitsky
2022-03-24 18:24 ` Paolo Bonzini
2022-03-27 15:14 ` Maxim Levitsky
2022-03-22 17:40 ` [PATCH v4 4/6] KVM: x86: nSVM: implement nested vGIF Maxim Levitsky
2022-03-22 17:40 ` [PATCH v4 5/6] KVM: x86: allow per cpu apicv inhibit reasons Maxim Levitsky
2022-03-22 17:40 ` [PATCH v4 6/6] KVM: x86: SVM: allow AVIC to co-exist with a nested guest running Maxim Levitsky
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220322174050.241850-1-mlevitsk@redhat.com \
--to=mlevitsk@redhat.com \
--cc=bp@alien8.de \
--cc=dave.hansen@linux.intel.com \
--cc=hpa@zytor.com \
--cc=jmattson@google.com \
--cc=joro@8bytes.org \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=pbonzini@redhat.com \
--cc=seanjc@google.com \
--cc=tglx@linutronix.de \
--cc=vkuznets@redhat.com \
--cc=wanpengli@tencent.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.