From: Paolo Bonzini <pbonzini@redhat.com>
To: Maxim Levitsky <mlevitsk@redhat.com>, kvm@vger.kernel.org
Cc: Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Sean Christopherson <seanjc@google.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
"H. Peter Anvin" <hpa@zytor.com>, Joerg Roedel <joro@8bytes.org>,
linux-kernel@vger.kernel.org,
Thomas Gleixner <tglx@linutronix.de>,
Jim Mattson <jmattson@google.com>,
x86@kernel.org, Dave Hansen <dave.hansen@linux.intel.com>,
Wanpeng Li <wanpengli@tencent.com>
Subject: Re: [PATCH v4 2/6] KVM: x86: nSVM: implement nested LBR virtualization
Date: Mon, 28 Mar 2022 19:12:45 +0200 [thread overview]
Message-ID: <bfe9a0ce-7f83-4264-e450-a53e4e08d785@redhat.com> (raw)
In-Reply-To: <612b6524258b949e381efec12d85b4e82be53308.camel@redhat.com>
On 3/27/22 17:12, Maxim Levitsky wrote:
> - with LBR virtualization supported, the guest can set this msr to any value
> as long as it doesn't set reserved bits and then read back the written value,
> but it is not used by the CPU, unless LBR bit is set in MSR_IA32_DEBUGCTLMSR,
> because only then LBR virtualization is enabled, which makes the CPU
> load the guest value on VM entry.
>
> This means that MSR_IA32_DEBUGCTLMSR.BTF will magically start working when
> MSR_IA32_DEBUGCTLMSR.LBR is set as well, and will not work otherwise.
That can be fixed by context-switching DEBUGCTLMSR by hand when LBR=0 &&
BTF=1. Would you like to give it a shot?
Paolo
next prev parent reply other threads:[~2022-03-28 17:12 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-22 17:40 [PATCH v4 0/6] nSVM/SVM features Maxim Levitsky
2022-03-22 17:40 ` [PATCH v4 1/6] KVM: x86: nSVM: correctly virtualize LBR msrs when L2 is running Maxim Levitsky
2022-03-22 17:40 ` [PATCH v4 2/6] KVM: x86: nSVM: implement nested LBR virtualization Maxim Levitsky
2022-03-24 18:21 ` Paolo Bonzini
2022-03-27 15:12 ` Maxim Levitsky
2022-03-28 17:12 ` Paolo Bonzini [this message]
2022-03-29 8:46 ` Maxim Levitsky
2022-03-22 17:40 ` [PATCH v4 3/6] KVM: x86: nSVM: support PAUSE filtering when L0 doesn't intercept PAUSE Maxim Levitsky
2022-03-24 18:24 ` Paolo Bonzini
2022-03-27 15:14 ` Maxim Levitsky
2022-03-22 17:40 ` [PATCH v4 4/6] KVM: x86: nSVM: implement nested vGIF Maxim Levitsky
2022-03-22 17:40 ` [PATCH v4 5/6] KVM: x86: allow per cpu apicv inhibit reasons Maxim Levitsky
2022-03-22 17:40 ` [PATCH v4 6/6] KVM: x86: SVM: allow AVIC to co-exist with a nested guest running Maxim Levitsky
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