From: Ping-Ke Shih <pkshih@realtek.com>
To: <kvalo@kernel.org>
Cc: <linux-wireless@vger.kernel.org>, <leo.li@realtek.com>
Subject: [PATCH 06/16] rtw89: pci: add deglitch setting
Date: Fri, 25 Mar 2022 14:00:45 +0800 [thread overview]
Message-ID: <20220325060055.58482-7-pkshih@realtek.com> (raw)
In-Reply-To: <20220325060055.58482-1-pkshih@realtek.com>
Add setting to support 8852ce.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/pci.c | 27 ++++++++++++++----------
drivers/net/wireless/realtek/rtw89/pci.h | 3 +++
2 files changed, 19 insertions(+), 11 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtw89/pci.c b/drivers/net/wireless/realtek/rtw89/pci.c
index 25d385be6e862..5112b2d443c3e 100644
--- a/drivers/net/wireless/realtek/rtw89/pci.c
+++ b/drivers/net/wireless/realtek/rtw89/pci.c
@@ -1809,19 +1809,24 @@ static int rtw89_pci_auto_refclk_cal(struct rtw89_dev *rtwdev, bool autook_en)
static int rtw89_pci_deglitch_setting(struct rtw89_dev *rtwdev)
{
+ enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id;
int ret;
- if (rtwdev->chip->chip_id != RTL8852A)
- return 0;
-
- ret = rtw89_write16_mdio_clr(rtwdev, RAC_ANA24, B_AX_DEGLITCH,
- PCIE_PHY_GEN1);
- if (ret)
- return ret;
- ret = rtw89_write16_mdio_clr(rtwdev, RAC_ANA24, B_AX_DEGLITCH,
- PCIE_PHY_GEN2);
- if (ret)
- return ret;
+ if (chip_id == RTL8852A) {
+ ret = rtw89_write16_mdio_clr(rtwdev, RAC_ANA24, B_AX_DEGLITCH,
+ PCIE_PHY_GEN1);
+ if (ret)
+ return ret;
+ ret = rtw89_write16_mdio_clr(rtwdev, RAC_ANA24, B_AX_DEGLITCH,
+ PCIE_PHY_GEN2);
+ if (ret)
+ return ret;
+ } else if (chip_id == RTL8852C) {
+ rtw89_write16_clr(rtwdev, R_RAC_DIRECT_OFFSET_G1 + RAC_ANA24 * 2,
+ B_AX_DEGLITCH);
+ rtw89_write16_clr(rtwdev, R_RAC_DIRECT_OFFSET_G2 + RAC_ANA24 * 2,
+ B_AX_DEGLITCH);
+ }
return 0;
}
diff --git a/drivers/net/wireless/realtek/rtw89/pci.h b/drivers/net/wireless/realtek/rtw89/pci.h
index 99f0cd2f47da2..805fc3e8c1a4a 100644
--- a/drivers/net/wireless/realtek/rtw89/pci.h
+++ b/drivers/net/wireless/realtek/rtw89/pci.h
@@ -80,6 +80,9 @@
#define R_AX_PCIE_WDT_TIMER_S1 0x3128
#define B_AX_PCIE_WDT_TIMER_S1_MASK GENMASK(31, 0)
+#define R_RAC_DIRECT_OFFSET_G1 0x3800
+#define R_RAC_DIRECT_OFFSET_G2 0x3880
+
#define RTW89_PCI_WR_RETRY_CNT 20
/* Interrupts */
--
2.25.1
next prev parent reply other threads:[~2022-03-25 6:02 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-25 6:00 [PATCH 00/16] rtw89: refine PCI and MAC codes into function with attributes Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 01/16] rtw89: pci: add register definition to rtw89_pci_info to generalize pci code Ping-Ke Shih
2022-04-06 8:55 ` Kalle Valo
2022-03-25 6:00 ` [PATCH 02/16] rtw89: pci: add pci attributes to configure operating mode Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 03/16] rtw89: pci: refine pci pre_init function Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 04/16] rtw89: pci: add LTR setting for v1 chip Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 05/16] rtw89: pci: set address info registers depends on chips Ping-Ke Shih
2022-03-25 6:00 ` Ping-Ke Shih [this message]
2022-03-25 6:00 ` [PATCH 07/16] rtw89: pci: add L1 settings Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 08/16] rtw89: extend dmac_pre_init to support 8852C Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 09/16] rtw89: update STA scheduler parameters for v1 chip Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 10/16] rtw89: add chip_ops::{enable,disable}_bb_rf to support " Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 11/16] rtw89: Turn on CR protection of CMAC Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 12/16] rtw89: 8852c: update security engine setting Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 13/16] rtw89: update scheduler setting Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 14/16] rtw89: initialize NAV control Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 15/16] rtw89: update TMAC parameters Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 16/16] rtw89: update ptcl_init Ping-Ke Shih
2022-03-25 11:11 ` [PATCH 00/16] rtw89: refine PCI and MAC codes into function with attributes Kalle Valo
2022-03-25 12:01 ` Pkshih
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220325060055.58482-7-pkshih@realtek.com \
--to=pkshih@realtek.com \
--cc=kvalo@kernel.org \
--cc=leo.li@realtek.com \
--cc=linux-wireless@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.