From: Kalle Valo <kvalo@kernel.org>
To: Ping-Ke Shih <pkshih@realtek.com>
Cc: <linux-wireless@vger.kernel.org>, <leo.li@realtek.com>
Subject: Re: [PATCH 00/16] rtw89: refine PCI and MAC codes into function with attributes
Date: Fri, 25 Mar 2022 13:11:50 +0200 [thread overview]
Message-ID: <87y20ynv61.fsf@kernel.org> (raw)
In-Reply-To: <20220325060055.58482-1-pkshih@realtek.com> (Ping-Ke Shih's message of "Fri, 25 Mar 2022 14:00:39 +0800")
Ping-Ke Shih <pkshih@realtek.com> writes:
> The existing PCI and MAC codes are only used by 8852AE, so many settings are
> put in single function. To be clear, move the settings into an individual
> function according to its functionality. Since functions will be shared
> with chips, add attributes to make it possible to use common functions.
>
> Also, update the settings to the latest version of our internal code.
>
> This patchset is based on
> "rtw89: add firmware reset and dump firmware memory and backtrace" and
> "rtw89: update TX power table and 6G, refine IGI, and add TX/RX descriptors V1"
> But no actual function dependency.
The merge window is now open which means wireless-next is closed. I
don't mind people submitting few -next patches during the merge window,
but there's a limit for that. Currently I see 39 rtw89 patches in
patchwork, that's just too much. So please try to limit the number of
patches you submit during the merge window.
Usually wireless-next opens few days after -rc1 is released, but there's
no fixed schedule.
--
https://patchwork.kernel.org/project/linux-wireless/list/
https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches
next prev parent reply other threads:[~2022-03-25 11:11 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-25 6:00 [PATCH 00/16] rtw89: refine PCI and MAC codes into function with attributes Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 01/16] rtw89: pci: add register definition to rtw89_pci_info to generalize pci code Ping-Ke Shih
2022-04-06 8:55 ` Kalle Valo
2022-03-25 6:00 ` [PATCH 02/16] rtw89: pci: add pci attributes to configure operating mode Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 03/16] rtw89: pci: refine pci pre_init function Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 04/16] rtw89: pci: add LTR setting for v1 chip Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 05/16] rtw89: pci: set address info registers depends on chips Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 06/16] rtw89: pci: add deglitch setting Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 07/16] rtw89: pci: add L1 settings Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 08/16] rtw89: extend dmac_pre_init to support 8852C Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 09/16] rtw89: update STA scheduler parameters for v1 chip Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 10/16] rtw89: add chip_ops::{enable,disable}_bb_rf to support " Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 11/16] rtw89: Turn on CR protection of CMAC Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 12/16] rtw89: 8852c: update security engine setting Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 13/16] rtw89: update scheduler setting Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 14/16] rtw89: initialize NAV control Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 15/16] rtw89: update TMAC parameters Ping-Ke Shih
2022-03-25 6:00 ` [PATCH 16/16] rtw89: update ptcl_init Ping-Ke Shih
2022-03-25 11:11 ` Kalle Valo [this message]
2022-03-25 12:01 ` [PATCH 00/16] rtw89: refine PCI and MAC codes into function with attributes Pkshih
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