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From: Ard Biesheuvel <ardb@kernel.org>
To: linux-efi@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org, keescook@chromium.org,
	mark.rutland@arm.com, catalin.marinas@arm.com,
	Ard Biesheuvel <ardb@kernel.org>
Subject: [RFC PATCH v2 14/18] arm64: head: clean the ID map page to the PoC
Date: Wed, 30 Mar 2022 17:42:01 +0200	[thread overview]
Message-ID: <20220330154205.2483167-15-ardb@kernel.org> (raw)
In-Reply-To: <20220330154205.2483167-1-ardb@kernel.org>

If we enter with the MMU and caches enabled, the caller may not have
performed any cache maintenance. So clean the ID mapped page to the PoC,
and invalidate the I-cache so we can safely execute from it after
disabling the MMU and caches.

Note that this means primary_entry() itself needs to be moved into the
ID map as well, as we will return from init_kernel_el() with the MMU and
caches off.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
 arch/arm64/kernel/head.S | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index ec57a29f3f43..2f1dcc0c7594 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -75,7 +75,7 @@
 
 	__EFI_PE_HEADER
 
-	__INIT
+	.section ".idmap.text","awx"
 
 	/*
 	 * The following callee saved general purpose registers are used on the
@@ -91,6 +91,19 @@ SYM_CODE_START(primary_entry)
 	bl	record_mmu_state
 	bl	preserve_boot_args
 	bl	create_idmap
+
+	/*
+	 * If we entered with the MMU and caches on, clean the ID mapped part
+	 * of the primary boot code to the PoC and invalidate it from the
+	 * I-cache so we can safely turn them off.
+	 */
+	cbz	x22, 0f
+	adrp	x0, __idmap_text_start
+	adr_l	x1, __idmap_text_end
+	sub	x1, x1, x0
+	bl	dcache_clean_poc
+	ic	ialluis
+0:
 	bl	init_kernel_el			// w0=cpu_boot_mode
 	mov	x20, x0
 
@@ -104,6 +117,7 @@ SYM_CODE_START(primary_entry)
 	b	__primary_switch
 SYM_CODE_END(primary_entry)
 
+	__INIT
 SYM_CODE_START_LOCAL(record_mmu_state)
 	mrs	x22, CurrentEL
 	cmp	x22, #CurrentEL_EL2
-- 
2.30.2


WARNING: multiple messages have this Message-ID (diff)
From: Ard Biesheuvel <ardb@kernel.org>
To: linux-efi@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org, keescook@chromium.org,
	mark.rutland@arm.com, catalin.marinas@arm.com,
	Ard Biesheuvel <ardb@kernel.org>
Subject: [RFC PATCH v2 14/18] arm64: head: clean the ID map page to the PoC
Date: Wed, 30 Mar 2022 17:42:01 +0200	[thread overview]
Message-ID: <20220330154205.2483167-15-ardb@kernel.org> (raw)
In-Reply-To: <20220330154205.2483167-1-ardb@kernel.org>

If we enter with the MMU and caches enabled, the caller may not have
performed any cache maintenance. So clean the ID mapped page to the PoC,
and invalidate the I-cache so we can safely execute from it after
disabling the MMU and caches.

Note that this means primary_entry() itself needs to be moved into the
ID map as well, as we will return from init_kernel_el() with the MMU and
caches off.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
 arch/arm64/kernel/head.S | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index ec57a29f3f43..2f1dcc0c7594 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -75,7 +75,7 @@
 
 	__EFI_PE_HEADER
 
-	__INIT
+	.section ".idmap.text","awx"
 
 	/*
 	 * The following callee saved general purpose registers are used on the
@@ -91,6 +91,19 @@ SYM_CODE_START(primary_entry)
 	bl	record_mmu_state
 	bl	preserve_boot_args
 	bl	create_idmap
+
+	/*
+	 * If we entered with the MMU and caches on, clean the ID mapped part
+	 * of the primary boot code to the PoC and invalidate it from the
+	 * I-cache so we can safely turn them off.
+	 */
+	cbz	x22, 0f
+	adrp	x0, __idmap_text_start
+	adr_l	x1, __idmap_text_end
+	sub	x1, x1, x0
+	bl	dcache_clean_poc
+	ic	ialluis
+0:
 	bl	init_kernel_el			// w0=cpu_boot_mode
 	mov	x20, x0
 
@@ -104,6 +117,7 @@ SYM_CODE_START(primary_entry)
 	b	__primary_switch
 SYM_CODE_END(primary_entry)
 
+	__INIT
 SYM_CODE_START_LOCAL(record_mmu_state)
 	mrs	x22, CurrentEL
 	cmp	x22, #CurrentEL_EL2
-- 
2.30.2


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  parent reply	other threads:[~2022-03-30 15:42 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-30 15:41 [RFC PATCH v2 00/18] arm64: efi: leave MMU and caches on at boot Ard Biesheuvel
2022-03-30 15:41 ` Ard Biesheuvel
2022-03-30 15:41 ` [RFC PATCH v2 01/18] arm64: head: drop idmap_ptrs_per_pgd Ard Biesheuvel
2022-03-30 15:41   ` Ard Biesheuvel
2022-03-30 15:41 ` [RFC PATCH v2 02/18] arm64: head: split off idmap creation code Ard Biesheuvel
2022-03-30 15:41   ` Ard Biesheuvel
2022-03-30 15:41 ` [RFC PATCH v2 03/18] arm64: kernel: drop unnecessary PoC cache clean+invalidate Ard Biesheuvel
2022-03-30 15:41   ` Ard Biesheuvel
2022-03-30 15:41 ` [RFC PATCH v2 04/18] arm64: head: cover entire kernel image in ID map Ard Biesheuvel
2022-03-30 15:41   ` Ard Biesheuvel
2022-03-30 15:41 ` [RFC PATCH v2 05/18] arm64: head: factor out TTBR1 assignment into a macro Ard Biesheuvel
2022-03-30 15:41   ` Ard Biesheuvel
2022-03-30 15:41 ` [RFC PATCH v2 06/18] arm64: head: populate kernel page tables with MMU and caches on Ard Biesheuvel
2022-03-30 15:41   ` Ard Biesheuvel
2022-03-30 15:41 ` [RFC PATCH v2 07/18] arm64: kaslr: deal with init called with VA randomization enabled Ard Biesheuvel
2022-03-30 15:41   ` Ard Biesheuvel
2022-03-30 15:41 ` [RFC PATCH v2 08/18] arm64: setup: defer R/O remapping of FDT Ard Biesheuvel
2022-03-30 15:41   ` Ard Biesheuvel
2022-03-30 15:41 ` [RFC PATCH v2 09/18] arm64: head: relocate kernel only a single time if KASLR is enabled Ard Biesheuvel
2022-03-30 15:41   ` Ard Biesheuvel
2022-03-30 15:41 ` [RFC PATCH v2 10/18] arm64: head: record the MMU state at primary entry Ard Biesheuvel
2022-03-30 15:41   ` Ard Biesheuvel
2022-03-30 15:41 ` [RFC PATCH v2 11/18] arm64: mm: make vabits_actual a build time constant if possible Ard Biesheuvel
2022-03-30 15:41   ` Ard Biesheuvel
2022-03-30 15:41 ` [RFC PATCH v2 12/18] arm64: head: avoid cache invalidation when entering with the MMU on Ard Biesheuvel
2022-03-30 15:41   ` Ard Biesheuvel
2022-03-30 15:42 ` [RFC PATCH v2 13/18] arm64: head: record CPU boot mode after enabling the MMU Ard Biesheuvel
2022-03-30 15:42   ` Ard Biesheuvel
2022-03-30 15:42 ` Ard Biesheuvel [this message]
2022-03-30 15:42   ` [RFC PATCH v2 14/18] arm64: head: clean the ID map page to the PoC Ard Biesheuvel
2022-03-30 15:42 ` [RFC PATCH v2 15/18] arm64: lds: move idmap_pg_dir out of .rodata Ard Biesheuvel
2022-03-30 15:42   ` Ard Biesheuvel
2022-03-30 15:42 ` [RFC PATCH v2 16/18] efi: libstub: pass image handle to handle_kernel_image() Ard Biesheuvel
2022-03-30 15:42   ` Ard Biesheuvel
2022-03-30 15:42 ` [RFC PATCH v2 17/18] efi/arm64: libstub: run image in place if randomized by the loader Ard Biesheuvel
2022-03-30 15:42   ` Ard Biesheuvel
2022-03-30 15:42 ` [RFC PATCH v2 18/18] arm64: efi/libstub: enter with the MMU on if executing in place Ard Biesheuvel
2022-03-30 15:42   ` Ard Biesheuvel
2022-03-31 15:37 ` [RFC PATCH v2 00/18] arm64: efi: leave MMU and caches on at boot Mark Rutland
2022-03-31 15:37   ` Mark Rutland
2022-03-31 16:20   ` Ard Biesheuvel
2022-03-31 16:20     ` Ard Biesheuvel

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