From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: linux-kernel@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
stable@vger.kernel.org, Will Deacon <will@kernel.org>,
Suzuki Poulose <suzuki.poulose@arm.com>,
linux-arm-kernel@lists.infradead.org,
Anshuman Khandual <anshuman.khandual@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
James Morse <james.morse@arm.com>
Subject: [PATCH 4.14 08/27] arm64: Add Cortex-X2 CPU part definition
Date: Fri, 1 Apr 2022 08:36:18 +0200 [thread overview]
Message-ID: <20220401063624.469866369@linuxfoundation.org> (raw)
In-Reply-To: <20220401063624.232282121@linuxfoundation.org>
From: Anshuman Khandual <anshuman.khandual@arm.com>
commit 72bb9dcb6c33cfac80282713c2b4f2b254cd24d1 upstream.
Add the CPU Partnumbers for the new Arm designs.
Cc: Will Deacon <will@kernel.org>
Cc: Suzuki Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1642994138-25887-2-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
arch/arm64/include/asm/cputype.h | 2 ++
1 file changed, 2 insertions(+)
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -91,6 +91,7 @@
#define ARM_CPU_PART_NEOVERSE_N1 0xD0C
#define ARM_CPU_PART_CORTEX_A77 0xD0D
#define ARM_CPU_PART_CORTEX_A710 0xD47
+#define ARM_CPU_PART_CORTEX_X2 0xD48
#define ARM_CPU_PART_NEOVERSE_N2 0xD49
#define APM_CPU_PART_POTENZA 0x000
@@ -121,6 +122,7 @@
#define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1)
#define MIDR_CORTEX_A77 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77)
#define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710)
+#define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
#define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2)
#define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
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WARNING: multiple messages have this Message-ID (diff)
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: linux-kernel@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
stable@vger.kernel.org, Will Deacon <will@kernel.org>,
Suzuki Poulose <suzuki.poulose@arm.com>,
linux-arm-kernel@lists.infradead.org,
Anshuman Khandual <anshuman.khandual@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
James Morse <james.morse@arm.com>
Subject: [PATCH 4.14 08/27] arm64: Add Cortex-X2 CPU part definition
Date: Fri, 1 Apr 2022 08:36:18 +0200 [thread overview]
Message-ID: <20220401063624.469866369@linuxfoundation.org> (raw)
In-Reply-To: <20220401063624.232282121@linuxfoundation.org>
From: Anshuman Khandual <anshuman.khandual@arm.com>
commit 72bb9dcb6c33cfac80282713c2b4f2b254cd24d1 upstream.
Add the CPU Partnumbers for the new Arm designs.
Cc: Will Deacon <will@kernel.org>
Cc: Suzuki Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1642994138-25887-2-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
arch/arm64/include/asm/cputype.h | 2 ++
1 file changed, 2 insertions(+)
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -91,6 +91,7 @@
#define ARM_CPU_PART_NEOVERSE_N1 0xD0C
#define ARM_CPU_PART_CORTEX_A77 0xD0D
#define ARM_CPU_PART_CORTEX_A710 0xD47
+#define ARM_CPU_PART_CORTEX_X2 0xD48
#define ARM_CPU_PART_NEOVERSE_N2 0xD49
#define APM_CPU_PART_POTENZA 0x000
@@ -121,6 +122,7 @@
#define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1)
#define MIDR_CORTEX_A77 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77)
#define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710)
+#define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
#define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2)
#define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
next prev parent reply other threads:[~2022-04-01 6:38 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-01 6:36 [PATCH 4.14 00/27] 4.14.275-rc1 review Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 01/27] arm64: arch_timer: Add workaround for ARM erratum 1188873 Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 02/27] arm64: arch_timer: avoid unused function warning Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 03/27] arm64: Add silicon-errata.txt entry for ARM erratum 1188873 Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 04/27] arm64: Make ARM64_ERRATUM_1188873 depend on COMPAT Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 05/27] arm64: Add part number for Neoverse N1 Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 06/27] arm64: Add part number for Arm Cortex-A77 Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 07/27] arm64: Add Neoverse-N2, Cortex-A710 CPU part definition Greg Kroah-Hartman
2022-04-01 6:36 ` Greg Kroah-Hartman [this message]
2022-04-01 6:36 ` [PATCH 4.14 08/27] arm64: Add Cortex-X2 " Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 09/27] arm64: entry.S: Add ventry overflow sanity checks Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 10/27] arm64: entry: Make the trampoline cleanup optional Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 11/27] arm64: entry: Free up another register on kptis tramp_exit path Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 12/27] arm64: entry: Move the trampoline data page before the text page Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 13/27] arm64: entry: Allow tramp_alias to access symbols after the 4K boundary Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 14/27] arm64: entry: Dont assume tramp_vectors is the start of the vectors Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 15/27] arm64: entry: Move trampoline macros out of ifdefd section Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 16/27] arm64: entry: Make the kpti trampolines kpti sequence optional Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 17/27] arm64: entry: Allow the trampoline text to occupy multiple pages Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 18/27] arm64: entry: Add non-kpti __bp_harden_el1_vectors for mitigations Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 19/27] arm64: entry: Add vectors that have the bhb mitigation sequences Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 20/27] arm64: entry: Add macro for reading symbol addresses from the trampoline Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 21/27] arm64: Add percpu vectors for EL1 Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 22/27] arm64: proton-pack: Report Spectre-BHB vulnerabilities as part of Spectre-v2 Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 23/27] KVM: arm64: Add templates for BHB mitigation sequences Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 24/27] arm64: Mitigate spectre style branch history side channels Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 25/27] KVM: arm64: Allow SMCCC_ARCH_WORKAROUND_3 to be discovered and migrated Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 26/27] arm64: add ID_AA64ISAR2_EL1 sys register Greg Kroah-Hartman
2022-04-01 6:36 ` [PATCH 4.14 27/27] arm64: Use the clearbhb instruction in mitigations Greg Kroah-Hartman
2022-04-01 10:43 ` [PATCH 4.14 00/27] 4.14.275-rc1 review Guenter Roeck
2022-04-01 18:26 ` Naresh Kamboju
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