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From: Shawn Guo <shawnguo@kernel.org>
To: Tim Harvey <tharvey@gateworks.com>
Cc: Rob Herring <robh+dt@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	Device Tree Mailing List <devicetree@vger.kernel.org>,
	Linux ARM Mailing List <linux-arm-kernel@lists.infradead.org>,
	open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] imx8mm-venice-gw7902: update pci refclk
Date: Mon, 18 Apr 2022 15:57:18 +0800	[thread overview]
Message-ID: <20220418075718.GB391514@dragon> (raw)
In-Reply-To: <CAJ+vNU0VVpDGDXivz=r8C4U8dYjA08SqnzPXwmtOv4ujvc3=Zg@mail.gmail.com>

On Mon, Apr 11, 2022 at 12:44:23PM -0700, Tim Harvey wrote:
> On Sun, Apr 10, 2022 at 6:31 PM Shawn Guo <shawnguo@kernel.org> wrote:
> >
> > On Tue, Apr 05, 2022 at 01:06:25PM -0700, Tim Harvey wrote:
> > > Use the correct PCI clock bindings.
> >
> > Please improve the commit log to explain why clock "pcie_phy" can be
> > dropped.
> >
> 
> Shawn,
> 
> The original PCIe bindings for this board were wrong - they were from
> a version of the bindings that was not yet approved (my mistake) and
> I'm just trying to bring them up to date.
> 
> That said, I looked at the latest fsl,imx6q-pcie.yaml dt-bindings [1]
> and see that there should be a min of 3 clocks called 'pcie',
> 'pcie_bus', and 'pcie_phy'. However I notice that all of the current
> imx8mm boards that enable PCI have clock-names of 'pcie', 'pcie_aux',
> and 'pcie_bus'. It seems like all the imx8mm boards having pcie have
> clock-names this way:
> 
> arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
> arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
> 
> Does the binding need to change or do the clock names need to change
> in the above?

If the bindings is approved/correct, device tree should match bindings.

Shawn

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WARNING: multiple messages have this Message-ID (diff)
From: Shawn Guo <shawnguo@kernel.org>
To: Tim Harvey <tharvey@gateworks.com>
Cc: Rob Herring <robh+dt@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	Device Tree Mailing List <devicetree@vger.kernel.org>,
	Linux ARM Mailing List <linux-arm-kernel@lists.infradead.org>,
	open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] imx8mm-venice-gw7902: update pci refclk
Date: Mon, 18 Apr 2022 15:57:18 +0800	[thread overview]
Message-ID: <20220418075718.GB391514@dragon> (raw)
In-Reply-To: <CAJ+vNU0VVpDGDXivz=r8C4U8dYjA08SqnzPXwmtOv4ujvc3=Zg@mail.gmail.com>

On Mon, Apr 11, 2022 at 12:44:23PM -0700, Tim Harvey wrote:
> On Sun, Apr 10, 2022 at 6:31 PM Shawn Guo <shawnguo@kernel.org> wrote:
> >
> > On Tue, Apr 05, 2022 at 01:06:25PM -0700, Tim Harvey wrote:
> > > Use the correct PCI clock bindings.
> >
> > Please improve the commit log to explain why clock "pcie_phy" can be
> > dropped.
> >
> 
> Shawn,
> 
> The original PCIe bindings for this board were wrong - they were from
> a version of the bindings that was not yet approved (my mistake) and
> I'm just trying to bring them up to date.
> 
> That said, I looked at the latest fsl,imx6q-pcie.yaml dt-bindings [1]
> and see that there should be a min of 3 clocks called 'pcie',
> 'pcie_bus', and 'pcie_phy'. However I notice that all of the current
> imx8mm boards that enable PCI have clock-names of 'pcie', 'pcie_aux',
> and 'pcie_bus'. It seems like all the imx8mm boards having pcie have
> clock-names this way:
> 
> arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
> arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
> 
> Does the binding need to change or do the clock names need to change
> in the above?

If the bindings is approved/correct, device tree should match bindings.

Shawn

  reply	other threads:[~2022-04-18  7:58 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-05 20:06 [PATCH] imx8mm-venice-gw7902: update pci refclk Tim Harvey
2022-04-05 20:06 ` Tim Harvey
2022-04-11  1:31 ` Shawn Guo
2022-04-11  1:31   ` Shawn Guo
2022-04-11 19:44   ` Tim Harvey
2022-04-11 19:44     ` Tim Harvey
2022-04-18  7:57     ` Shawn Guo [this message]
2022-04-18  7:57       ` Shawn Guo
2022-04-29 16:04       ` Tim Harvey
2022-04-29 16:04         ` Tim Harvey

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