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From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Qing Wang <wangqing@vivo.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	 Sudeep Holla <sudeep.holla@arm.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <vincent.guittot@linaro.org>,
	<dietmar.eggemann@arm.com>
Subject: Re: [PATCH V2 0/2] Add complex scheduler level for arm64
Date: Mon, 25 Apr 2022 14:19:26 +0100	[thread overview]
Message-ID: <20220425141926.00004d2e@Huawei.com> (raw)
In-Reply-To: <1650628289-67716-1-git-send-email-wangqing@vivo.com>

On Fri, 22 Apr 2022 04:51:24 -0700
Qing Wang <wangqing@vivo.com> wrote:

> From: Wang Qing <wangqing@vivo.com>
> 
> The DSU cluster supports blocks that are called complexes
> which contain up to two cores of the same type and some shared logic,
> which sharing some logic between the cores can make a complex area efficient.
>

Given the complex shares things like the SVE units (cortex a510)...

Why not handle this as SMT?

Seems like a blurred boundary between separate cores and SMT threads.
I think we need to express and potentially take advantage of knowledge
about what logic is being shared.

Jonathan

 
> Complex also can be considered as a shared cache group smaller
> than cluster.
> 
> This patch adds complex level for complexs by parsing cache topology
> form DT. It will directly benefit a lot of workload which loves more
> resources such as memory bandwidth, caches.
> 
> Note this patch only handle the DT case.
> 
> V2:
> fix commit log and loop more
> 
> wangqing (2):
>   arch_topology: support for describing cache topology from DT
>   arm64: Add complex scheduler level for arm64
> 
>  arch/arm64/Kconfig            | 13 ++++++++++
>  arch/arm64/kernel/smp.c       | 48 ++++++++++++++++++++++++++++++++++-
>  drivers/base/arch_topology.c  | 47 +++++++++++++++++++++++++++++++++-
>  include/linux/arch_topology.h |  3 +++
>  4 files changed, 109 insertions(+), 2 deletions(-)
> 


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WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Qing Wang <wangqing@vivo.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Sudeep Holla <sudeep.holla@arm.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <vincent.guittot@linaro.org>,
	<dietmar.eggemann@arm.com>
Subject: Re: [PATCH V2 0/2] Add complex scheduler level for arm64
Date: Mon, 25 Apr 2022 14:19:26 +0100	[thread overview]
Message-ID: <20220425141926.00004d2e@Huawei.com> (raw)
In-Reply-To: <1650628289-67716-1-git-send-email-wangqing@vivo.com>

On Fri, 22 Apr 2022 04:51:24 -0700
Qing Wang <wangqing@vivo.com> wrote:

> From: Wang Qing <wangqing@vivo.com>
> 
> The DSU cluster supports blocks that are called complexes
> which contain up to two cores of the same type and some shared logic,
> which sharing some logic between the cores can make a complex area efficient.
>

Given the complex shares things like the SVE units (cortex a510)...

Why not handle this as SMT?

Seems like a blurred boundary between separate cores and SMT threads.
I think we need to express and potentially take advantage of knowledge
about what logic is being shared.

Jonathan

 
> Complex also can be considered as a shared cache group smaller
> than cluster.
> 
> This patch adds complex level for complexs by parsing cache topology
> form DT. It will directly benefit a lot of workload which loves more
> resources such as memory bandwidth, caches.
> 
> Note this patch only handle the DT case.
> 
> V2:
> fix commit log and loop more
> 
> wangqing (2):
>   arch_topology: support for describing cache topology from DT
>   arm64: Add complex scheduler level for arm64
> 
>  arch/arm64/Kconfig            | 13 ++++++++++
>  arch/arm64/kernel/smp.c       | 48 ++++++++++++++++++++++++++++++++++-
>  drivers/base/arch_topology.c  | 47 +++++++++++++++++++++++++++++++++-
>  include/linux/arch_topology.h |  3 +++
>  4 files changed, 109 insertions(+), 2 deletions(-)
> 


  parent reply	other threads:[~2022-04-25 13:20 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-22 11:51 [PATCH V2 0/2] Add complex scheduler level for arm64 Qing Wang
2022-04-22 11:51 ` Qing Wang
2022-04-22 11:51 ` [PATCH V2 1/2] arch_topology: support for parsing cache topology from DT Qing Wang
2022-04-22 11:51   ` Qing Wang
2022-04-22 12:30   ` Greg Kroah-Hartman
2022-04-22 12:30     ` Greg Kroah-Hartman
2022-04-24  2:53     ` [PATCH V2 RESEND " 王擎
2022-04-24  2:53       ` 王擎
2022-04-22 11:51 ` [PATCH V2 2/2] arm64: Add complex scheduler level for arm64 Qing Wang
2022-04-22 11:51   ` Qing Wang
2022-04-22 12:31   ` Greg Kroah-Hartman
2022-04-22 12:31     ` Greg Kroah-Hartman
2022-04-24  2:26     ` 王擎
2022-04-24  2:26       ` 王擎
2022-04-26 18:15   ` kernel test robot
2022-04-26 18:15     ` kernel test robot
2022-04-25 13:19 ` Jonathan Cameron [this message]
2022-04-25 13:19   ` [PATCH V2 0/2] " Jonathan Cameron
2022-04-26  3:06   ` 王擎
2022-04-26  3:06     ` 王擎
2022-04-26  7:05     ` 王擎
2022-04-26  7:05       ` 王擎
2022-04-26 13:27       ` Sudeep Holla
2022-04-26 13:27         ` Sudeep Holla

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