* [PATCH] KVM: arm64: Handle host stage-2 faults from 32-bit EL0
@ 2022-04-27 17:13 ` Will Deacon
0 siblings, 0 replies; 4+ messages in thread
From: Will Deacon @ 2022-04-27 17:13 UTC (permalink / raw)
To: kvmarm; +Cc: Marc Zyngier, Will Deacon, linux-arm-kernel
When pKVM is enabled, host memory accesses are translated by an identity
mapping at stage-2, which is populated lazily in response to synchronous
exceptions from 64-bit EL1 and EL0.
Extend this handling to cover exceptions originating from 32-bit EL0 as
well. Although these are very unlikely to occur in practice, as the
kernel typically ensures that user pages are initialised before mapping
them in, drivers could still map previously untouched device pages into
userspace and expect things to work rather than panic the system.
Cc: Quentin Perret <qperret@google.com>
Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/kvm/hyp/nvhe/host.S | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/kvm/hyp/nvhe/host.S b/arch/arm64/kvm/hyp/nvhe/host.S
index 3d613e721a75..727c979b2b69 100644
--- a/arch/arm64/kvm/hyp/nvhe/host.S
+++ b/arch/arm64/kvm/hyp/nvhe/host.S
@@ -198,15 +198,15 @@ SYM_CODE_START(__kvm_hyp_host_vector)
invalid_host_el2_vect // FIQ EL2h
invalid_host_el2_vect // Error EL2h
- host_el1_sync_vect // Synchronous 64-bit EL1
- invalid_host_el1_vect // IRQ 64-bit EL1
- invalid_host_el1_vect // FIQ 64-bit EL1
- invalid_host_el1_vect // Error 64-bit EL1
-
- invalid_host_el1_vect // Synchronous 32-bit EL1
- invalid_host_el1_vect // IRQ 32-bit EL1
- invalid_host_el1_vect // FIQ 32-bit EL1
- invalid_host_el1_vect // Error 32-bit EL1
+ host_el1_sync_vect // Synchronous 64-bit EL1/EL0
+ invalid_host_el1_vect // IRQ 64-bit EL1/EL0
+ invalid_host_el1_vect // FIQ 64-bit EL1/EL0
+ invalid_host_el1_vect // Error 64-bit EL1/EL0
+
+ host_el1_sync_vect // Synchronous 32-bit EL1/EL0
+ invalid_host_el1_vect // IRQ 32-bit EL1/EL0
+ invalid_host_el1_vect // FIQ 32-bit EL1/EL0
+ invalid_host_el1_vect // Error 32-bit EL1/EL0
SYM_CODE_END(__kvm_hyp_host_vector)
/*
--
2.36.0.rc2.479.g8af0fa9b8e-goog
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH] KVM: arm64: Handle host stage-2 faults from 32-bit EL0
@ 2022-04-27 17:13 ` Will Deacon
0 siblings, 0 replies; 4+ messages in thread
From: Will Deacon @ 2022-04-27 17:13 UTC (permalink / raw)
To: kvmarm; +Cc: linux-arm-kernel, Will Deacon, Quentin Perret, Marc Zyngier
When pKVM is enabled, host memory accesses are translated by an identity
mapping at stage-2, which is populated lazily in response to synchronous
exceptions from 64-bit EL1 and EL0.
Extend this handling to cover exceptions originating from 32-bit EL0 as
well. Although these are very unlikely to occur in practice, as the
kernel typically ensures that user pages are initialised before mapping
them in, drivers could still map previously untouched device pages into
userspace and expect things to work rather than panic the system.
Cc: Quentin Perret <qperret@google.com>
Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/kvm/hyp/nvhe/host.S | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/kvm/hyp/nvhe/host.S b/arch/arm64/kvm/hyp/nvhe/host.S
index 3d613e721a75..727c979b2b69 100644
--- a/arch/arm64/kvm/hyp/nvhe/host.S
+++ b/arch/arm64/kvm/hyp/nvhe/host.S
@@ -198,15 +198,15 @@ SYM_CODE_START(__kvm_hyp_host_vector)
invalid_host_el2_vect // FIQ EL2h
invalid_host_el2_vect // Error EL2h
- host_el1_sync_vect // Synchronous 64-bit EL1
- invalid_host_el1_vect // IRQ 64-bit EL1
- invalid_host_el1_vect // FIQ 64-bit EL1
- invalid_host_el1_vect // Error 64-bit EL1
-
- invalid_host_el1_vect // Synchronous 32-bit EL1
- invalid_host_el1_vect // IRQ 32-bit EL1
- invalid_host_el1_vect // FIQ 32-bit EL1
- invalid_host_el1_vect // Error 32-bit EL1
+ host_el1_sync_vect // Synchronous 64-bit EL1/EL0
+ invalid_host_el1_vect // IRQ 64-bit EL1/EL0
+ invalid_host_el1_vect // FIQ 64-bit EL1/EL0
+ invalid_host_el1_vect // Error 64-bit EL1/EL0
+
+ host_el1_sync_vect // Synchronous 32-bit EL1/EL0
+ invalid_host_el1_vect // IRQ 32-bit EL1/EL0
+ invalid_host_el1_vect // FIQ 32-bit EL1/EL0
+ invalid_host_el1_vect // Error 32-bit EL1/EL0
SYM_CODE_END(__kvm_hyp_host_vector)
/*
--
2.36.0.rc2.479.g8af0fa9b8e-goog
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] KVM: arm64: Handle host stage-2 faults from 32-bit EL0
2022-04-27 17:13 ` Will Deacon
@ 2022-04-28 19:59 ` Marc Zyngier
-1 siblings, 0 replies; 4+ messages in thread
From: Marc Zyngier @ 2022-04-28 19:59 UTC (permalink / raw)
To: kvmarm, Will Deacon; +Cc: linux-arm-kernel
On Wed, 27 Apr 2022 18:13:32 +0100, Will Deacon wrote:
> When pKVM is enabled, host memory accesses are translated by an identity
> mapping at stage-2, which is populated lazily in response to synchronous
> exceptions from 64-bit EL1 and EL0.
>
> Extend this handling to cover exceptions originating from 32-bit EL0 as
> well. Although these are very unlikely to occur in practice, as the
> kernel typically ensures that user pages are initialised before mapping
> them in, drivers could still map previously untouched device pages into
> userspace and expect things to work rather than panic the system.
Applied to fixes, thanks!
[1/1] KVM: arm64: Handle host stage-2 faults from 32-bit EL0
commit: 2a50fc5fd09798cc154b587acd4f4ee261ea19be
Cheers,
M.
--
Without deviation from the norm, progress is not possible.
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] KVM: arm64: Handle host stage-2 faults from 32-bit EL0
@ 2022-04-28 19:59 ` Marc Zyngier
0 siblings, 0 replies; 4+ messages in thread
From: Marc Zyngier @ 2022-04-28 19:59 UTC (permalink / raw)
To: kvmarm, Will Deacon; +Cc: linux-arm-kernel
On Wed, 27 Apr 2022 18:13:32 +0100, Will Deacon wrote:
> When pKVM is enabled, host memory accesses are translated by an identity
> mapping at stage-2, which is populated lazily in response to synchronous
> exceptions from 64-bit EL1 and EL0.
>
> Extend this handling to cover exceptions originating from 32-bit EL0 as
> well. Although these are very unlikely to occur in practice, as the
> kernel typically ensures that user pages are initialised before mapping
> them in, drivers could still map previously untouched device pages into
> userspace and expect things to work rather than panic the system.
Applied to fixes, thanks!
[1/1] KVM: arm64: Handle host stage-2 faults from 32-bit EL0
commit: 2a50fc5fd09798cc154b587acd4f4ee261ea19be
Cheers,
M.
--
Without deviation from the norm, progress is not possible.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-04-28 20:00 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2022-04-27 17:13 [PATCH] KVM: arm64: Handle host stage-2 faults from 32-bit EL0 Will Deacon
2022-04-27 17:13 ` Will Deacon
2022-04-28 19:59 ` Marc Zyngier
2022-04-28 19:59 ` Marc Zyngier
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