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From: Matthew Auld <matthew.auld@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: intel-gfx@lists.freedesktop.org
Subject: [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_workarounds: handle discrete
Date: Wed,  4 May 2022 16:08:45 +0100	[thread overview]
Message-ID: <20220504150845.158789-2-matthew.auld@intel.com> (raw)
In-Reply-To: <20220504150845.158789-1-matthew.auld@intel.com>

On discrete the object should already be using I915_CACHING_CACHED, by
default, for system memory objects, although we can no longer explicitly
control the PTE caching bits.

References: https://gitlab.freedesktop.org/drm/intel/-/issues/4873
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Nirmoy Das <nirmoy.das@linux.intel.com>
---
 tests/i915/gem_workarounds.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tests/i915/gem_workarounds.c b/tests/i915/gem_workarounds.c
index 3d185127..70967b3f 100644
--- a/tests/i915/gem_workarounds.c
+++ b/tests/i915/gem_workarounds.c
@@ -107,7 +107,8 @@ static int workaround_fail_count(int i915, const intel_ctx_t *ctx)
 
 	memset(obj, 0, sizeof(obj));
 	obj[0].handle = gem_create(i915, result_sz);
-	gem_set_caching(i915, obj[0].handle, I915_CACHING_CACHED);
+	if (!gem_has_lmem(i915))
+		gem_set_caching(i915, obj[0].handle, I915_CACHING_CACHED);
 	obj[1].handle = gem_create(i915, batch_sz);
 	obj[1].relocs_ptr = to_user_pointer(reloc);
 	obj[1].relocation_count = !ahnd ? num_wa_regs : 0;
-- 
2.34.1

WARNING: multiple messages have this Message-ID (diff)
From: Matthew Auld <matthew.auld@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH i-g-t 2/2] tests/i915/gem_workarounds: handle discrete
Date: Wed,  4 May 2022 16:08:45 +0100	[thread overview]
Message-ID: <20220504150845.158789-2-matthew.auld@intel.com> (raw)
In-Reply-To: <20220504150845.158789-1-matthew.auld@intel.com>

On discrete the object should already be using I915_CACHING_CACHED, by
default, for system memory objects, although we can no longer explicitly
control the PTE caching bits.

References: https://gitlab.freedesktop.org/drm/intel/-/issues/4873
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Nirmoy Das <nirmoy.das@linux.intel.com>
---
 tests/i915/gem_workarounds.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tests/i915/gem_workarounds.c b/tests/i915/gem_workarounds.c
index 3d185127..70967b3f 100644
--- a/tests/i915/gem_workarounds.c
+++ b/tests/i915/gem_workarounds.c
@@ -107,7 +107,8 @@ static int workaround_fail_count(int i915, const intel_ctx_t *ctx)
 
 	memset(obj, 0, sizeof(obj));
 	obj[0].handle = gem_create(i915, result_sz);
-	gem_set_caching(i915, obj[0].handle, I915_CACHING_CACHED);
+	if (!gem_has_lmem(i915))
+		gem_set_caching(i915, obj[0].handle, I915_CACHING_CACHED);
 	obj[1].handle = gem_create(i915, batch_sz);
 	obj[1].relocs_ptr = to_user_pointer(reloc);
 	obj[1].relocation_count = !ahnd ? num_wa_regs : 0;
-- 
2.34.1


  reply	other threads:[~2022-05-04 15:08 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-04 15:08 [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_caching: handle discrete Matthew Auld
2022-05-04 15:08 ` [Intel-gfx] " Matthew Auld
2022-05-04 15:08 ` Matthew Auld [this message]
2022-05-04 15:08   ` [Intel-gfx] [PATCH i-g-t 2/2] tests/i915/gem_workarounds: " Matthew Auld
2022-05-04 15:22 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_caching: " Das, Nirmoy
2022-05-04 15:22   ` [Intel-gfx] " Das, Nirmoy
2022-05-04 17:01 ` [igt-dev] ✗ Fi.CI.BAT: failure for series starting with [i-g-t,1/2] " Patchwork
2022-05-05 11:22   ` Matthew Auld
2022-05-05 15:45     ` Vudum, Lakshminarayana
2022-05-05 15:39 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
2022-05-05 17:12 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork

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