From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: p.zabel@pengutronix.de, l.stach@pengutronix.de,
bhelgaas@google.com, robh@kernel.org, shawnguo@kernel.org,
vkoul@kernel.org, alexander.stein@ew.tq-group.com,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@pengutronix.de,
linux-imx@nxp.com
Subject: Re: [PATCH v2 7/7] PCI: imx6: Add the iMX8MP PCIe support
Date: Thu, 12 May 2022 17:08:45 +0100 [thread overview]
Message-ID: <20220512160845.GB2506@lpieralisi> (raw)
In-Reply-To: <1646644054-24421-8-git-send-email-hongxing.zhu@nxp.com>
On Mon, Mar 07, 2022 at 05:07:34PM +0800, Richard Zhu wrote:
> Add the i.MX8MP PCIe support.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 19 ++++++++++++++++++-
> 1 file changed, 18 insertions(+), 1 deletion(-)
I expect this series will eventually go via the imx6 platform tree.
To avoid you waiting for me when this series is deemed acceptable:
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
I will mark it as "handled elsewhere" in the PCI tree patchwork.
Lorenzo
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index bb662f90d4f3..4d34f0c88550 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -51,6 +51,7 @@ enum imx6_pcie_variants {
> IMX7D,
> IMX8MQ,
> IMX8MM,
> + IMX8MP,
> };
>
> #define IMX6_PCIE_FLAG_IMX6_PHY BIT(0)
> @@ -379,6 +380,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
> reset_control_assert(imx6_pcie->pciephy_reset);
> fallthrough;
> case IMX8MM:
> + case IMX8MP:
> reset_control_assert(imx6_pcie->apps_reset);
> break;
> case IMX6SX:
> @@ -407,7 +409,8 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
> static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie)
> {
> WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ &&
> - imx6_pcie->drvdata->variant != IMX8MM);
> + imx6_pcie->drvdata->variant != IMX8MM &&
> + imx6_pcie->drvdata->variant != IMX8MP);
> return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14;
> }
>
> @@ -448,6 +451,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
> break;
> case IMX8MM:
> case IMX8MQ:
> + case IMX8MP:
> ret = clk_prepare_enable(imx6_pcie->pcie_aux);
> if (ret) {
> dev_err(dev, "unable to enable pcie_aux clock\n");
> @@ -503,6 +507,7 @@ static int imx6_pcie_clk_enable(struct imx6_pcie *imx6_pcie)
>
> switch (imx6_pcie->drvdata->variant) {
> case IMX8MM:
> + case IMX8MP:
> if (phy_power_on(imx6_pcie->phy))
> dev_err(dev, "unable to power on PHY\n");
> break;
> @@ -603,6 +608,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
> reset_control_deassert(imx6_pcie->pciephy_reset);
> break;
> case IMX8MM:
> + case IMX8MP:
> if (phy_init(imx6_pcie->phy))
> dev_err(dev, "waiting for phy ready timeout!\n");
> break;
> @@ -678,6 +684,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
> {
> switch (imx6_pcie->drvdata->variant) {
> case IMX8MM:
> + case IMX8MP:
> /*
> * The PHY initialization had been done in the PHY
> * driver, break here directly.
> @@ -823,6 +830,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev)
> case IMX7D:
> case IMX8MQ:
> case IMX8MM:
> + case IMX8MP:
> reset_control_deassert(imx6_pcie->apps_reset);
> break;
> }
> @@ -938,6 +946,7 @@ static void imx6_pcie_host_exit(struct pcie_port *pp)
> imx6_pcie_clk_disable(imx6_pcie);
> switch (imx6_pcie->drvdata->variant) {
> case IMX8MM:
> + case IMX8MP:
> if (phy_power_off(imx6_pcie->phy))
> dev_err(dev, "unable to power off phy\n");
> phy_exit(imx6_pcie->phy);
> @@ -972,6 +981,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev)
> break;
> case IMX7D:
> case IMX8MM:
> + case IMX8MP:
> reset_control_assert(imx6_pcie->apps_reset);
> break;
> default:
> @@ -1028,6 +1038,7 @@ static int imx6_pcie_suspend_noirq(struct device *dev)
> imx6_pcie_clk_disable(imx6_pcie);
> switch (imx6_pcie->drvdata->variant) {
> case IMX8MM:
> + case IMX8MP:
> if (phy_power_off(imx6_pcie->phy))
> dev_err(dev, "unable to power off PHY\n");
> phy_exit(imx6_pcie->phy);
> @@ -1177,6 +1188,7 @@ static int imx6_pcie_probe(struct platform_device *pdev)
> }
> break;
> case IMX8MM:
> + case IMX8MP:
> imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux");
> if (IS_ERR(imx6_pcie->pcie_aux))
> return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_aux),
> @@ -1327,6 +1339,10 @@ static const struct imx6_pcie_drvdata drvdata[] = {
> .variant = IMX8MM,
> .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,
> },
> + [IMX8MP] = {
> + .variant = IMX8MP,
> + .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,
> + },
> };
>
> static const struct of_device_id imx6_pcie_of_match[] = {
> @@ -1336,6 +1352,7 @@ static const struct of_device_id imx6_pcie_of_match[] = {
> { .compatible = "fsl,imx7d-pcie", .data = &drvdata[IMX7D], },
> { .compatible = "fsl,imx8mq-pcie", .data = &drvdata[IMX8MQ], },
> { .compatible = "fsl,imx8mm-pcie", .data = &drvdata[IMX8MM], },
> + { .compatible = "fsl,imx8mp-pcie", .data = &drvdata[IMX8MP], },
> {},
> };
>
> --
> 2.25.1
>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: p.zabel@pengutronix.de, l.stach@pengutronix.de,
bhelgaas@google.com, robh@kernel.org, shawnguo@kernel.org,
vkoul@kernel.org, alexander.stein@ew.tq-group.com,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@pengutronix.de,
linux-imx@nxp.com
Subject: Re: [PATCH v2 7/7] PCI: imx6: Add the iMX8MP PCIe support
Date: Thu, 12 May 2022 17:08:45 +0100 [thread overview]
Message-ID: <20220512160845.GB2506@lpieralisi> (raw)
In-Reply-To: <1646644054-24421-8-git-send-email-hongxing.zhu@nxp.com>
On Mon, Mar 07, 2022 at 05:07:34PM +0800, Richard Zhu wrote:
> Add the i.MX8MP PCIe support.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 19 ++++++++++++++++++-
> 1 file changed, 18 insertions(+), 1 deletion(-)
I expect this series will eventually go via the imx6 platform tree.
To avoid you waiting for me when this series is deemed acceptable:
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
I will mark it as "handled elsewhere" in the PCI tree patchwork.
Lorenzo
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index bb662f90d4f3..4d34f0c88550 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -51,6 +51,7 @@ enum imx6_pcie_variants {
> IMX7D,
> IMX8MQ,
> IMX8MM,
> + IMX8MP,
> };
>
> #define IMX6_PCIE_FLAG_IMX6_PHY BIT(0)
> @@ -379,6 +380,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
> reset_control_assert(imx6_pcie->pciephy_reset);
> fallthrough;
> case IMX8MM:
> + case IMX8MP:
> reset_control_assert(imx6_pcie->apps_reset);
> break;
> case IMX6SX:
> @@ -407,7 +409,8 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
> static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie)
> {
> WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ &&
> - imx6_pcie->drvdata->variant != IMX8MM);
> + imx6_pcie->drvdata->variant != IMX8MM &&
> + imx6_pcie->drvdata->variant != IMX8MP);
> return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14;
> }
>
> @@ -448,6 +451,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
> break;
> case IMX8MM:
> case IMX8MQ:
> + case IMX8MP:
> ret = clk_prepare_enable(imx6_pcie->pcie_aux);
> if (ret) {
> dev_err(dev, "unable to enable pcie_aux clock\n");
> @@ -503,6 +507,7 @@ static int imx6_pcie_clk_enable(struct imx6_pcie *imx6_pcie)
>
> switch (imx6_pcie->drvdata->variant) {
> case IMX8MM:
> + case IMX8MP:
> if (phy_power_on(imx6_pcie->phy))
> dev_err(dev, "unable to power on PHY\n");
> break;
> @@ -603,6 +608,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
> reset_control_deassert(imx6_pcie->pciephy_reset);
> break;
> case IMX8MM:
> + case IMX8MP:
> if (phy_init(imx6_pcie->phy))
> dev_err(dev, "waiting for phy ready timeout!\n");
> break;
> @@ -678,6 +684,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
> {
> switch (imx6_pcie->drvdata->variant) {
> case IMX8MM:
> + case IMX8MP:
> /*
> * The PHY initialization had been done in the PHY
> * driver, break here directly.
> @@ -823,6 +830,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev)
> case IMX7D:
> case IMX8MQ:
> case IMX8MM:
> + case IMX8MP:
> reset_control_deassert(imx6_pcie->apps_reset);
> break;
> }
> @@ -938,6 +946,7 @@ static void imx6_pcie_host_exit(struct pcie_port *pp)
> imx6_pcie_clk_disable(imx6_pcie);
> switch (imx6_pcie->drvdata->variant) {
> case IMX8MM:
> + case IMX8MP:
> if (phy_power_off(imx6_pcie->phy))
> dev_err(dev, "unable to power off phy\n");
> phy_exit(imx6_pcie->phy);
> @@ -972,6 +981,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev)
> break;
> case IMX7D:
> case IMX8MM:
> + case IMX8MP:
> reset_control_assert(imx6_pcie->apps_reset);
> break;
> default:
> @@ -1028,6 +1038,7 @@ static int imx6_pcie_suspend_noirq(struct device *dev)
> imx6_pcie_clk_disable(imx6_pcie);
> switch (imx6_pcie->drvdata->variant) {
> case IMX8MM:
> + case IMX8MP:
> if (phy_power_off(imx6_pcie->phy))
> dev_err(dev, "unable to power off PHY\n");
> phy_exit(imx6_pcie->phy);
> @@ -1177,6 +1188,7 @@ static int imx6_pcie_probe(struct platform_device *pdev)
> }
> break;
> case IMX8MM:
> + case IMX8MP:
> imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux");
> if (IS_ERR(imx6_pcie->pcie_aux))
> return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_aux),
> @@ -1327,6 +1339,10 @@ static const struct imx6_pcie_drvdata drvdata[] = {
> .variant = IMX8MM,
> .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,
> },
> + [IMX8MP] = {
> + .variant = IMX8MP,
> + .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,
> + },
> };
>
> static const struct of_device_id imx6_pcie_of_match[] = {
> @@ -1336,6 +1352,7 @@ static const struct of_device_id imx6_pcie_of_match[] = {
> { .compatible = "fsl,imx7d-pcie", .data = &drvdata[IMX7D], },
> { .compatible = "fsl,imx8mq-pcie", .data = &drvdata[IMX8MQ], },
> { .compatible = "fsl,imx8mm-pcie", .data = &drvdata[IMX8MM], },
> + { .compatible = "fsl,imx8mp-pcie", .data = &drvdata[IMX8MP], },
> {},
> };
>
> --
> 2.25.1
>
WARNING: multiple messages have this Message-ID (diff)
From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: p.zabel@pengutronix.de, l.stach@pengutronix.de,
bhelgaas@google.com, robh@kernel.org, shawnguo@kernel.org,
vkoul@kernel.org, alexander.stein@ew.tq-group.com,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@pengutronix.de,
linux-imx@nxp.com
Subject: Re: [PATCH v2 7/7] PCI: imx6: Add the iMX8MP PCIe support
Date: Thu, 12 May 2022 17:08:45 +0100 [thread overview]
Message-ID: <20220512160845.GB2506@lpieralisi> (raw)
In-Reply-To: <1646644054-24421-8-git-send-email-hongxing.zhu@nxp.com>
On Mon, Mar 07, 2022 at 05:07:34PM +0800, Richard Zhu wrote:
> Add the i.MX8MP PCIe support.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 19 ++++++++++++++++++-
> 1 file changed, 18 insertions(+), 1 deletion(-)
I expect this series will eventually go via the imx6 platform tree.
To avoid you waiting for me when this series is deemed acceptable:
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
I will mark it as "handled elsewhere" in the PCI tree patchwork.
Lorenzo
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index bb662f90d4f3..4d34f0c88550 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -51,6 +51,7 @@ enum imx6_pcie_variants {
> IMX7D,
> IMX8MQ,
> IMX8MM,
> + IMX8MP,
> };
>
> #define IMX6_PCIE_FLAG_IMX6_PHY BIT(0)
> @@ -379,6 +380,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
> reset_control_assert(imx6_pcie->pciephy_reset);
> fallthrough;
> case IMX8MM:
> + case IMX8MP:
> reset_control_assert(imx6_pcie->apps_reset);
> break;
> case IMX6SX:
> @@ -407,7 +409,8 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
> static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie)
> {
> WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ &&
> - imx6_pcie->drvdata->variant != IMX8MM);
> + imx6_pcie->drvdata->variant != IMX8MM &&
> + imx6_pcie->drvdata->variant != IMX8MP);
> return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14;
> }
>
> @@ -448,6 +451,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
> break;
> case IMX8MM:
> case IMX8MQ:
> + case IMX8MP:
> ret = clk_prepare_enable(imx6_pcie->pcie_aux);
> if (ret) {
> dev_err(dev, "unable to enable pcie_aux clock\n");
> @@ -503,6 +507,7 @@ static int imx6_pcie_clk_enable(struct imx6_pcie *imx6_pcie)
>
> switch (imx6_pcie->drvdata->variant) {
> case IMX8MM:
> + case IMX8MP:
> if (phy_power_on(imx6_pcie->phy))
> dev_err(dev, "unable to power on PHY\n");
> break;
> @@ -603,6 +608,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
> reset_control_deassert(imx6_pcie->pciephy_reset);
> break;
> case IMX8MM:
> + case IMX8MP:
> if (phy_init(imx6_pcie->phy))
> dev_err(dev, "waiting for phy ready timeout!\n");
> break;
> @@ -678,6 +684,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
> {
> switch (imx6_pcie->drvdata->variant) {
> case IMX8MM:
> + case IMX8MP:
> /*
> * The PHY initialization had been done in the PHY
> * driver, break here directly.
> @@ -823,6 +830,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev)
> case IMX7D:
> case IMX8MQ:
> case IMX8MM:
> + case IMX8MP:
> reset_control_deassert(imx6_pcie->apps_reset);
> break;
> }
> @@ -938,6 +946,7 @@ static void imx6_pcie_host_exit(struct pcie_port *pp)
> imx6_pcie_clk_disable(imx6_pcie);
> switch (imx6_pcie->drvdata->variant) {
> case IMX8MM:
> + case IMX8MP:
> if (phy_power_off(imx6_pcie->phy))
> dev_err(dev, "unable to power off phy\n");
> phy_exit(imx6_pcie->phy);
> @@ -972,6 +981,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev)
> break;
> case IMX7D:
> case IMX8MM:
> + case IMX8MP:
> reset_control_assert(imx6_pcie->apps_reset);
> break;
> default:
> @@ -1028,6 +1038,7 @@ static int imx6_pcie_suspend_noirq(struct device *dev)
> imx6_pcie_clk_disable(imx6_pcie);
> switch (imx6_pcie->drvdata->variant) {
> case IMX8MM:
> + case IMX8MP:
> if (phy_power_off(imx6_pcie->phy))
> dev_err(dev, "unable to power off PHY\n");
> phy_exit(imx6_pcie->phy);
> @@ -1177,6 +1188,7 @@ static int imx6_pcie_probe(struct platform_device *pdev)
> }
> break;
> case IMX8MM:
> + case IMX8MP:
> imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux");
> if (IS_ERR(imx6_pcie->pcie_aux))
> return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_aux),
> @@ -1327,6 +1339,10 @@ static const struct imx6_pcie_drvdata drvdata[] = {
> .variant = IMX8MM,
> .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,
> },
> + [IMX8MP] = {
> + .variant = IMX8MP,
> + .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,
> + },
> };
>
> static const struct of_device_id imx6_pcie_of_match[] = {
> @@ -1336,6 +1352,7 @@ static const struct of_device_id imx6_pcie_of_match[] = {
> { .compatible = "fsl,imx7d-pcie", .data = &drvdata[IMX7D], },
> { .compatible = "fsl,imx8mq-pcie", .data = &drvdata[IMX8MQ], },
> { .compatible = "fsl,imx8mm-pcie", .data = &drvdata[IMX8MM], },
> + { .compatible = "fsl,imx8mp-pcie", .data = &drvdata[IMX8MP], },
> {},
> };
>
> --
> 2.25.1
>
_______________________________________________
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next prev parent reply other threads:[~2022-05-12 16:09 UTC|newest]
Thread overview: 132+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-07 9:07 [PATCH v2 0/7] Add the iMX8MP PCIe support Richard Zhu
2022-03-07 9:07 ` Richard Zhu
2022-03-07 9:07 ` Richard Zhu
2022-03-07 9:07 ` [PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST support Richard Zhu
2022-03-07 9:07 ` Richard Zhu
2022-03-07 9:07 ` Richard Zhu
2022-04-04 9:34 ` Philipp Zabel
2022-04-04 9:34 ` Philipp Zabel
2022-04-04 9:34 ` Philipp Zabel
2022-04-15 7:32 ` Hongxing Zhu
2022-04-15 7:32 ` Hongxing Zhu
2022-04-15 7:32 ` Hongxing Zhu
2022-04-26 3:27 ` Hongxing Zhu
2022-04-26 3:27 ` Hongxing Zhu
2022-04-26 3:27 ` Hongxing Zhu
2022-04-14 20:48 ` Lucas Stach
2022-04-14 20:48 ` Lucas Stach
2022-04-14 20:48 ` Lucas Stach
2022-04-18 4:54 ` Hongxing Zhu
2022-04-18 4:54 ` Hongxing Zhu
2022-04-18 4:54 ` Hongxing Zhu
2022-03-07 9:07 ` [PATCH v2 2/7] dt-binding: phy: Add iMX8MP PCIe PHY binding Richard Zhu
2022-03-07 9:07 ` Richard Zhu
2022-03-07 9:07 ` Richard Zhu
2022-03-08 1:07 ` Rob Herring
2022-03-08 1:07 ` Rob Herring
2022-03-08 1:07 ` Rob Herring
2022-03-10 2:04 ` Hongxing Zhu
2022-03-10 2:04 ` Hongxing Zhu
2022-03-10 2:04 ` Hongxing Zhu
2022-03-07 9:07 ` [PATCH v2 3/7] phy: freescale: imx8m-pcie: Add iMX8MP PCIe PHY support Richard Zhu
2022-03-07 9:07 ` Richard Zhu
2022-03-07 9:07 ` Richard Zhu
2022-03-08 10:04 ` Lucas Stach
2022-03-08 10:04 ` Lucas Stach
2022-03-08 10:04 ` Lucas Stach
2022-03-09 6:05 ` Hongxing Zhu
2022-03-09 6:05 ` Hongxing Zhu
2022-03-09 6:05 ` Hongxing Zhu
2022-04-14 20:58 ` Lucas Stach
2022-04-14 20:58 ` Lucas Stach
2022-04-14 20:58 ` Lucas Stach
2022-04-18 4:55 ` Hongxing Zhu
2022-04-18 4:55 ` Hongxing Zhu
2022-04-18 4:55 ` Hongxing Zhu
2022-04-27 15:18 ` Lucas Stach
2022-04-27 15:18 ` Lucas Stach
2022-04-27 15:18 ` Lucas Stach
2022-04-28 1:29 ` Hongxing Zhu
2022-04-28 1:29 ` Hongxing Zhu
2022-04-28 1:29 ` Hongxing Zhu
2022-05-26 1:32 ` Hongxing Zhu
2022-05-26 1:32 ` Hongxing Zhu
2022-05-26 1:32 ` Hongxing Zhu
2022-03-07 9:07 ` [PATCH v2 4/7] dt-bindings: imx6q-pcie: Add iMX8MP PCIe compatible string Richard Zhu
2022-03-07 9:07 ` Richard Zhu
2022-03-07 9:07 ` Richard Zhu
2022-03-10 20:10 ` Rob Herring
2022-03-10 20:10 ` Rob Herring
2022-03-10 20:10 ` Rob Herring
2022-03-07 9:07 ` [PATCH v2 5/7] arm64: dts: imx8mp: add the iMX8MP PCIe support Richard Zhu
2022-03-07 9:07 ` Richard Zhu
2022-03-07 9:07 ` Richard Zhu
2022-04-14 21:02 ` Lucas Stach
2022-04-14 21:02 ` Lucas Stach
2022-04-14 21:02 ` Lucas Stach
2022-04-18 4:55 ` Hongxing Zhu
2022-04-18 4:55 ` Hongxing Zhu
2022-04-18 4:55 ` Hongxing Zhu
2022-05-23 18:47 ` Tim Harvey
2022-05-23 18:47 ` Tim Harvey
2022-05-23 18:47 ` Tim Harvey
2022-05-24 2:44 ` Hongxing Zhu
2022-05-24 2:44 ` Hongxing Zhu
2022-05-24 2:44 ` Hongxing Zhu
2022-03-07 9:07 ` [PATCH v2 6/7] arm64: dts: imx8mp-evk: Add " Richard Zhu
2022-03-07 9:07 ` Richard Zhu
2022-03-07 9:07 ` Richard Zhu
2022-03-24 10:04 ` (EXT) " Alexander Stein
2022-03-24 10:04 ` Alexander Stein
2022-03-24 10:04 ` Alexander Stein
2022-03-28 3:00 ` Hongxing Zhu
2022-03-28 3:00 ` Hongxing Zhu
2022-03-28 3:00 ` Hongxing Zhu
2022-04-14 21:04 ` Lucas Stach
2022-04-14 21:04 ` Lucas Stach
2022-04-14 21:04 ` Lucas Stach
2022-04-18 4:55 ` Hongxing Zhu
2022-04-18 4:55 ` Hongxing Zhu
2022-04-18 4:55 ` Hongxing Zhu
2022-03-07 9:07 ` [PATCH v2 7/7] PCI: imx6: Add the iMX8MP " Richard Zhu
2022-03-07 9:07 ` Richard Zhu
2022-03-07 9:07 ` Richard Zhu
2022-05-12 16:08 ` Lorenzo Pieralisi [this message]
2022-05-12 16:08 ` Lorenzo Pieralisi
2022-05-12 16:08 ` Lorenzo Pieralisi
2022-05-13 2:22 ` Hongxing Zhu
2022-05-13 2:22 ` Hongxing Zhu
2022-05-13 2:22 ` Hongxing Zhu
2022-03-09 7:57 ` (EXT) [PATCH v2 0/7] " Alexander Stein
2022-03-09 7:57 ` Alexander Stein
2022-03-09 7:57 ` Alexander Stein
2022-03-10 2:03 ` Hongxing Zhu
2022-03-10 2:03 ` Hongxing Zhu
2022-03-10 2:03 ` Hongxing Zhu
2022-04-07 20:41 ` Tim Harvey
2022-04-07 20:41 ` Tim Harvey
2022-04-07 20:41 ` Tim Harvey
2022-04-08 3:14 ` Hongxing Zhu
2022-04-08 3:14 ` Hongxing Zhu
2022-04-08 3:14 ` Hongxing Zhu
2022-04-08 8:12 ` Lucas Stach
2022-04-08 8:12 ` Lucas Stach
2022-04-08 8:12 ` Lucas Stach
2022-04-11 3:32 ` Hongxing Zhu
2022-04-11 3:32 ` Hongxing Zhu
2022-04-11 3:32 ` Hongxing Zhu
2022-04-13 7:21 ` Lucas Stach
2022-04-13 7:21 ` Lucas Stach
2022-04-13 7:21 ` Lucas Stach
2022-04-13 7:55 ` Hongxing Zhu
2022-04-13 7:55 ` Hongxing Zhu
2022-04-13 7:55 ` Hongxing Zhu
2022-04-11 22:18 ` Tim Harvey
2022-04-11 22:18 ` Tim Harvey
2022-04-11 22:18 ` Tim Harvey
2022-04-14 20:45 ` Lucas Stach
2022-04-14 20:45 ` Lucas Stach
2022-04-14 20:45 ` Lucas Stach
2022-04-18 4:54 ` Hongxing Zhu
2022-04-18 4:54 ` Hongxing Zhu
2022-04-18 4:54 ` Hongxing Zhu
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