From: Roger Pau Monne <roger.pau@citrix.com>
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne <roger.pau@citrix.com>,
Jan Beulich <jbeulich@suse.com>,
Andrew Cooper <andrew.cooper3@citrix.com>, Wei Liu <wl@xen.org>
Subject: [PATCH 1/5] x86/ler: use feature flag to check if option is enabled
Date: Fri, 20 May 2022 15:37:42 +0200 [thread overview]
Message-ID: <20220520133746.66142-2-roger.pau@citrix.com> (raw)
In-Reply-To: <20220520133746.66142-1-roger.pau@citrix.com>
It's more consistent with the rest of the usages of cpu_has_xen_lbr.
No functional change intended.
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
---
xen/arch/x86/x86_64/traps.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/arch/x86/x86_64/traps.c b/xen/arch/x86/x86_64/traps.c
index 9d7f1f818b..24c5067ca2 100644
--- a/xen/arch/x86/x86_64/traps.c
+++ b/xen/arch/x86/x86_64/traps.c
@@ -156,7 +156,7 @@ void show_registers(const struct cpu_user_regs *regs)
printk("CPU: %d\n", smp_processor_id());
_show_registers(&fault_regs, fault_crs, context, v);
- if ( ler_msr && !guest_mode(regs) )
+ if ( cpu_has_xen_lbr && !guest_mode(regs) )
{
u64 from, to;
--
2.36.0
next prev parent reply other threads:[~2022-05-20 13:38 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-20 13:37 [PATCH 0/5] x86/lbr: handle lack of model-specific LBRs Roger Pau Monne
2022-05-20 13:37 ` Roger Pau Monne [this message]
2022-05-30 15:00 ` [PATCH 1/5] x86/ler: use feature flag to check if option is enabled Jan Beulich
2022-05-20 13:37 ` [PATCH 2/5] x86/lbr: enable hypervisor LER with arch LBR Roger Pau Monne
2022-05-30 15:31 ` Jan Beulich
2022-07-01 15:39 ` Roger Pau Monné
2022-07-04 6:15 ` Jan Beulich
2022-07-04 8:23 ` Roger Pau Monné
2022-05-20 13:37 ` [PATCH 3/5] x86/perf: expose LBR format in PERF_CAPABILITIES Roger Pau Monne
2022-05-20 14:10 ` Andrew Cooper
2022-05-20 14:19 ` Jan Beulich
2022-05-20 14:58 ` Andrew Cooper
2022-05-23 8:04 ` Roger Pau Monné
2022-05-23 8:12 ` Jan Beulich
2022-05-23 9:53 ` Roger Pau Monné
2022-05-20 14:52 ` Roger Pau Monné
2022-05-20 13:37 ` [PATCH 4/5] x86/vmx: handle no model-specific LBR presence Roger Pau Monne
2022-05-30 16:02 ` Jan Beulich
2022-05-20 13:37 ` [PATCH 5/5] x86/vmx: fix indentation of LBR Roger Pau Monne
2022-06-29 6:40 ` Tian, Kevin
2022-06-17 3:24 ` [PATCH 0/5] x86/lbr: handle lack of model-specific LBRs Henry Wang
2022-07-06 7:30 ` Henry Wang
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