Re: [PATCH 1/2] dt-bindings: arm: Convert CoreSight bindings to DT schema

From: Rob Herring <robh@kernel.org>
To: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>,
	Mike Leach <mike.leach@linaro.org>, Leo Yan <leo.yan@linaro.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	"coresight >> Coresight ML" <coresight@lists.linaro.org>
Subject: Re: [PATCH 1/2] dt-bindings: arm: Convert CoreSight bindings to DT schema
Date: Mon, 23 May 2022 08:57:09 -0500	[thread overview]
Message-ID: <20220523135709.GB1385486-robh@kernel.org> (raw)
In-Reply-To: <9a9b40eb-be8d-bf8c-39be-e0abb507820f@arm.com>

On Mon, May 23, 2022 at 12:03:36PM +0100, Suzuki K Poulose wrote:
> Hi Rob,
> 
> Thanks a lot for converting these to yaml. Some minor comments below.
> 
> In general, the "clocks" and "clock-names" are optional (e.g, for
> etm4 with system register access).

Reality, based on running dtbs_checks, seems to be that all 
instances have them, and the original doc said required.

> 
> On 20/05/2022 22:44, Rob Herring wrote:
> > Each CoreSight component has slightly different requirements and
> > nothing applies to every component, so each CoreSight component has its
> > own schema document.
> > 
> > Signed-off-by: Rob Herring <robh@kernel.org>
> > ---
> >   .../bindings/arm/arm,coresight-catu.yaml      | 101 +++++
> >   .../arm/arm,coresight-dynamic-funnel.yaml     | 126 ++++++
> >   .../bindings/arm/arm,coresight-etb10.yaml     |  92 ++++
> >   .../bindings/arm/arm,coresight-etm.yaml       | 156 +++++++
> >   .../arm/arm,coresight-static-replicator.yaml  |  90 ++++
> >   .../bindings/arm/arm,coresight-stm.yaml       | 101 +++++
> >   .../bindings/arm/arm,coresight-tmc.yaml       | 132 ++++++
> >   .../bindings/arm/arm,coresight-tpiu.yaml      |  91 ++++
> >   .../devicetree/bindings/arm/coresight.txt     | 402 ------------------
> >   9 files changed, 889 insertions(+), 402 deletions(-)
> >   create mode 100644 Documentation/devicetree/bindings/arm/arm,coresight-catu.yaml
> >   create mode 100644 Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml
> >   create mode 100644 Documentation/devicetree/bindings/arm/arm,coresight-etb10.yaml
> >   create mode 100644 Documentation/devicetree/bindings/arm/arm,coresight-etm.yaml
> >   create mode 100644 Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml
> >   create mode 100644 Documentation/devicetree/bindings/arm/arm,coresight-stm.yaml
> >   create mode 100644 Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml
> >   create mode 100644 Documentation/devicetree/bindings/arm/arm,coresight-tpiu.yaml
> >   delete mode 100644 Documentation/devicetree/bindings/arm/coresight.txt
> 
> ...
> 
> > diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml
> > new file mode 100644
> > index 000000000000..ee1ce47225be
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml
> > @@ -0,0 +1,132 @@
> > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/arm/arm,coresight-tmc.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Arm CoreSight Trace Memory Controller
> > +
> 
> ...
> 
> > +  out-ports:
> > +    $ref: /schemas/graph.yaml#/properties/ports
> > +    additionalProperties: false
> > +
> > +    properties:
> > +      port:
> > +        description: AXI Master output connection. Used for ETR and ETF
> > +          configurations.
> 
> nit: This is only for ETRs. Never for ETFs.

What about this example[1]? It's not AXI, but ATB actually.

Rob

[1] https://developer.arm.com/documentation/ddi0461/b/Introduction/Example-systems-with-different-configurations/ETF--ETR--and-TPIU

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