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From: Stephen Boyd <sboyd@kernel.org>
To: Arnd Bergmann <arnd@arndb.de>,
	Conor.Dooley@microchip.com, Greg KH <gregkh@linuxfoundation.org>,
	Palmer Dabbelt <palmer@rivosinc.com>,
	kw@linux.com, linux-clk@vger.kernel.org,
	linux-pci@vger.kernel.org, lorenzo.pieralisi@arm.com,
	mturquette@baylibre.com, robh@kernel.org
Cc: Arnd Bergmann <arnd@arndb.de>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	aou@eecs.berkeley.edu, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, Daire.McNamara@microchip.com,
	Lewis.Hanly@microchip.com, Cyril.Jean@microchip.com
Subject: Re: [PATCH v4 1/1] MAINTAINERS: add polarfire rng, pci and clock drivers
Date: Thu, 09 Jun 2022 15:43:45 -0700	[thread overview]
Message-ID: <20220609224347.1212EC34115@smtp.kernel.org> (raw)
In-Reply-To: <mhng-5c57560e-a00b-4fd8-95ee-5e2fc0dcd34c@palmer-ri-x1c9>

Quoting Palmer Dabbelt (2022-06-01 18:55:40)
> On Mon, 23 May 2022 13:00:01 PDT (-0700), Conor.Dooley@microchip.com wrote:
> > On 23/05/2022 20:52, Palmer Dabbelt wrote:
> >> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> >> 
> >> On Mon, 23 May 2022 04:42:53 PDT (-0700), Conor.Dooley@microchip.com wrote:
> >>> On 05/05/2022 11:55, Conor Dooley wrote:
> >>>> Hardware random, PCI and clock drivers for the PolarFire SoC have been
> >>>> upstreamed but are not covered by the MAINTAINERS entry, so add them.
> >>>> Daire is the author of the clock & PCI drivers, so add him as a
> >>>> maintainer in place of Lewis.
> >>>>
> >>>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> >>>
> >>> Hey Palmer,
> >>> I know youre busy etc but just a reminder :)
> >> 
> >> Sorry, I didn't realize this was aimed at the RISC-V tree.�� I'm fine
> >> taking it, but it seems like these should have gone in along with the
> >> drivers.
> > 
> > Yeah, sorry. In hindsight it should've but that ship has sailed. I sent
> > the rng bundled this way b/c I didn't want to end up a conflict.
> > Obv. there's not a rush so I can always split it back out if needs be.
> 
> I'm adding a bunch of subsystem maintainers just to check again.  I 
> don't have any problem with it, just not really a RISC-V thing and don't 
> wan to make a mess.  I've stashed it over at palmer/pcsoc-maintainers 
> for now.
> 

Acked-by: Stephen Boyd <sboyd@kernel.org>

WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd@kernel.org>
To: Arnd Bergmann <arnd@arndb.de>,
	Conor.Dooley@microchip.com, Greg KH <gregkh@linuxfoundation.org>,
	Palmer Dabbelt <palmer@rivosinc.com>,
	kw@linux.com, linux-clk@vger.kernel.org,
	linux-pci@vger.kernel.org, lorenzo.pieralisi@arm.com,
	mturquette@baylibre.com, robh@kernel.org
Cc: Arnd Bergmann <arnd@arndb.de>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	aou@eecs.berkeley.edu, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, Daire.McNamara@microchip.com,
	Lewis.Hanly@microchip.com, Cyril.Jean@microchip.com
Subject: Re: [PATCH v4 1/1] MAINTAINERS: add polarfire rng, pci and clock drivers
Date: Thu, 09 Jun 2022 15:43:45 -0700	[thread overview]
Message-ID: <20220609224347.1212EC34115@smtp.kernel.org> (raw)
In-Reply-To: <mhng-5c57560e-a00b-4fd8-95ee-5e2fc0dcd34c@palmer-ri-x1c9>

Quoting Palmer Dabbelt (2022-06-01 18:55:40)
> On Mon, 23 May 2022 13:00:01 PDT (-0700), Conor.Dooley@microchip.com wrote:
> > On 23/05/2022 20:52, Palmer Dabbelt wrote:
> >> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> >> 
> >> On Mon, 23 May 2022 04:42:53 PDT (-0700), Conor.Dooley@microchip.com wrote:
> >>> On 05/05/2022 11:55, Conor Dooley wrote:
> >>>> Hardware random, PCI and clock drivers for the PolarFire SoC have been
> >>>> upstreamed but are not covered by the MAINTAINERS entry, so add them.
> >>>> Daire is the author of the clock & PCI drivers, so add him as a
> >>>> maintainer in place of Lewis.
> >>>>
> >>>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> >>>
> >>> Hey Palmer,
> >>> I know youre busy etc but just a reminder :)
> >> 
> >> Sorry, I didn't realize this was aimed at the RISC-V tree.�� I'm fine
> >> taking it, but it seems like these should have gone in along with the
> >> drivers.
> > 
> > Yeah, sorry. In hindsight it should've but that ship has sailed. I sent
> > the rng bundled this way b/c I didn't want to end up a conflict.
> > Obv. there's not a rush so I can always split it back out if needs be.
> 
> I'm adding a bunch of subsystem maintainers just to check again.  I 
> don't have any problem with it, just not really a RISC-V thing and don't 
> wan to make a mess.  I've stashed it over at palmer/pcsoc-maintainers 
> for now.
> 

Acked-by: Stephen Boyd <sboyd@kernel.org>

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  parent reply	other threads:[~2022-06-09 22:43 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-05 10:55 [PATCH v4 0/1] polarfire soc kconfig/maintainers updates Conor Dooley
2022-05-05 10:55 ` Conor Dooley
2022-05-05 10:55 ` [PATCH v4 1/1] MAINTAINERS: add polarfire rng, pci and clock drivers Conor Dooley
2022-05-05 10:55   ` Conor Dooley
2022-05-23 11:42   ` Conor.Dooley
2022-05-23 11:42     ` Conor.Dooley
2022-05-23 19:52     ` Palmer Dabbelt
2022-05-23 19:52       ` Palmer Dabbelt
2022-05-23 20:00       ` Conor.Dooley
2022-05-23 20:00         ` Conor.Dooley
2022-06-02  1:55         ` Palmer Dabbelt
2022-06-02  1:55           ` Palmer Dabbelt
2022-06-02  4:39           ` Conor.Dooley
2022-06-02  4:39             ` Conor.Dooley
2022-06-02 16:31             ` Bjorn Helgaas
2022-06-02 16:31               ` Bjorn Helgaas
2022-06-02 22:05               ` Palmer Dabbelt
2022-06-02 22:05                 ` Palmer Dabbelt
2022-06-02 16:03           ` Bjorn Helgaas
2022-06-02 16:03             ` Bjorn Helgaas
2022-06-09 22:43           ` Stephen Boyd [this message]
2022-06-09 22:43             ` Stephen Boyd
2022-06-09 22:53             ` Conor.Dooley
2022-06-09 22:53               ` Conor.Dooley

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