From: Roger Quadros <rogerq@kernel.org>
To: kishon@ti.com, vkoul@kernel.org
Cc: vigneshr@ti.com, t-patil@ti.com, sjakhade@cadence.com,
s-vadapalli@ti.com, linux-phy@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Roger Quadros <rogerq@kernel.org>
Subject: [PATCH 1/7] phy: ti: phy-j721e-wiz: Add SGMII support in wiz driver for J7200
Date: Tue, 28 Jun 2022 15:22:49 +0300 [thread overview]
Message-ID: <20220628122255.24265-2-rogerq@kernel.org> (raw)
In-Reply-To: <20220628122255.24265-1-rogerq@kernel.org>
From: Siddharth Vadapalli <s-vadapalli@ti.com>
Select the same mac divider for SGMII too as the one being used for
QSGMII.
Enable full rate divider configuration support for J721E_WIZ_10G for
SGMII.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Roger Quadros <rogerq@kernel.org>
---
drivers/phy/ti/phy-j721e-wiz.c | 19 +++++++++++++------
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
index 70bac931f99a..8c10ee8e2707 100644
--- a/drivers/phy/ti/phy-j721e-wiz.c
+++ b/drivers/phy/ti/phy-j721e-wiz.c
@@ -325,7 +325,8 @@ static int wiz_p_mac_div_sel(struct wiz *wiz)
int i;
for (i = 0; i < num_lanes; i++) {
- if (wiz->lane_phy_type[i] == PHY_TYPE_QSGMII) {
+ if (wiz->lane_phy_type[i] == PHY_TYPE_SGMII ||
+ wiz->lane_phy_type[i] == PHY_TYPE_QSGMII) {
ret = regmap_field_write(wiz->p_mac_div_sel0[i], 1);
if (ret)
return ret;
@@ -1025,12 +1026,18 @@ static int wiz_phy_reset_assert(struct reset_controller_dev *rcdev,
static int wiz_phy_fullrt_div(struct wiz *wiz, int lane)
{
- if (wiz->type != AM64_WIZ_10G)
+ switch (wiz->type) {
+ case AM64_WIZ_10G:
+ if (wiz->lane_phy_type[lane] == PHY_TYPE_PCIE)
+ return regmap_field_write(wiz->p0_fullrt_div[lane], 0x1);
+ break;
+ case J721E_WIZ_10G:
+ if (wiz->lane_phy_type[lane] == PHY_TYPE_SGMII)
+ return regmap_field_write(wiz->p0_fullrt_div[lane], 0x2);
+ break;
+ default:
return 0;
-
- if (wiz->lane_phy_type[lane] == PHY_TYPE_PCIE)
- return regmap_field_write(wiz->p0_fullrt_div[lane], 0x1);
-
+ }
return 0;
}
--
2.17.1
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: Roger Quadros <rogerq@kernel.org>
To: kishon@ti.com, vkoul@kernel.org
Cc: vigneshr@ti.com, t-patil@ti.com, sjakhade@cadence.com,
s-vadapalli@ti.com, linux-phy@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Roger Quadros <rogerq@kernel.org>
Subject: [PATCH 1/7] phy: ti: phy-j721e-wiz: Add SGMII support in wiz driver for J7200
Date: Tue, 28 Jun 2022 15:22:49 +0300 [thread overview]
Message-ID: <20220628122255.24265-2-rogerq@kernel.org> (raw)
In-Reply-To: <20220628122255.24265-1-rogerq@kernel.org>
From: Siddharth Vadapalli <s-vadapalli@ti.com>
Select the same mac divider for SGMII too as the one being used for
QSGMII.
Enable full rate divider configuration support for J721E_WIZ_10G for
SGMII.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Roger Quadros <rogerq@kernel.org>
---
drivers/phy/ti/phy-j721e-wiz.c | 19 +++++++++++++------
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
index 70bac931f99a..8c10ee8e2707 100644
--- a/drivers/phy/ti/phy-j721e-wiz.c
+++ b/drivers/phy/ti/phy-j721e-wiz.c
@@ -325,7 +325,8 @@ static int wiz_p_mac_div_sel(struct wiz *wiz)
int i;
for (i = 0; i < num_lanes; i++) {
- if (wiz->lane_phy_type[i] == PHY_TYPE_QSGMII) {
+ if (wiz->lane_phy_type[i] == PHY_TYPE_SGMII ||
+ wiz->lane_phy_type[i] == PHY_TYPE_QSGMII) {
ret = regmap_field_write(wiz->p_mac_div_sel0[i], 1);
if (ret)
return ret;
@@ -1025,12 +1026,18 @@ static int wiz_phy_reset_assert(struct reset_controller_dev *rcdev,
static int wiz_phy_fullrt_div(struct wiz *wiz, int lane)
{
- if (wiz->type != AM64_WIZ_10G)
+ switch (wiz->type) {
+ case AM64_WIZ_10G:
+ if (wiz->lane_phy_type[lane] == PHY_TYPE_PCIE)
+ return regmap_field_write(wiz->p0_fullrt_div[lane], 0x1);
+ break;
+ case J721E_WIZ_10G:
+ if (wiz->lane_phy_type[lane] == PHY_TYPE_SGMII)
+ return regmap_field_write(wiz->p0_fullrt_div[lane], 0x2);
+ break;
+ default:
return 0;
-
- if (wiz->lane_phy_type[lane] == PHY_TYPE_PCIE)
- return regmap_field_write(wiz->p0_fullrt_div[lane], 0x1);
-
+ }
return 0;
}
--
2.17.1
next prev parent reply other threads:[~2022-06-28 12:23 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-28 12:22 [PATCH 0/7] phy: ti: phy-j721e-wiz: Add support for j7200-wiz-10g Roger Quadros
2022-06-28 12:22 ` Roger Quadros
2022-06-28 12:22 ` Roger Quadros [this message]
2022-06-28 12:22 ` [PATCH 1/7] phy: ti: phy-j721e-wiz: Add SGMII support in wiz driver for J7200 Roger Quadros
2022-06-28 12:22 ` [PATCH 2/7] dt-bindings: phy: Add PHY_TYPE_USXGMII definition Roger Quadros
2022-06-28 12:22 ` Roger Quadros
2022-07-01 16:17 ` Rob Herring
2022-07-01 16:17 ` Rob Herring
2022-06-28 12:22 ` [PATCH 3/7] phy: ti: phy-j721e-wiz.c: Add usxgmii support in wiz driver Roger Quadros
2022-06-28 12:22 ` Roger Quadros
2022-06-28 12:22 ` [PATCH 4/7] dt-bindings: phy: ti,phy-j721e-wiz: deprecate clock MUX nodes Roger Quadros
2022-06-28 12:22 ` Roger Quadros
2022-07-01 16:18 ` Rob Herring
2022-07-01 16:18 ` Rob Herring
2022-06-28 12:22 ` [PATCH 5/7] dt-bindings: phy: ti,phy-j721e-wiz: Add support for ti,j7200-wiz-10g Roger Quadros
2022-06-28 12:22 ` Roger Quadros
2022-07-01 16:19 ` Rob Herring
2022-07-01 16:19 ` Rob Herring
2022-06-28 12:22 ` [PATCH 6/7] phy: ti: phy-j721e-wiz: add support for j7200-wiz-10g Roger Quadros
2022-06-28 12:22 ` Roger Quadros
2022-06-28 12:22 ` [PATCH 7/7] phy: ti: phy-j721e-wiz: set PMA_CMN_REFCLK_DIG_DIV based on reflk rate Roger Quadros
2022-06-28 12:22 ` Roger Quadros
2022-08-30 5:13 ` [PATCH 0/7] phy: ti: phy-j721e-wiz: Add support for j7200-wiz-10g Vinod Koul
2022-08-30 5:13 ` Vinod Koul
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