From: Tomas Winkler <tomas.winkler@intel.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx@lists.freedesktop.org,
Alexander Usyskin <alexander.usyskin@intel.com>,
linux-kernel@vger.kernel.org,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Tomas Winkler <tomas.winkler@intel.com>,
Vitaly Lubart <vitaly.lubart@intel.com>
Subject: [Intel-gfx] [PATCH v6 09/14] mei: mkhi: add memory ready command
Date: Sun, 24 Jul 2022 11:24:23 +0300 [thread overview]
Message-ID: <20220724082428.218628-10-tomas.winkler@intel.com> (raw)
In-Reply-To: <20220724082428.218628-1-tomas.winkler@intel.com>
Add GSC memory ready command.
The command indicates to the firmware that extend operation
memory was setup and the firmware may enter PXP mode.
CC: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
---
drivers/misc/mei/mkhi.h | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/misc/mei/mkhi.h b/drivers/misc/mei/mkhi.h
index 27a9b476904e..056b76e73d40 100644
--- a/drivers/misc/mei/mkhi.h
+++ b/drivers/misc/mei/mkhi.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
- * Copyright (c) 2003-2020, Intel Corporation. All rights reserved.
+ * Copyright (c) 2003-2021, Intel Corporation. All rights reserved.
* Intel Management Engine Interface (Intel MEI) Linux driver
*/
@@ -18,6 +18,13 @@
#define MCHI_GROUP_ID 0xA
+#define MKHI_GROUP_ID_GFX 0x30
+#define MKHI_GFX_RESET_WARN_CMD_REQ 0x0
+#define MKHI_GFX_MEMORY_READY_CMD_REQ 0x1
+
+/* Allow transition to PXP mode without approval */
+#define MKHI_GFX_MEM_READY_PXP_ALLOWED 0x1
+
struct mkhi_rule_id {
__le16 rule_type;
u8 feature_id;
@@ -42,4 +49,9 @@ struct mkhi_msg {
u8 data[];
} __packed;
+struct mkhi_gfx_mem_ready {
+ struct mkhi_msg_hdr hdr;
+ u32 flags;
+} __packed;
+
#endif /* _MEI_MKHI_H_ */
--
2.35.3
WARNING: multiple messages have this Message-ID (diff)
From: Tomas Winkler <tomas.winkler@intel.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: Jani Nikula <jani.nikula@linux.intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org,
Tomas Winkler <tomas.winkler@intel.com>,
Alexander Usyskin <alexander.usyskin@intel.com>,
Vitaly Lubart <vitaly.lubart@intel.com>,
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Subject: [PATCH v6 09/14] mei: mkhi: add memory ready command
Date: Sun, 24 Jul 2022 11:24:23 +0300 [thread overview]
Message-ID: <20220724082428.218628-10-tomas.winkler@intel.com> (raw)
In-Reply-To: <20220724082428.218628-1-tomas.winkler@intel.com>
Add GSC memory ready command.
The command indicates to the firmware that extend operation
memory was setup and the firmware may enter PXP mode.
CC: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
---
drivers/misc/mei/mkhi.h | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/misc/mei/mkhi.h b/drivers/misc/mei/mkhi.h
index 27a9b476904e..056b76e73d40 100644
--- a/drivers/misc/mei/mkhi.h
+++ b/drivers/misc/mei/mkhi.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
- * Copyright (c) 2003-2020, Intel Corporation. All rights reserved.
+ * Copyright (c) 2003-2021, Intel Corporation. All rights reserved.
* Intel Management Engine Interface (Intel MEI) Linux driver
*/
@@ -18,6 +18,13 @@
#define MCHI_GROUP_ID 0xA
+#define MKHI_GROUP_ID_GFX 0x30
+#define MKHI_GFX_RESET_WARN_CMD_REQ 0x0
+#define MKHI_GFX_MEMORY_READY_CMD_REQ 0x1
+
+/* Allow transition to PXP mode without approval */
+#define MKHI_GFX_MEM_READY_PXP_ALLOWED 0x1
+
struct mkhi_rule_id {
__le16 rule_type;
u8 feature_id;
@@ -42,4 +49,9 @@ struct mkhi_msg {
u8 data[];
} __packed;
+struct mkhi_gfx_mem_ready {
+ struct mkhi_msg_hdr hdr;
+ u32 flags;
+} __packed;
+
#endif /* _MEI_MKHI_H_ */
--
2.35.3
next prev parent reply other threads:[~2022-07-24 8:25 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-24 8:24 [Intel-gfx] [PATCH v6 00/14] GSC support for XeHP SDV and DG2 Tomas Winkler
2022-07-24 8:24 ` Tomas Winkler
2022-07-24 8:24 ` [Intel-gfx] [PATCH v6 01/14] drm/i915/gsc: skip irq initialization if using polling Tomas Winkler
2022-07-24 8:24 ` Tomas Winkler
2022-07-24 8:24 ` [Intel-gfx] [PATCH v6 02/14] mei: add slow_fw flag to the mei auxiliary device Tomas Winkler
2022-07-24 8:24 ` Tomas Winkler
2022-07-24 13:44 ` [Intel-gfx] " Greg Kroah-Hartman
2022-07-24 13:44 ` Greg Kroah-Hartman
2022-07-24 8:24 ` [Intel-gfx] [PATCH v6 03/14] drm/i915/gsc: add slow_fw flag to the gsc device definition Tomas Winkler
2022-07-24 8:24 ` Tomas Winkler
2022-07-24 8:24 ` [Intel-gfx] [PATCH v6 04/14] drm/i915/gsc: add GSC XeHP SDV platform definition Tomas Winkler
2022-07-24 8:24 ` Tomas Winkler
2022-07-24 8:24 ` [Intel-gfx] [PATCH v6 05/14] mei: gsc: use polling instead of interrupts Tomas Winkler
2022-07-24 8:24 ` Tomas Winkler
2022-07-24 8:24 ` [Intel-gfx] [PATCH v6 06/14] mei: gsc: wait for reset thread on stop Tomas Winkler
2022-07-24 8:24 ` Tomas Winkler
2022-07-24 8:24 ` [Intel-gfx] [PATCH v6 07/14] mei: extend timeouts on slow devices Tomas Winkler
2022-07-24 8:24 ` Tomas Winkler
2022-07-24 8:24 ` [Intel-gfx] [PATCH v6 08/14] mei: bus: export common mkhi definitions into a separate header Tomas Winkler
2022-07-24 8:24 ` Tomas Winkler
2022-07-24 8:24 ` Tomas Winkler [this message]
2022-07-24 8:24 ` [PATCH v6 09/14] mei: mkhi: add memory ready command Tomas Winkler
2022-07-24 8:24 ` [Intel-gfx] [PATCH v6 10/14] mei: gsc: setup gsc extended operational memory Tomas Winkler
2022-07-24 8:24 ` Tomas Winkler
2022-07-24 8:24 ` [Intel-gfx] [PATCH v6 11/14] mei: gsc: add transition to PXP mode in resume flow Tomas Winkler
2022-07-24 8:24 ` Tomas Winkler
2022-07-24 8:24 ` [Intel-gfx] [PATCH v6 12/14] mei: debugfs: add pxp mode to devstate in debugfs Tomas Winkler
2022-07-24 8:24 ` Tomas Winkler
2022-07-24 8:24 ` [Intel-gfx] [PATCH v6 13/14] drm/i915/gsc: allocate extended operational memory in LMEM Tomas Winkler
2022-07-24 8:24 ` Tomas Winkler
2022-07-24 8:24 ` [Intel-gfx] [PATCH v6 14/14] HAX: drm/i915: force INTEL_MEI_GSC on for CI Tomas Winkler
2022-07-24 8:24 ` Tomas Winkler
2022-07-24 8:40 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for GSC support for XeHP SDV and DG2 Patchwork
2022-07-24 8:40 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-07-24 9:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-07-24 10:46 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-07-24 13:44 ` [Intel-gfx] [PATCH v6 00/14] " Greg Kroah-Hartman
2022-07-24 13:44 ` Greg Kroah-Hartman
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220724082428.218628-10-tomas.winkler@intel.com \
--to=tomas.winkler@intel.com \
--cc=airlied@linux.ie \
--cc=alexander.usyskin@intel.com \
--cc=daniel@ffwll.ch \
--cc=gregkh@linuxfoundation.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=linux-kernel@vger.kernel.org \
--cc=rodrigo.vivi@intel.com \
--cc=vitaly.lubart@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.