* [Buildroot] [PATCH 1/1 v2] add support for mws4 board
@ 2022-07-24 18:12 Marian Ulbricht
2022-07-26 17:31 ` Thomas Petazzoni via buildroot
0 siblings, 1 reply; 2+ messages in thread
From: Marian Ulbricht @ 2022-07-24 18:12 UTC (permalink / raw)
To: buildroot; +Cc: Marian Ulbricht, yann.morin.1998
mws4 is an arm based nuclear probe hardware used from
German government to monitor nuclear activity.
This patch adds all necessary files to build an image for this board.
changelog:
v2:
* remove binary files from patch
* add board-readme
Signed-off-by: Marian Ulbricht <ulbricht@innoroute.de>
---
board/ultratronik/omap3_mws4/genimage.cfg | 48 +
board/ultratronik/omap3_mws4/genimage.sh | 5 +
.../omap3_mws4/kernel_defconfig.conf | 793 +++++++++++++++
.../omap3_mws4/kernel_patches/mws4.patch | 575 +++++++++++
.../overlay-base/etc/network/interfaces | 8 +
.../overlay-base/usr/mws4/GPIO_init.sh | 70 ++
.../overlay-base/usr/mws4/flash_ubi.sh | 6 +
.../patches/uboot/uboot-2022.04-mws4.patch | 924 ++++++++++++++++++
board/ultratronik/omap3_mws4/readme.txt | 71 ++
configs/mws4_defconfig | 142 +++
10 files changed, 2642 insertions(+)
create mode 100644 board/ultratronik/omap3_mws4/genimage.cfg
create mode 100755 board/ultratronik/omap3_mws4/genimage.sh
create mode 100644 board/ultratronik/omap3_mws4/kernel_defconfig.conf
create mode 100644 board/ultratronik/omap3_mws4/kernel_patches/mws4.patch
create mode 100644 board/ultratronik/omap3_mws4/overlay-base/etc/network/interfaces
create mode 100755 board/ultratronik/omap3_mws4/overlay-base/usr/mws4/GPIO_init.sh
create mode 100755 board/ultratronik/omap3_mws4/overlay-base/usr/mws4/flash_ubi.sh
create mode 100644 board/ultratronik/omap3_mws4/patches/uboot/uboot-2022.04-mws4.patch
create mode 100644 board/ultratronik/omap3_mws4/readme.txt
create mode 100644 configs/mws4_defconfig
diff --git a/board/ultratronik/omap3_mws4/genimage.cfg b/board/ultratronik/omap3_mws4/genimage.cfg
new file mode 100644
index 0000000000..35817ea97e
--- /dev/null
+++ b/board/ultratronik/omap3_mws4/genimage.cfg
@@ -0,0 +1,48 @@
+image boot.vfat {
+ vfat {
+ files = {
+ "uImage",
+ "omap3-mws4.dtb",
+ "u-boot.bin",
+ "mlo",
+ "u-boot-old.bin"
+ }
+ }
+ size = 16M
+}
+
+
+image flashdata.vfat {
+ vfat {
+ files = {
+ "rootfs.ubi"
+ }
+ }
+ size = 500M
+}
+
+image sdcard.img {
+ hdimage {
+ }
+
+
+
+ partition boot {
+ partition-type = 0xc
+ bootable = "true"
+ image = "boot.vfat"
+ }
+
+ partition rootfs {
+ partition-type = 0x83
+ image = "rootfs.ext4"
+ size = 500M
+ }
+
+ partition flashdata {
+ partition-type = 0xc
+ image = "flashdata.vfat"
+ }
+
+}
+
diff --git a/board/ultratronik/omap3_mws4/genimage.sh b/board/ultratronik/omap3_mws4/genimage.sh
new file mode 100755
index 0000000000..ec7c92d658
--- /dev/null
+++ b/board/ultratronik/omap3_mws4/genimage.sh
@@ -0,0 +1,5 @@
+#!/bin/bash
+wget https://github.com/InnoRoute/omap3_mws4/raw/main/mlo -O output/images/mlo
+wget https://github.com/InnoRoute/omap3_mws4/raw/main/u-boot-old.bin -O output/images/u-boot-old.bin
+cp output/images/u-boot.img output/images/u-boot.bin
+support/scripts/genimage.sh -c board/ultratronik/omap3_mws4/genimage.cfg
diff --git a/board/ultratronik/omap3_mws4/kernel_defconfig.conf b/board/ultratronik/omap3_mws4/kernel_defconfig.conf
new file mode 100644
index 0000000000..98f2cd3b34
--- /dev/null
+++ b/board/ultratronik/omap3_mws4/kernel_defconfig.conf
@@ -0,0 +1,793 @@
+CONFIG_COMPILE_TEST=y
+CONFIG_KERNEL_LZMA=y
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_AUDIT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_CGROUPS=y
+CONFIG_MEMCG=y
+CONFIG_BLK_CGROUP=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_CFS_BANDWIDTH=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_USB_SERIAL_CH341=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_CGROUP_PERF=y
+CONFIG_NAMESPACES=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_USB_EHCI_HCD_OMAP=y
+CONFIG_USB_OHCI_HCD_OMAP3=y
+CONFIG_USB_OMAP=y
+CONFIG_USB_SERIAL_CONSOLE=y
+CONFIG_NAND_BOOT=y
+CONFIG_USB_OTG_FSM=y
+CONFIG_MUSB_PIO_ONLY=y
+CONFIG_EXPERT=y
+CONFIG_SLAB=y
+CONFIG_PROFILING=y
+CONFIG_ARCH_MULTI_V6=y
+# CONFIG_OMAP_32K_TIMER is not set
+CONFIG_ARCH_OMAP2=y
+CONFIG_ARCH_OMAP3=y
+CONFIG_ARCH_OMAP4=y
+CONFIG_SOC_OMAP5=y
+CONFIG_SOC_AM33XX=y
+CONFIG_SOC_AM43XX=y
+CONFIG_SOC_DRA7XX=y
+CONFIG_ARM_THUMBEE=y
+CONFIG_ARM_ERRATA_411920=y
+CONFIG_SMP=y
+CONFIG_NR_CPUS=2
+CONFIG_DEPRECATED_PARAM_STRUCT=y
+CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyS2,115200"
+CONFIG_KEXEC=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPUFREQ_DT=m
+# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
+CONFIG_CPU_IDLE=y
+CONFIG_ARM_CPUIDLE=y
+CONFIG_KERNEL_MODE_NEON=y
+CONFIG_ARM_CRYPTO=y
+CONFIG_CRYPTO_SHA1_ARM_NEON=m
+CONFIG_CRYPTO_SHA256_ARM=m
+CONFIG_CRYPTO_SHA512_ARM=m
+CONFIG_CRYPTO_AES_ARM=m
+CONFIG_CRYPTO_AES_ARM_BS=m
+CONFIG_CRYPTO_GHASH_ARM_CE=m
+CONFIG_CRYPTO_CHACHA20_NEON=m
+CONFIG_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_BINFMT_MISC=y
+CONFIG_CMA=y
+CONFIG_ZSMALLOC=m
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_TLS=y
+CONFIG_TLS_DEVICE=y
+CONFIG_XFRM_USER=y
+CONFIG_NET_KEY=y
+CONFIG_NET_KEY_MIGRATE=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NETFILTER=y
+CONFIG_NETFILTER_NETLINK_ACCT=y
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_LOG_NETDEV=m
+CONFIG_NF_CONNTRACK_ZONES=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CONNTRACK_TIMEOUT=y
+CONFIG_NF_CONNTRACK_TIMESTAMP=y
+CONFIG_NF_CONNTRACK_AMANDA=m
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_H323=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_NETBIOS_NS=m
+CONFIG_NF_CONNTRACK_SNMP=m
+CONFIG_NF_CONNTRACK_PPTP=m
+CONFIG_NF_CONNTRACK_SANE=m
+CONFIG_NF_CONNTRACK_SIP=m
+CONFIG_NF_CONNTRACK_TFTP=m
+CONFIG_NF_CT_NETLINK=m
+CONFIG_NF_CT_NETLINK_TIMEOUT=m
+CONFIG_NF_CT_NETLINK_HELPER=m
+CONFIG_NETFILTER_NETLINK_GLUE_CT=y
+CONFIG_NF_TABLES=m
+CONFIG_NF_TABLES_SET=m
+CONFIG_NF_TABLES_INET=y
+CONFIG_NF_TABLES_NETDEV=y
+CONFIG_NFT_NUMGEN=m
+CONFIG_NFT_CT=m
+CONFIG_NFT_COUNTER=m
+CONFIG_NFT_CONNLIMIT=m
+CONFIG_NFT_LOG=m
+CONFIG_NFT_LIMIT=m
+CONFIG_NFT_MASQ=m
+CONFIG_NFT_REDIR=m
+CONFIG_NFT_NAT=m
+CONFIG_NFT_TUNNEL=m
+CONFIG_NFT_OBJREF=m
+CONFIG_NFT_QUEUE=m
+CONFIG_NFT_QUOTA=m
+CONFIG_NFT_REJECT=m
+CONFIG_NFT_COMPAT=m
+CONFIG_NFT_HASH=m
+CONFIG_NFT_XFRM=m
+CONFIG_NFT_SOCKET=m
+CONFIG_NFT_OSF=m
+CONFIG_NFT_TPROXY=m
+CONFIG_NFT_SYNPROXY=m
+CONFIG_NFT_DUP_NETDEV=m
+CONFIG_NFT_FWD_NETDEV=m
+CONFIG_NF_FLOW_TABLE_INET=m
+CONFIG_NF_FLOW_TABLE=m
+CONFIG_NETFILTER_XTABLES=y
+CONFIG_NETFILTER_XT_SET=m
+CONFIG_NETFILTER_XT_TARGET_AUDIT=m
+CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
+CONFIG_NETFILTER_XT_TARGET_DSCP=m
+CONFIG_NETFILTER_XT_TARGET_HMARK=m
+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
+CONFIG_NETFILTER_XT_TARGET_LED=m
+CONFIG_NETFILTER_XT_TARGET_LOG=m
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
+CONFIG_NETFILTER_XT_TARGET_TEE=m
+CONFIG_NETFILTER_XT_TARGET_TPROXY=m
+CONFIG_NETFILTER_XT_TARGET_TRACE=m
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
+CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
+CONFIG_NETFILTER_XT_MATCH_BPF=m
+CONFIG_NETFILTER_XT_MATCH_CGROUP=m
+CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_CPU=m
+CONFIG_NETFILTER_XT_MATCH_DCCP=m
+CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m
+CONFIG_NETFILTER_XT_MATCH_DSCP=m
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_IPCOMP=m
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
+CONFIG_NETFILTER_XT_MATCH_IPVS=m
+CONFIG_NETFILTER_XT_MATCH_L2TP=m
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+CONFIG_NETFILTER_XT_MATCH_NFACCT=m
+CONFIG_NETFILTER_XT_MATCH_OSF=m
+CONFIG_NETFILTER_XT_MATCH_OWNER=m
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+CONFIG_NETFILTER_XT_MATCH_RATEEST=m
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+CONFIG_NETFILTER_XT_MATCH_RECENT=m
+CONFIG_NETFILTER_XT_MATCH_SCTP=m
+CONFIG_NETFILTER_XT_MATCH_SOCKET=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_TIME=m
+CONFIG_NETFILTER_XT_MATCH_U32=m
+CONFIG_IP_SET=m
+CONFIG_IP_SET_BITMAP_IP=m
+CONFIG_IP_SET_BITMAP_IPMAC=m
+CONFIG_IP_SET_BITMAP_PORT=m
+CONFIG_IP_SET_HASH_IP=m
+CONFIG_IP_SET_HASH_IPMARK=m
+CONFIG_IP_SET_HASH_IPPORT=m
+CONFIG_IP_SET_HASH_IPPORTIP=m
+CONFIG_IP_SET_HASH_IPPORTNET=m
+CONFIG_IP_SET_HASH_IPMAC=m
+CONFIG_IP_SET_HASH_MAC=m
+CONFIG_IP_SET_HASH_NETPORTNET=m
+CONFIG_IP_SET_HASH_NET=m
+CONFIG_IP_SET_HASH_NETNET=m
+CONFIG_IP_SET_HASH_NETPORT=m
+CONFIG_IP_SET_HASH_NETIFACE=m
+CONFIG_IP_SET_LIST_SET=m
+CONFIG_IP_VS=m
+CONFIG_NFT_DUP_IPV4=m
+CONFIG_NFT_FIB_IPV4=m
+CONFIG_NF_TABLES_ARP=y
+CONFIG_NF_FLOW_TABLE_IPV4=m
+CONFIG_NF_LOG_ARP=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_RPFILTER=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_SECURITY=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+CONFIG_NF_TABLES_BRIDGE=m
+CONFIG_NFT_BRIDGE_META=m
+CONFIG_NFT_BRIDGE_REJECT=m
+CONFIG_NF_LOG_BRIDGE=m
+CONFIG_NF_CONNTRACK_BRIDGE=m
+CONFIG_BRIDGE_NF_EBTABLES=m
+CONFIG_BRIDGE=m
+CONFIG_BRIDGE_VLAN_FILTERING=y
+CONFIG_VLAN_8021Q=m
+CONFIG_PHONET=m
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_INGRESS=m
+CONFIG_NET_CLS_U32=m
+CONFIG_NET_CLS_FLOWER=m
+CONFIG_NET_CLS_MATCHALL=m
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_ACT_POLICE=m
+CONFIG_NET_ACT_GACT=m
+CONFIG_NET_SWITCHDEV=y
+CONFIG_CAN=m
+CONFIG_CAN_C_CAN=m
+CONFIG_CAN_C_CAN_PLATFORM=m
+CONFIG_BT=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=m
+CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIBTSDIO=m
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_NOKIA=m
+CONFIG_BT_HCIUART_BCSP=y
+CONFIG_BT_HCIUART_LL=y
+CONFIG_BT_HCIUART_3WIRE=y
+CONFIG_BT_HCIUART_BCM=y
+CONFIG_BT_HCIBCM203X=m
+CONFIG_BT_HCIBPA10X=m
+CONFIG_BT_HCIBFUSB=m
+CONFIG_BT_HCIVHCI=m
+CONFIG_BT_MRVL=m
+CONFIG_BT_MRVL_SDIO=m
+CONFIG_AF_RXRPC=m
+CONFIG_RXKAD=y
+CONFIG_CFG80211=m
+CONFIG_MAC80211=m
+CONFIG_PCI=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_HOTPLUG_PCI_PCIE=y
+CONFIG_PCI_MSI=y
+CONFIG_HOTPLUG_PCI=y
+CONFIG_PCI_DRA7XX_EP=y
+CONFIG_PCI_ENDPOINT=y
+CONFIG_PCI_ENDPOINT_CONFIGFS=y
+CONFIG_PCI_EPF_TEST=m
+CONFIG_UEVENT_HELPER=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/mdev"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_DMA_FENCE_TRACE=y
+CONFIG_OMAP_OCP2SCP=y
+CONFIG_SIMPLE_PM_BUS=y
+CONFIG_CONNECTOR=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_NFTL=y
+CONFIG_NFTL_RW=y
+CONFIG_MTD_OOPS=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_BLOCK2MTD=y
+CONFIG_MTD_ONENAND=y
+CONFIG_MTD_ONENAND_VERIFY_WRITE=y
+CONFIG_MTD_ONENAND_OMAP2=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_MTD_NAND_ECC_SW_BCH=y
+CONFIG_MTD_NAND_OMAP2=y
+CONFIG_MTD_NAND_OMAP_BCH=y
+CONFIG_MTD_SPI_NOR=m
+CONFIG_MTD_UBI=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+CONFIG_UBIFS_ATIME_SUPPORT=y
+CONFIG_CRAMFS_MTD=y
+CONFIG_CRYPTO_CRYPTD=m
+CONFIG_CRYPTO_CBC=m
+CONFIG_CRYPTO_MD5=m
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_MD5=m
+CONFIG_PARPORT=y
+CONFIG_PARPORT_AX88796=y
+CONFIG_ZRAM=m
+CONFIG_ZRAM_WRITEBACK=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=16384
+CONFIG_SENSORS_TSL2550=m
+CONFIG_SRAM=y
+CONFIG_PCI_ENDPOINT_TEST=m
+CONFIG_EEPROM_AT24=m
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=m
+CONFIG_CHR_DEV_SCH=m
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_SCSI_DH=y
+CONFIG_SCSI_DH_RDAC=m
+CONFIG_SCSI_DH_HP_SW=m
+CONFIG_SCSI_DH_EMC=m
+CONFIG_SCSI_DH_ALUA=m
+CONFIG_ATA=y
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_AHCI_DM816=m
+CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+CONFIG_AX88796DT=y
+CONFIG_DM9000=y
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_HISILICON is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+CONFIG_KS8851=y
+CONFIG_KS8851_MLL=y
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+CONFIG_NS83820=y
+CONFIG_AX88796=y
+CONFIG_AX88796_93CX6=y
+CONFIG_NE2K_PCI=y
+# CONFIG_NET_VENDOR_QUALCOMM is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+CONFIG_SMC91X=y
+CONFIG_SMSC911X=y
+# CONFIG_NET_VENDOR_STMICRO is not set
+CONFIG_TI_DAVINCI_EMAC=y
+CONFIG_TI_CPSW=y
+CONFIG_TI_CPTS=y
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_AX88796B_PHY=y
+CONFIG_AT803X_PHY=y
+CONFIG_DP83848_PHY=y
+CONFIG_DP83867_PHY=y
+CONFIG_MICREL_PHY=y
+CONFIG_SMSC_PHY=y
+CONFIG_PPP=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_MPPE=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPPOE=m
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_USB_USBNET=m
+CONFIG_USB_NET_SMSC75XX=m
+CONFIG_USB_NET_SMSC95XX=m
+CONFIG_USB_ALI_M5632=y
+CONFIG_USB_AN2720=y
+CONFIG_USB_EPSON2888=y
+CONFIG_USB_KC2190=y
+CONFIG_USB_NET_QMI_WWAN=m
+CONFIG_USB_CDC_PHONET=m
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_USB=m
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_MWIFIEX=m
+CONFIG_MWIFIEX_SDIO=m
+CONFIG_MWIFIEX_USB=m
+CONFIG_WL12XX=m
+CONFIG_WL18XX=m
+CONFIG_WLCORE_SPI=m
+CONFIG_WLCORE_SDIO=m
+CONFIG_INPUT_MATRIXKMAP=y
+CONFIG_INPUT_MOUSEDEV=m
+CONFIG_INPUT_JOYDEV=m
+CONFIG_INPUT_EVDEV=m
+CONFIG_KEYBOARD_ATKBD=m
+CONFIG_KEYBOARD_GPIO=m
+CONFIG_KEYBOARD_MATRIX=m
+CONFIG_KEYBOARD_OMAP4=m
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ADS7846=m
+CONFIG_TOUCHSCREEN_ATMEL_MXT=m
+CONFIG_TOUCHSCREEN_EDT_FT5X06=m
+CONFIG_TOUCHSCREEN_TI_AM335X_TSC=m
+CONFIG_TOUCHSCREEN_PIXCIR=m
+CONFIG_TOUCHSCREEN_TSC2004=m
+CONFIG_TOUCHSCREEN_TSC2005=m
+CONFIG_TOUCHSCREEN_TSC2007=m
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_CPCAP_PWRBUTTON=m
+CONFIG_INPUT_TPS65218_PWRBUTTON=m
+CONFIG_INPUT_TWL4030_PWRBUTTON=y
+CONFIG_INPUT_TWL4030_VIBRA=y
+CONFIG_INPUT_UINPUT=m
+CONFIG_INPUT_PALMAS_PWRBUTTON=m
+CONFIG_INPUT_PWM_VIBRA=m
+CONFIG_SERIO=m
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=32
+CONFIG_SERIAL_8250_RUNTIME_UARTS=6
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_8250_DETECT_IRQ=y
+CONFIG_SERIAL_8250_RSA=y
+CONFIG_SERIAL_8250_OMAP=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_OMAP=y
+CONFIG_SERIAL_OMAP_CONSOLE=y
+CONFIG_SERIAL_DEV_BUS=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_ARB_GPIO_CHALLENGE=y
+CONFIG_I2C_MUX_GPIO=y
+CONFIG_I2C_MUX_GPMUX=y
+CONFIG_SPI=y
+CONFIG_SPI_OMAP24XX=y
+CONFIG_SPI_TI_QSPI=m
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_HTC_EGPIO=y
+CONFIG_GPIO_LP873X=m
+CONFIG_GPIO_LP87565=y
+CONFIG_GPIO_PALMAS=y
+CONFIG_GPIO_TPS65218=m
+CONFIG_GPIO_TPS65910=y
+CONFIG_GPIO_TQMX86=m
+CONFIG_GPIO_TWL4030=y
+CONFIG_GPIO_TWL6040=m
+CONFIG_GPIO_MOCKUP=y
+CONFIG_W1=m
+CONFIG_W1_MASTER_GPIO=m
+CONFIG_HDQ_MASTER_OMAP=m
+CONFIG_W1_SLAVE_DS250X=m
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_GPIO=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_BATTERY_TWL4030_MADC=m
+CONFIG_CHARGER_TWL4030=m
+CONFIG_SENSORS_GPIO_FAN=m
+CONFIG_SENSORS_LM75=m
+CONFIG_SENSORS_TMP102=m
+CONFIG_THERMAL_GOV_FAIR_SHARE=y
+CONFIG_THERMAL_GOV_USER_SPACE=y
+CONFIG_CPU_THERMAL=y
+CONFIG_TI_THERMAL=y
+CONFIG_OMAP4_THERMAL=y
+CONFIG_OMAP5_THERMAL=y
+CONFIG_DRA752_THERMAL=y
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_CORE=y
+CONFIG_WATCHDOG_SYSFS=y
+CONFIG_GPIO_WATCHDOG=m
+# CONFIG_SIRFSOC_WATCHDOG is not set
+CONFIG_MFD_CPCAP=y
+# CONFIG_ABX500_CORE is not set
+CONFIG_MFD_TI_AM335X_TSCADC=m
+CONFIG_MFD_TI_LMU=m
+CONFIG_MFD_PALMAS=y
+CONFIG_MFD_TPS65217=y
+CONFIG_MFD_TI_LP873X=y
+CONFIG_MFD_TI_LP87565=y
+CONFIG_MFD_TPS65218=y
+CONFIG_MFD_TPS65910=y
+CONFIG_TWL6040_CORE=y
+CONFIG_REGULATOR_CPCAP=y
+CONFIG_REGULATOR_GPIO=y
+CONFIG_REGULATOR_LM363X=m
+CONFIG_REGULATOR_LP872X=y
+CONFIG_REGULATOR_LP873X=y
+CONFIG_REGULATOR_LP87565=y
+CONFIG_REGULATOR_PALMAS=y
+CONFIG_REGULATOR_PBIAS=y
+CONFIG_REGULATOR_TI_ABB=y
+CONFIG_REGULATOR_TPS62360=m
+CONFIG_REGULATOR_TPS65023=y
+CONFIG_REGULATOR_TPS6507X=y
+CONFIG_REGULATOR_TPS65217=y
+CONFIG_REGULATOR_TPS65218=y
+CONFIG_REGULATOR_TPS65910=y
+CONFIG_REGULATOR_TWL4030=y
+CONFIG_RC_CORE=m
+CONFIG_LIRC=y
+CONFIG_RC_DEVICES=y
+CONFIG_IR_SPI=m
+CONFIG_IR_RX51=m
+CONFIG_IR_GPIO_TX=m
+CONFIG_IR_PWM_TX=m
+CONFIG_MEDIA_SUPPORT=m
+CONFIG_DRM=m
+CONFIG_DRM_OMAP=m
+CONFIG_OMAP5_DSS_HDMI=y
+CONFIG_OMAP2_DSS_SDI=y
+CONFIG_OMAP2_DSS_DSI=y
+CONFIG_DRM_OMAP_PANEL_DSI_CM=m
+CONFIG_DRM_TILCDC=m
+CONFIG_DRM_PANEL_SIMPLE=m
+CONFIG_DRM_PANEL_LG_LB035Q02=m
+CONFIG_DRM_PANEL_NEC_NL8048HL11=m
+CONFIG_DRM_PANEL_SHARP_LS037V7DW01=m
+CONFIG_DRM_PANEL_SONY_ACX565AKM=m
+CONFIG_DRM_PANEL_TPO_TD028TTEC1=m
+CONFIG_DRM_PANEL_TPO_TD043MTEA1=m
+CONFIG_DRM_TI_TFP410=m
+CONFIG_FB=y
+CONFIG_FIRMWARE_EDID=y
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_TILEBLITTING=y
+CONFIG_LCD_CLASS_DEVICE=y
+CONFIG_LCD_PLATFORM=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_PWM=m
+CONFIG_BACKLIGHT_PANDORA=m
+CONFIG_BACKLIGHT_GPIO=m
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
+CONFIG_LOGO=y
+CONFIG_SOUND=m
+CONFIG_SND=m
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_VERBOSE_PRINTK=y
+CONFIG_SND_USB_AUDIO=m
+CONFIG_SND_SOC=m
+CONFIG_SND_SOC_DAVINCI_MCASP=m
+CONFIG_SND_SOC_NOKIA_RX51=m
+CONFIG_SND_SOC_OMAP3_PANDORA=m
+CONFIG_SND_SOC_OMAP3_TWL4030=m
+CONFIG_SND_SOC_OMAP_ABE_TWL6040=m
+CONFIG_SND_SOC_OMAP_HDMI=m
+CONFIG_SND_SOC_CPCAP=m
+CONFIG_SND_SOC_TLV320AIC23_I2C=m
+CONFIG_SND_SIMPLE_CARD=m
+CONFIG_SND_AUDIO_GRAPH_CARD=m
+CONFIG_HID_GENERIC=m
+CONFIG_USB_HIDDEV=y
+CONFIG_USB_KBD=m
+CONFIG_USB_MOUSE=m
+CONFIG_USB_LED_TRIG=y
+CONFIG_USB_ULPI_BUS=m
+CONFIG_USB_CONN_GPIO=m
+CONFIG_USB=m
+# CONFIG_USB_PCI is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_DYNAMIC_MINORS=y
+CONFIG_USB_OTG=y
+CONFIG_USB_OTG_FSM=m
+CONFIG_USB_LEDS_TRIGGER_USBPORT=m
+CONFIG_USB_MON=m
+CONFIG_USB_EHCI_HCD=m
+CONFIG_USB_EHCI_FSL=m
+CONFIG_USB_EHCI_HCD_NPCM7XX=m
+# CONFIG_USB_EHCI_HCD_OMAP is not set
+CONFIG_USB_OXU210HP_HCD=m
+CONFIG_USB_ISP116X_HCD=m
+CONFIG_USB_ISP1362_HCD=m
+CONFIG_USB_FOTG210_HCD=m
+CONFIG_USB_MAX3421_HCD=m
+CONFIG_USB_OHCI_HCD=m
+# CONFIG_USB_OHCI_HCD_OMAP3 is not set
+CONFIG_USB_SL811_HCD=m
+CONFIG_USB_SL811_HCD_ISO=y
+CONFIG_USB_R8A66597_HCD=m
+CONFIG_USB_RENESAS_USBHS_HCD=m
+CONFIG_USB_RENESAS_USBHS=m
+CONFIG_USB_TMC=m
+CONFIG_USB_STORAGE=m
+CONFIG_USB_UAS=m
+CONFIG_USB_MUSB_HDRC=m
+CONFIG_USB_MUSB_HOST=y
+CONFIG_USB_MUSB_TUSB6010=m
+CONFIG_USB_MUSB_OMAP2PLUS=m
+CONFIG_USB_MUSB_AM35X=m
+CONFIG_USB_MUSB_DSPS=m
+CONFIG_USB_MUSB_UX500=m
+CONFIG_USB_INVENTRA_DMA=y
+CONFIG_USB_TI_CPPI41_DMA=y
+CONFIG_USB_TUSB_OMAP_DMA=y
+CONFIG_USB_USS720=m
+CONFIG_USB_SERIAL=m
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_SIMPLE=m
+CONFIG_USB_SERIAL_CP210X=m
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_PL2303=m
+CONFIG_USB_SERIAL_OPTION=m
+CONFIG_USB_LD=m
+CONFIG_USB_TEST=m
+CONFIG_USB_EZUSB_FX2=m
+CONFIG_USB_HUB_USB251XB=m
+CONFIG_USB_HSIC_USB3503=m
+CONFIG_USB_HSIC_USB4604=m
+CONFIG_NOP_USB_XCEIV=m
+CONFIG_TWL6030_USB=m
+CONFIG_USB_GPIO_VBUS=m
+CONFIG_USB_ISP1301=m
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=m
+CONFIG_USB_CONFIGFS=m
+CONFIG_USB_CONFIGFS_SERIAL=y
+CONFIG_USB_CONFIGFS_ACM=y
+CONFIG_USB_CONFIGFS_OBEX=y
+CONFIG_USB_CONFIGFS_NCM=y
+CONFIG_USB_CONFIGFS_ECM=y
+CONFIG_USB_CONFIGFS_ECM_SUBSET=y
+CONFIG_USB_CONFIGFS_RNDIS=y
+CONFIG_USB_CONFIGFS_EEM=y
+CONFIG_USB_CONFIGFS_PHONET=y
+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+CONFIG_USB_CONFIGFS_F_LB_SS=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_F_UAC1=y
+CONFIG_USB_CONFIGFS_F_UAC2=y
+CONFIG_USB_CONFIGFS_F_MIDI=y
+CONFIG_USB_CONFIGFS_F_HID=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_G_NOKIA=m
+CONFIG_MMC=y
+CONFIG_SDIO_UART=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_OMAP=y
+CONFIG_MMC_OMAP_HS=y
+CONFIG_MMC_TIFM_SD=y
+CONFIG_MMC_SPI=y
+CONFIG_MMC_SDHCI_OMAP=y
+CONFIG_MMC_SDHCI_AM654=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=m
+CONFIG_LEDS_CPCAP=m
+CONFIG_LEDS_LM3532=m
+CONFIG_LEDS_GPIO=m
+CONFIG_LEDS_PCA963X=m
+CONFIG_LEDS_PWM=m
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=m
+CONFIG_LEDS_TRIGGER_ONESHOT=m
+CONFIG_LEDS_TRIGGER_HEARTBEAT=m
+CONFIG_LEDS_TRIGGER_BACKLIGHT=m
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_GPIO=m
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS1307=m
+CONFIG_RTC_DRV_PCF8523=m
+CONFIG_RTC_DRV_PCF8563=m
+CONFIG_RTC_DRV_M41T80=m
+CONFIG_RTC_DRV_TWL92330=y
+CONFIG_RTC_DRV_PALMAS=m
+CONFIG_RTC_DRV_OMAP=m
+CONFIG_RTC_DRV_CPCAP=m
+CONFIG_DMADEVICES=y
+CONFIG_TI_CPPI41=y
+CONFIG_COMMON_CLK_CDCE706=y
+CONFIG_COMMON_CLK_CDCE925=y
+CONFIG_CLK_TWL6040=m
+CONFIG_COMMON_CLK_PALMAS=m
+CONFIG_OMAP_IOMMU=y
+CONFIG_REMOTEPROC=y
+CONFIG_OMAP_REMOTEPROC=m
+CONFIG_WKUP_M3_RPROC=m
+CONFIG_SOC_TI=y
+CONFIG_AMX3_PM=m
+CONFIG_WKUP_M3_IPC=m
+CONFIG_EXTCON_PALMAS=m
+CONFIG_EXTCON_USB_GPIO=m
+CONFIG_TI_EMIF=m
+CONFIG_TI_EMIF_SRAM=m
+CONFIG_IIO=m
+CONFIG_IIO_SW_DEVICE=m
+CONFIG_IIO_SW_TRIGGER=m
+CONFIG_IIO_ST_ACCEL_3AXIS=m
+CONFIG_CPCAP_ADC=m
+CONFIG_INA2XX_ADC=m
+CONFIG_TI_AM335X_ADC=m
+CONFIG_TWL4030_MADC=m
+CONFIG_SENSORS_ISL29028=m
+CONFIG_BMP280=m
+CONFIG_PWM=y
+CONFIG_PWM_OMAP_DMTIMER=m
+CONFIG_PWM_TIECAP=m
+CONFIG_PWM_TIEHRPWM=m
+CONFIG_PWM_TWL=y
+CONFIG_PWM_TWL_LED=y
+CONFIG_PHY_CPCAP_USB=m
+CONFIG_PHY_MAPPHONE_MDM6600=m
+CONFIG_PHY_ATH79_USB=m
+CONFIG_PHY_DM816X_USB=m
+CONFIG_OMAP_USB2=y
+CONFIG_TI_PIPE3=y
+CONFIG_TWL4030_USB=m
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT4_FS_SECURITY=y
+CONFIG_FANOTIFY=y
+CONFIG_QUOTA=y
+CONFIG_QFMT_V2=y
+CONFIG_AUTOFS4_FS=m
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_UBIFS_FS=y
+CONFIG_CRAMFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_SECURITY=y
+CONFIG_CRYPTO_MICHAEL_MIC=y
+CONFIG_CRYPTO_DEV_OMAP=m
+CONFIG_CRYPTO_DEV_OMAP_SHAM=m
+CONFIG_CRYPTO_DEV_OMAP_AES=m
+CONFIG_CRYPTO_DEV_OMAP_DES=m
+CONFIG_CRC_CCITT=y
+CONFIG_CRC_T10DIF=y
+CONFIG_LIBCRC32C=y
+CONFIG_DMA_CMA=y
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_PRINTK_TIME=y
+CONFIG_BOOT_PRINTK_DELAY=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_SCHEDSTATS=y
+CONFIG_MEMTEST=y
+CONFIG_EARLY_PRINTK=y
diff --git a/board/ultratronik/omap3_mws4/kernel_patches/mws4.patch b/board/ultratronik/omap3_mws4/kernel_patches/mws4.patch
new file mode 100644
index 0000000000..9d8bc1e175
--- /dev/null
+++ b/board/ultratronik/omap3_mws4/kernel_patches/mws4.patch
@@ -0,0 +1,575 @@
+diff --git a/arch/arm/boot/dts/omap3-mws4.dts b/arch/arm/boot/dts/omap3-mws4.dts
+new file mode 100644
+index 000000000000..ac97b9b7639d
+--- /dev/null
++++ b/arch/arm/boot/dts/omap3-mws4.dts
+@@ -0,0 +1,328 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
++ *
++ * Modified 2015 by Bernhard Gaetzschmann, Ultratronik from Beagleboard xM
++ *
++ * Modified 2022 Marian Ulbricht ulbricht@innoroute.de
++ *
++ */
++/dts-v1/;
++#include "omap36xx.dtsi"
++
++/ {
++ model = "Ultratronik BFS MWS4";
++ compatible = "ti,omap3-mws4", "ti,omap36xx", "ti,omap3";
++ cpus {
++ cpu@0 {
++ cpu0-supply = <&vcc>;
++ };
++ };
++
++ memory {
++ device_type = "memory";
++ reg = <0x80000000 0x10000000>; // 256 MB
++ };
++
++ aliases {
++ i2c0 = &i2c1;
++ i2c1 = &i2c2;
++ i2c2 = &i2c3;
++ serial0 = &uart1;
++ serial1 = &uart2;
++ serial2 = &uart3;
++ mmc1 = &mmc1;
++ };
++
++ netcard: AX88796BLI@ffdf0000 {
++ compatible = "ax88796_dt";
++ reg = <0xffdf0000 0x1000> ;
++
++};
++
++ watchdog_max: watchdog {
++ compatible = "linux,wdt-gpio";
++ gpios = <&gpio4 21 1>; //117
++ hw_algo = "toggle";
++ always-running;
++ hw_margin_ms = <900>;
++ };
++
++ hsusb1_phy: hsusb1_phy {
++ status = "disabled";
++ };
++
++ /* HS USB Host PHY on PORT 2 */
++ hsusb2_phy: hsusb2_phy {
++ status = "disabled";
++ };
++
++ /* fixed 19.2MHz oscillator */
++ hfclk_19m2: oscillator {
++ #clock-cells = <0>;
++ compatible = "fixed-clock";
++ clock-frequency = <19200000>;
++ };
++
++leds {
++ compatible = "gpio-leds";
++ pinctrl-names = "default";
++ pinctrl-0 = <&led_pins>;
++ led_sm {
++ label = "led_sm";
++ gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */
++ default-state = "on";
++ };
++
++ led1 {
++ label = "led1";
++ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */
++ linux,default-trigger = "cpu";
++ };
++
++ led2 {
++ label = "led2";
++ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* 103 */
++ linux,default-trigger = "mmc0";
++ };
++
++ led3 {
++ label = "led3";
++ gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
++ linux,default-trigger = "usb-host";
++ };
++
++ led_usb {
++ label = "led_usb";
++ gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>; /* 110 */
++ default-state = "on";
++ };
++ };
++};
++
++&gpmc {
++ ranges = <0 0 0x30000000 0x1000000 /* CS0 space, 16MB */
++ 255 0 0x6e000000 0x02d4>; /* register space */
++
++ /* Chip select 0 */
++ nand@0,0 {
++ compatible = "ti,omap2-nand";
++ reg = <0 0 4 /* NAND I/O window, 4 bytes */
++ 255 0 0x02d4>; /* GPMC register space */
++ interrupts = <20>;
++ ti,nand-ecc-opt = "bch4";
++ nand-bus-width = <16>;
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ gpmc,cs-on-ns = <0>;
++ gpmc,cs-rd-off-ns = <36>;
++ gpmc,cs-wr-off-ns = <36>;
++ gpmc,adv-on-ns = <6>;
++ gpmc,adv-rd-off-ns = <24>;
++ gpmc,adv-wr-off-ns = <36>;
++ gpmc,oe-on-ns = <6>;
++ gpmc,oe-off-ns = <48>;
++ gpmc,we-on-ns = <6>;
++ gpmc,we-off-ns = <30>;
++ gpmc,rd-cycle-ns = <72>;
++ gpmc,wr-cycle-ns = <72>;
++ gpmc,access-ns = <54>;
++ gpmc,wr-access-ns = <30>;
++
++ partition@0 {
++ label = "X-Loader";
++ reg = <0 0x40000>;
++ };
++
++ partition@40000 {
++ label = "U-Boot";
++ reg = <0x40000 0x100000>;
++ };
++
++ partition@100000 {
++ label = "U-Boot Env";
++ reg = <0x100000 0x120000>;
++ };
++
++ partition@120000 {
++ label = "dt";
++ reg = <0x120000 0x140000>;
++ };
++
++ partition@140000 {
++ label = "Kernel";
++ reg = <0x140000 0xB40000>;
++ };
++
++ partition@B40000 {
++ label = "Filesystem";
++ reg = <0xB40000 0xf4c0000>;
++ };
++ };
++};
++
++&usbhshost {
++ status = "disabled";
++};
++
++&omap3_pmx_core {
++ mmc1_pins: pinmux_mmc1_pins {
++ pinctrl-single,pins = <
++ OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
++ OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
++ OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
++ OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
++ OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
++ OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
++ >;
++ };
++
++ wd_pins: pinmux_wd_pins {
++ pinctrl-single,pins = <
++ OMAP3_CORE1_IOPAD(0x213e, PIN_OUTPUT | MUX_MODE4) // CONTROL_PADCONF_MCBSP2_CLKX 0x013E
++ >;
++ };
++
++ i2c1_pins: pinmux_i2c1_pins {
++ pinctrl-single,pins = <
++ OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
++ OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
++ >;
++ };
++
++ hsusb0_pins: pinmux_hsusb0_pins {
++ pinctrl-single,pins = <
++ OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
++ OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
++ OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
++ OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
++ OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data0.hsusb2_data0 */
++ OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
++ OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
++ OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data3 */
++ OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data4 */
++ OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data5 */
++ OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data6 */
++ OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
++ >;
++ };
++
++ led_pins: pinmux_led_pins {
++ pinctrl-single,pins = <
++ OMAP3_CORE1_IOPAD(0x211a, PIN_OUTPUT | MUX_MODE4) /* gpio101*/
++ OMAP3_CORE1_IOPAD(0x211c, PIN_OUTPUT | MUX_MODE4) /* gpio102*/
++ OMAP3_CORE1_IOPAD(0x211e, PIN_OUTPUT | MUX_MODE4) /* gpio103 */
++ OMAP3_CORE1_IOPAD(0x2120, PIN_OUTPUT | MUX_MODE4) /* gpio103 */
++ >;
++ };
++
++ gpio_pins: pinmux_gpio_pins {
++ pinctrl-single,pins = <
++ OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE4) /* gpio105 spontanmeldung*/
++ OMAP3_CORE1_IOPAD(0x212c, PIN_OUTPUT | MUX_MODE4) /* gpio110 usb2_en*/
++ OMAP3_CORE1_IOPAD(0x218C, PIN_OUTPUT | MUX_MODE4) /* GPO0*/
++ OMAP3_CORE1_IOPAD(0x218E, PIN_OUTPUT | MUX_MODE4) /* GPO1*/
++ OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE4) /* GPO2*/
++ OMAP3_CORE1_IOPAD(0x2192, PIN_OUTPUT | MUX_MODE4) /* GPO3*/
++ OMAP3_CORE1_IOPAD(0x2194, PIN_OUTPUT | MUX_MODE4) /* GPO4*/
++ OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE4) /* GPO5*/
++ OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPO6*/
++ OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT | MUX_MODE4) //IN1
++ OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT | MUX_MODE4) //IN2
++ OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE4) //IN3
++ OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE4) //IN4
++ OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE4) //IN5
++ OMAP3_CORE1_IOPAD(0x25F4, PIN_OUTPUT | MUX_MODE4) /* RES_RS232*/
++ OMAP3_CORE1_IOPAD(0x25F6, PIN_OUTPUT | MUX_MODE4) /* HUB_RESET*/
++ >;
++ };
++};
++
++&i2c1 {
++ pinctrl-names = "default";
++
++ pinctrl-0 = <&i2c1_pins>;
++ clock-frequency = <100000>;
++ twl: twl@48 {
++ reg = <0x48>;
++ interrupts = <7>; /* SYS_NIRQ cascaded to intc */
++ interrupt-parent = <&intc>;
++ clocks = <&hfclk_19m2>;
++ clock-names = "fck";
++ twl_power: power {
++ compatible = "ti,twl4030-power";
++ ti,system-power-controller;
++ };
++ };
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++ rtc8564: rtc8564@51 {
++ compatible = "epson,rtc8564";
++ reg = <0x51>;
++ #clock-cells = <0>;
++ };
++};
++
++&i2c3 {
++ clock-frequency = <100000>;
++};
++
++#include "twl4030.dtsi"
++#include "twl4030_omap3.dtsi"
++
++&mmc1 {
++ vmmc-supply = <&vmmc1>;
++ vqmmc-supply = <&vsim>;
++ bus-width = <4>;
++};
++
++&mmc2 {
++ status = "disabled";
++};
++
++&mmc3 {
++ status = "disabled";
++};
++
++&uart1 {
++ pinctrl-names = "default";
++};
++
++&uart2 {
++ pinctrl-names = "default";
++};
++
++&uart3 {
++ pinctrl-names = "default";
++};
++
++&usb_otg_hs {
++ pinctrl-names = "default";
++ pinctrl-0 = <&hsusb0_pins>;
++ num-eps = <16>;
++ ram-bits = <12>;
++ interface-type = <0>;
++ usb-phy = <&usb2_phy>;
++ phys = <&usb2_phy>;
++ phy-names = "usb2-phy";
++ mode = <1>;
++ power = <500>;
++};
++
++&iva {
++ status = "disabled";
++};
++
++&sgx_module {
++ status = "disabled";
++};
++
++&vaux2 {
++ regulator-name = "usb_1v8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-always-on;
++};
+diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
+index e8e9c166185d..672e20ccd4d3 100644
+--- a/drivers/net/ethernet/Kconfig
++++ b/drivers/net/ethernet/Kconfig
+@@ -43,6 +43,7 @@ source "drivers/net/ethernet/chelsio/Kconfig"
+ source "drivers/net/ethernet/cirrus/Kconfig"
+ source "drivers/net/ethernet/cisco/Kconfig"
+ source "drivers/net/ethernet/cortina/Kconfig"
++source "drivers/net/ethernet/asix/Kconfig"
+
+ config CX_ECAT
+ tristate "Beckhoff CX5020 EtherCAT master support"
+diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
+index 05abebc17804..049b7b1f0120 100644
+--- a/drivers/net/ethernet/Makefile
++++ b/drivers/net/ethernet/Makefile
+@@ -96,3 +96,4 @@ obj-$(CONFIG_NET_VENDOR_XILINX) += xilinx/
+ obj-$(CONFIG_NET_VENDOR_XIRCOM) += xircom/
+ obj-$(CONFIG_NET_VENDOR_SYNOPSYS) += synopsys/
+ obj-$(CONFIG_NET_VENDOR_PENSANDO) += pensando/
++obj-$(CONFIG_AX88796DT) += asix/
+diff --git a/drivers/net/ethernet/asix/Kconfig b/drivers/net/ethernet/asix/Kconfig
+new file mode 100644
+index 000000000000..9009131a0000
+--- /dev/null
++++ b/drivers/net/ethernet/asix/Kconfig
+@@ -0,0 +1,6 @@
++config AX88796DT
++ tristate "AX88796 devicetree support"
++ depends on AX88796
++ ---help---
++ ax88796 devicetree wrapper
++
+diff --git a/drivers/net/ethernet/asix/Makefile b/drivers/net/ethernet/asix/Makefile
+new file mode 100644
+index 000000000000..43a699eae787
+--- /dev/null
++++ b/drivers/net/ethernet/asix/Makefile
+@@ -0,0 +1,3 @@
++
++
++obj-$(CONFIG_AX88796DT) += ax88796_dt.o
+diff --git a/drivers/net/ethernet/asix/ax88796_dt.c b/drivers/net/ethernet/asix/ax88796_dt.c
+new file mode 100644
+index 000000000000..048c8aa1feda
+--- /dev/null
++++ b/drivers/net/ethernet/asix/ax88796_dt.c
+@@ -0,0 +1,193 @@
++// devicetree driver for ax88796 platform device
++// ulbricht@innoroute.de 2021
++// GPLv3
++#include <linux/init.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/of.h>
++#include <linux/of_platform.h>
++#include <linux/of_address.h>
++#include <net/ax88796.h>
++#include <linux/platform_data/gpmc-omap.h>
++#include <linux/omap-gpmc.h>
++#include <linux/gpio.h>
++
++#define ETH_GPIO_IRQ 130
++#define ETH_GPIO_FIFO 131
++#define ETH_DRIVER_NAME "ax88796"
++#define ETH_CS 4
++#define ETH_CS_SIZE SZ_16M
++struct mmi4_eth_data{
++ int irq_gpio;
++ int fifo_gpio;
++ int cs;
++};
++
++static struct resource ofsp8_400_eth_resources[] = {
++ {
++ .flags = IORESOURCE_MEM,
++ }, {
++ .flags = IORESOURCE_MEM,
++ }, {
++ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
++ }
++};
++static u8 default_mac_addr [6] = {0x00, 0x1b, 0xe8, 0x00, 0x00, 0x00,};
++
++static struct ax_plat_data ofsp8_400_eth_platdata = {
++ .flags = AXFLG_MAC_FROMPLATFORM,
++ .wordlength = 2,
++ .mac_addr = default_mac_addr,
++};
++static struct platform_device ofsp8_400_eth_device = {
++ .name = ETH_DRIVER_NAME,
++ .id = -1,
++ .resource = ofsp8_400_eth_resources,
++ .num_resources = ARRAY_SIZE(ofsp8_400_eth_resources),
++ .dev = {
++ .platform_data = &ofsp8_400_eth_platdata,
++ },
++};
++
++static struct of_device_id match_table[] = {
++ {
++ .compatible = "ax88796_dt",
++ },
++ {0}
++};
++int fill_platform_device(struct platform_device *eth_plat_dev, struct mmi4_eth_data *eth_data) {
++ eth_data->irq_gpio=130;
++ eth_data->cs=4;
++ eth_data->fifo_gpio=0;
++ return 0;
++
++}
++static int __init setup_ethmac(char *str)
++{
++ char *mac_part;
++ int mac_len = 18;
++ char tmp_ethaddr[mac_len];
++ char *cur_pos;
++ int i;
++
++ if(str[0] == '\0')
++ return 1;
++
++ cur_pos = &tmp_ethaddr[0];
++ strncpy(tmp_ethaddr, str, mac_len);
++ for(i=0; i < mac_len / 3; i++) {
++ mac_part = strsep(&cur_pos, ":");
++ if( mac_part != NULL)
++ ofsp8_400_eth_platdata.mac_addr[i] = (u8) simple_strtol(mac_part, NULL, 16);
++ else
++ return 1;
++ }
++
++ return 0;
++}
++struct mmi4_eth_data eth_data = {
++ .irq_gpio = ETH_GPIO_IRQ,
++ .fifo_gpio = ETH_GPIO_FIFO,
++ .cs = ETH_CS,
++};
++
++void ofsp8_400_eth_init(void)
++{
++ int err;
++ unsigned long cs_mem_base;
++ if(fill_platform_device(&ofsp8_400_eth_device, ð_data))
++ return;
++
++ /* ax88796 driver does not support clk-framework, so clk_get
++ and clk_enable should be called here. But as this is
++ called before clk-initialization this is not possible.
++ So we relay on other hardware to keep l3_clk alive.
++ */
++
++ err = gpio_request(eth_data.irq_gpio, ETH_DRIVER_NAME " irq");
++ if (err) {
++ pr_err("%s: Failed to request GPIO%d for IRQ\n", ofsp8_400_eth_device.name,
++ eth_data.irq_gpio);
++ goto err_req_gpio_irq;
++ }
++ gpio_direction_input(eth_data.irq_gpio);
++ if ( eth_data.fifo_gpio > 0 )
++ err = gpio_request(eth_data.fifo_gpio, ETH_DRIVER_NAME " fifo");
++ else
++ pr_notice ("Ethernet FIFO GPIO is not defined\n");
++ if (err) {
++ pr_err("%s: Failed to request GPIO%d for "
++ "FIFO-select\n", ofsp8_400_eth_device.name,
++ eth_data.fifo_gpio);
++ goto err_req_gpio_fifo;
++ }
++ if ( eth_data.fifo_gpio > 0 )
++ gpio_direction_output(eth_data.fifo_gpio, 0);
++
++ ofsp8_400_eth_device.resource[2].start = gpio_to_irq(eth_data.irq_gpio);
++ ofsp8_400_eth_device.resource[2].end = gpio_to_irq(eth_data.irq_gpio);
++
++ gpmc_cs_request(eth_data.cs, SZ_16M, &cs_mem_base);
++
++ ofsp8_400_eth_device.resource[0].start = cs_mem_base;
++ ofsp8_400_eth_device.resource[0].end = cs_mem_base + (0x18 << 1) - 1;
++ ofsp8_400_eth_device.resource[1].start = cs_mem_base + (0x1f << 1);
++ ofsp8_400_eth_device.resource[1].end = cs_mem_base + (0x20 << 1) - 1;
++
++ err = platform_device_register(&ofsp8_400_eth_device);
++ if (err) {
++ pr_err("%s: Failed to add platform device\n", ETH_DRIVER_NAME);
++ goto err_pdev;
++ }
++
++ return;
++
++err_pdev:
++ gpio_free(eth_data.fifo_gpio);
++err_req_gpio_fifo:
++ gpio_free(eth_data.irq_gpio);
++err_req_gpio_irq:
++ return;
++}
++static int ax88796_dt_probe(struct platform_device *dev)
++{
++// struct uio_info *uioinfo;
++ struct resource *r = &dev->resource[0];
++
++// uioinfo->name = dev->dev.of_node->name /* name from device tree: "my_device" */
++// uioinfo->mem[0].addr = r->start; /* device address from device tree */
++// uioinfo->mem[0].size = resource_size(r); /* size from device tree */
++ printk(KERN_ERR "init ax88796 by devicetree\n");
++ printk(KERN_ERR "name:%s addr:0x%llx size:%i\n",dev->dev.of_node->name,r->start,resource_size(r));
++ ofsp8_400_eth_init();
++ return 0;
++}
++
++static int ax88796_dt_remove(struct platform_device *dev){
++
++
++return 0;
++}
++
++
++
++static struct platform_driver ax88796_dt_platform_driver = {
++ .probe = ax88796_dt_probe,
++ .remove = ax88796_dt_remove,
++ .driver = {
++ .name = "ax88796_dt",
++ .owner = THIS_MODULE,
++ .of_match_table = of_match_ptr(match_table),
++ },
++};
++
++
++MODULE_DEVICE_TABLE(of, match_table);
++module_param_string(of_id, match_table[0].compatible, 128, 0);
++MODULE_PARM_DESC(of_id, "Openfirmware id of the device to be handled by uio");
++
++module_platform_driver(ax88796_dt_platform_driver);
++MODULE_AUTHOR("Marian Ulbricht");
++MODULE_DESCRIPTION("ax88796 devicetree wrapper");
++MODULE_LICENSE("GPL v2");
++MODULE_ALIAS("platform:" "ax88796_dt");
diff --git a/board/ultratronik/omap3_mws4/overlay-base/etc/network/interfaces b/board/ultratronik/omap3_mws4/overlay-base/etc/network/interfaces
new file mode 100644
index 0000000000..ddd3defe73
--- /dev/null
+++ b/board/ultratronik/omap3_mws4/overlay-base/etc/network/interfaces
@@ -0,0 +1,8 @@
+# Configure Loopback
+auto lo
+iface lo inet loopback
+
+auto eth0
+allow-hotplug eth0
+iface eth0 inet dhcp
+
diff --git a/board/ultratronik/omap3_mws4/overlay-base/usr/mws4/GPIO_init.sh b/board/ultratronik/omap3_mws4/overlay-base/usr/mws4/GPIO_init.sh
new file mode 100755
index 0000000000..303d73fb75
--- /dev/null
+++ b/board/ultratronik/omap3_mws4/overlay-base/usr/mws4/GPIO_init.sh
@@ -0,0 +1,70 @@
+#usbensble
+echo 110 > /sys/class/gpio/export
+echo "out" > /sys/class/gpio/gpio110/direction
+echo 1 > /sys/class/gpio/gpio110/value
+
+#GPO0
+echo 156 > /sys/class/gpio/export
+echo "out" > /sys/class/gpio/gpio156/direction
+echo 0 > /sys/class/gpio/gpio156/value
+
+#GPO1
+echo 157 > /sys/class/gpio/export
+echo "out" > /sys/class/gpio/gpio157/direction
+echo 0 > /sys/class/gpio/gpio157/value
+
+#GPO2
+echo 158 > /sys/class/gpio/export
+echo "out" > /sys/class/gpio/gpio158/direction
+echo 0 > /sys/class/gpio/gpio158/value
+
+#GPO3
+echo 159 > /sys/class/gpio/export
+echo "out" > /sys/class/gpio/gpio159/direction
+echo 0 > /sys/class/gpio/gpio159/value
+
+#GPO4
+echo 160 > /sys/class/gpio/export
+echo "out" > /sys/class/gpio/gpio160/direction
+echo 0 > /sys/class/gpio/gpio160/value
+
+#GPO5
+echo 161 > /sys/class/gpio/export
+echo "out" > /sys/class/gpio/gpio161/direction
+echo 0 > /sys/class/gpio/gpio161/value
+
+#GPO6
+echo 162 > /sys/class/gpio/export
+echo "out" > /sys/class/gpio/gpio162/direction
+echo 0 > /sys/class/gpio/gpio162/value
+
+#RES RS232
+echo 26 > /sys/class/gpio/export
+echo "out" > /sys/class/gpio/gpio26/direction
+echo 1 > /sys/class/gpio/gpio26/value
+
+#hub_reset
+echo 27 > /sys/class/gpio/export
+echo "out" > /sys/class/gpio/gpio27/direction
+echo 1 > /sys/class/gpio/gpio27/value
+
+#DIN1
+echo 99 > /sys/class/gpio/export
+echo "in" > /sys/class/gpio/gpio99/direction
+
+#DIN2
+echo 100 > /sys/class/gpio/export
+echo "in" > /sys/class/gpio/gpio100/direction
+
+#DIN3
+echo 106 > /sys/class/gpio/export
+echo "in" > /sys/class/gpio/gpio106/direction
+
+#DIN4
+echo 107 > /sys/class/gpio/export
+echo "in" > /sys/class/gpio/gpio107/direction
+
+#DIN5
+echo 108 > /sys/class/gpio/export
+echo "in" > /sys/class/gpio/gpio108/direction
+
diff --git a/board/ultratronik/omap3_mws4/overlay-base/usr/mws4/flash_ubi.sh b/board/ultratronik/omap3_mws4/overlay-base/usr/mws4/flash_ubi.sh
new file mode 100755
index 0000000000..79f5e0af72
--- /dev/null
+++ b/board/ultratronik/omap3_mws4/overlay-base/usr/mws4/flash_ubi.sh
@@ -0,0 +1,6 @@
+#!/bin/bash
+mkdir /mnt/flash
+mount /dev/mmcblk0p3 /mnt/flash/
+flash_erase /dev/mtd5 0 0
+nandwrite -p /dev/mtd5 /mnt/flash/rootfs.ubi
+echo "done"
diff --git a/board/ultratronik/omap3_mws4/patches/uboot/uboot-2022.04-mws4.patch b/board/ultratronik/omap3_mws4/patches/uboot/uboot-2022.04-mws4.patch
new file mode 100644
index 0000000000..d2b55ebd0e
--- /dev/null
+++ b/board/ultratronik/omap3_mws4/patches/uboot/uboot-2022.04-mws4.patch
@@ -0,0 +1,924 @@
+From ef6e134d06d31c04417d555487be7023243c3fff Mon Sep 17 00:00:00 2001
+From: Marian Ulbricht <ulbricht@innoroute.de>
+Date: Sun, 8 May 2022 17:17:33 +0200
+Subject: [PATCH 1/1] [PATCH v2 1/1] add support for mws4 board
+
+Signed-off-by: Marian Ulbricht <ulbricht@innoroute.de>
+---
+ arch/arm/dts/Makefile | 3 +
+ arch/arm/dts/omap3-mws4-u-boot.dtsi | 14 ++
+ arch/arm/dts/omap3-mws4.dts | 137 +++++++++++++++++
+ arch/arm/mach-omap2/omap3/Kconfig | 10 ++
+ board/ultratronik/mws4/Kconfig | 12 ++
+ board/ultratronik/mws4/MAINTAINERS | 6 +
+ board/ultratronik/mws4/Makefile | 6 +
+ board/ultratronik/mws4/default.env | 11 ++
+ board/ultratronik/mws4/mws4.c | 226 ++++++++++++++++++++++++++++
+ board/ultratronik/mws4/mws4.h | 203 +++++++++++++++++++++++++
+ configs/omap3_mws4_defconfig | 74 +++++++++
+ include/configs/omap3_mws4.h | 100 ++++++++++++
+ 12 files changed, 802 insertions(+)
+ create mode 100644 arch/arm/dts/omap3-mws4-u-boot.dtsi
+ create mode 100644 arch/arm/dts/omap3-mws4.dts
+ create mode 100644 board/ultratronik/mws4/Kconfig
+ create mode 100644 board/ultratronik/mws4/MAINTAINERS
+ create mode 100644 board/ultratronik/mws4/Makefile
+ create mode 100644 board/ultratronik/mws4/default.env
+ create mode 100644 board/ultratronik/mws4/mws4.c
+ create mode 100644 board/ultratronik/mws4/mws4.h
+ create mode 100644 configs/omap3_mws4_defconfig
+ create mode 100644 include/configs/omap3_mws4.h
+
+diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
+index 83630af4f6..7b68a49990 100644
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -1047,6 +1047,9 @@ dtb-$(CONFIG_TARGET_OMAP3_BEAGLE) += \
+ omap3-beagle-xm.dtb \
+ omap3-beagle.dtb
+
++dtb-$(CONFIG_TARGET_OMAP3_MWS4) += \
++ omap3-mws4.dtb
++
+ dtb-$(CONFIG_TARGET_OMAP3_IGEP00X0) += \
+ omap3-igep0020.dtb
+
+diff --git a/arch/arm/dts/omap3-mws4-u-boot.dtsi b/arch/arm/dts/omap3-mws4-u-boot.dtsi
+new file mode 100644
+index 0000000000..2c03701c89
+--- /dev/null
++++ b/arch/arm/dts/omap3-mws4-u-boot.dtsi
+@@ -0,0 +1,14 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * U-Boot additions
++ *
++ * (C) Copyright 2017 Derald D. Woods <woods.technical@gmail.com>
++ */
++
++#include "omap3-u-boot.dtsi"
++
++/ {
++ chosen {
++ stdout-path = &uart3;
++ };
++};
+diff --git a/arch/arm/dts/omap3-mws4.dts b/arch/arm/dts/omap3-mws4.dts
+new file mode 100644
+index 0000000000..f8a5c3d5b8
+--- /dev/null
++++ b/arch/arm/dts/omap3-mws4.dts
+@@ -0,0 +1,137 @@
++/*
++ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
++ *
++ * Modified 2015 by Bernhard Gätzschmann, Ultratronik from Beagleboard xM
++ *
++ * Modified 2022 Marian Ulbricht ulbricht@innoroute.de
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++/dts-v1/;
++
++#include "omap34xx.dtsi"
++
++/ {
++ model = "Ultratronik BFS MWS4";
++ compatible = "ti,omap3-mmi4", "ti,omap3";
++
++ memory {
++ device_type = "memory";
++ reg = <0x80000000 0x10000000>; /* 256 MB */
++ };
++
++ hwconfig {
++ i_enable_mmc = <1>;
++ i_enable_musb = <1>;
++ i_musb_mode = <1>;/*0-undefined, 1-HOST, 2-PERIPHERAL, 3-OTG*/
++ i_musb_power=<500>;
++ i_enable_ehci = <0>;
++ i_usb_reset_gpio = <20>; /* DUMMY Entry */
++ i_enable_eth = <1>;
++ i_eth_irq_gpio = <130>;
++ i_eth_fifo_gpio = <0>;
++ i_eth_cs = <4>;
++ i_gpio_leds_0 = "led0:red", "none", "false", "102", "0";
++ i_gpio_leds_1 = "led1:yellow", "none", "false", "103", "0";
++ i_gpio_leds_2 = "led2:green", "none", "false", "104", "0";
++ i_gpio_leds_3 = "led3:orange", "none", "false", "101", "0";
++ i_gpio_leds_4 = "usb:enable", "none", "false", "110", "1";
++ i_gpio_leds_5 = "usbhub:reset", "none", "false", "27", "0";
++ i_gpio_leds_6 = "iic:reset", "none", "false", "163", "0";
++ i_gpio_leds_7 = "rs232:reset", "none", "false", "26", "0";
++ i_i2c_bus_hw_2 = "2", "100";
++ i_i2c_device_0 = "rtc8564", "0x51", "2";
++ i_i2c_bus_hw_3 = "3", "100";
++ i_enable_flash = <1>;
++ i_enable_audio = <0>;
++ i_enable_video = <0>;
++ i_enable_can = <0>;
++ };
++
++ ue_pinctrl {
++/* GPIO: HW ID */
++ pin_94 = "cam_hs.gpio_94", "IEN", "PTU", "DIS"; /* GPIO_94 */
++ pin_95 = "cam_vs.gpio_95", "IEN", "PTU", "DIS"; /* GPIO_95 */
++ pin_96 = "cam_xclka.gpio_96", "IEN", "PTU", "DIS"; /* GPIO_96 */
++
++/* GPIO: Digital Out */
++ pin_156 = "mcbsp1_clkr.gpio_156", "IEN", "PTU", "DIS"; /* GPIO_156 */
++ pin_157 = "mcbsp1_fsr.gpio_157", "IEN", "PTU", "DIS"; /* GPIO_157 */
++ pin_158 = "mcbsp1_dx.gpio_158", "IEN", "PTU", "DIS"; /* GPIO_158 */
++ pin_159 = "mcbsp1_dr.gpio_159", "IEN", "PTU", "DIS"; /* GPIO_159 */
++ pin_160 = "mcbsp_clks.gpio_160", "IEN", "PTU", "DIS"; /* GPIO_160 */
++ pin_161 = "mcbsp1_fsx.gpio_161", "IEN", "PTU", "DIS"; /* GPIO_161 */
++ pin_162 = "mcbsp1_clkx.gpio_162", "IEN", "PTU", "DIS"; /*GPIO_162 */
++
++/* GPIO: Digital In */
++ pin_99 = "cam_d0.gpio_99", "IEN", "PTU", "DIS"; /* D_IN1_I */
++ pin_100 = "cam_d1.gpio_100", "IEN", "PTU", "DIS"; /* D_IN2_I */
++ pin_106 = "cam_d7.gpio_106", "IEN", "PTD", "DIS"; /* D_IN3_I */
++ pin_107 = "cam_d8.gpio_107", "IEN", "PTD", "DIS"; /* D_IN4_I */
++ pin_108 = "cam_d9.gpio_108", "IEN", "PTD", "DIS"; /* D_IN5_I */
++
++/* GPIO: Watchdog Trigger */
++ pin_117 = "mcbsp2_clkx.gpio_117", "IDIS", "PTD", "DIS"; /* WD_TRIGGER */
++
++/* GPIO: TestAdapter */
++ pin_171 = "mcspi1_clk.gpio_171", "IEN", "PTU", "DIS"; /* TP200 */
++ pin_172 = "mcspi1_simo.gpio_172", "IEN", "PTU", "DIS"; /* TP201 */
++ pin_173 = "mcspi1_somi.gpio_173", "IEN", "PTU", "DIS"; /* TP202 */
++ pin_174 = "mcspi1_cs0.gpio_174", "IEN", "PTU", "DIS"; /* TP203 */
++ pin_177 = "mcspi1_cs3.gpio_177", "IEN", "PTU", "DIS"; /* TP204 */
++ pin_178 = "mcspi2_clk.gpio_178", "IEN", "PTU", "DIS"; /* TP205 */
++ pin_179 = "mcspi2_simo.gpio_179", "IEN", "PTU", "DIS"; /* TP206 */
++ pin_180 = "mcspi2_somi.gpio_180", "IEN", "PTU", "DIS"; /* TP207 */
++ pin_1 = "sys_clkreq.gpio_1", "IEN", "PTU", "DIS"; /* TP240 */
++
++
++/* USB0 */
++ pin_120 = "hsusb0_clk.hsusb0_clk", "IEN", "PTD", "DIS"; /* USB0 CLK */
++ pin_121 = "hsusb0_stp.hsusb0_stp", "IDIS", "PTU", "EN"; /* USB0 STP */
++ pin_122 = "hsusb0_dir.hsusb0_dir", "IEN", "PTD", "DIS"; /* USB0 DIR */
++ pin_124 = "hsusb0_nxt.hsusb0_nxt", "IEN", "PTD", "DIS"; /* USB0 NXT */
++ pin_125 = "hsusb0_data0.hsusb0_data0", "IEN", "PTD", "DIS"; /* USB0 D0 */
++ pin_0130 = "hsusb0_data1.hsusb0_data1", "IEN", "PTD", "DIS"; /* USB0 D1 */
++ pin_0131 = "hsusb0_data2.hsusb0_data2", "IEN", "PTD", "DIS"; /* USB0 D2 */
++ pin_169 = "hsusb0_data3.hsusb0_data3", "IEN", "PTD", "DIS"; /* USB0 D3 */
++ pin_188 = "hsusb0_data4.hsusb0_data4", "IEN", "PTD", "DIS"; /* USB0 D4 */
++ pin_189 = "hsusb0_data5.hsusb0_data5", "IEN", "PTD", "DIS"; /* USB0 D5 */
++ pin_190 = "hsusb0_data6.hsusb0_data6", "IEN", "PTD", "DIS"; /* USB0 D6 */
++ pin_191 = "hsusb0_data7.hsusb0_data7", "IEN", "PTD", "DIS"; /* USB0 D7 */
++ pin_110 = "cam_d11.gpio_110", "IEN", "PTD", "DIS"; /* #USB_OTG_RESET */
++ pin_27 = "etk_d13.gpio_27", "IEN", "PTD", "DIS"; /* #USB_HUB_RESET */
++
++/* SERIELL */
++ pin_148 = "uart1_tx.uart1_tx", "IDIS", "PTD", "DIS"; /* TXD1 */
++ pin_151 = "uart1_rx.uart1_rx", "IEN", "PTU", "EN"; /* RXD1 */
++ pin_149 = "uart1_rts.uart1_rts", "IDIS", "PTD", "DIS"; /* #RTS1 */
++
++/* ETHERNET */
++ pin_55 = "gpmc_ncs4.gpmc_ncs4", "IEN", "PTU", "EN"; /* #GPMC_CS4 ETH */
++ pin_130 = "sdmmc2_clk.gpio_130", "IEN", "PTD", "DIS"; /* #ETH_IRQ */
++/* SD CARD */
++ pin_126 = "sdmmc1_dat4.gpio_126", "IEN", "PTD", "DIS"; /* SD_WP */
++ pin_59 = "gpmc_clk.gpio_59", "IEN", "PTD", "DIS"; /* #SD_CD */
++/* I2C #2 */
++ pin_168 = "i2c2_scl.i2c2_scl", "IEN", "PTU", "EN"; /* SCL2 */
++ pin_183 = "i2c2_sda.i2c2_sda", "IEN", "PTU", "EN"; /* SDA2 */
++
++/* I2C #3 */
++ pin_184 = "i2c3_scl.i2c3_scl", "IEN", "PTU", "EN"; /* SCL3 */
++ pin_185 = "i2c3_sda.i2c3_sda", "IEN", "PTU", "EN"; /* SDA3 */
++
++
++/* DIVERSES */
++ pin_101 = "cam_d2.gpio_101", "IDIS", "PTD", "DIS"; /* (Orange) LED */
++ pin_102 = "cam_d3.gpio_102", "IDIS", "PTD", "DIS"; /* (Red) LED1 */
++ pin_103 = "cam_d4.gpio_103", "IDIS", "PTD", "DIS"; /* (Yellow) LED2 */
++ pin_104 = "cam_d5.gpio_104", "IDIS", "PTD", "DIS"; /* (Green) LED3 */
++ pin_105 = "cam_d6.gpio_105", "IEN", "PTD", "DIS"; /* Push Button*/
++ pin_163 = "uart3_cts_rctx.gpio_163", "IEN", "PTD", "DIS"; /* II2 Reset */
++ pin_26 = "etk_d12.gpio_26", "IEN", "PTD", "DIS"; /* RS232 Reset */
++ };
++
++};
++
+diff --git a/arch/arm/mach-omap2/omap3/Kconfig b/arch/arm/mach-omap2/omap3/Kconfig
+index 81c898b66e..23e971b5ba 100644
+--- a/arch/arm/mach-omap2/omap3/Kconfig
++++ b/arch/arm/mach-omap2/omap3/Kconfig
+@@ -43,6 +43,15 @@ config TARGET_OMAP3_BEAGLE
+ select OMAP3_GPIO_6
+ imply CMD_DM
+
++config TARGET_OMAP3_MWS4
++ bool "Ultratrokik OMAP3 MWS4"
++ select DM
++ select DM_GPIO
++ select DM_SERIAL
++ select OMAP3_GPIO_5
++ select OMAP3_GPIO_6
++ imply CMD_DM
++
+ config TARGET_CM_T35
+ bool "CompuLab CM-T3530 and CM-T3730 boards"
+ select OMAP3_GPIO_2
+@@ -162,5 +171,6 @@ source "board/isee/igep00x0/Kconfig"
+ source "board/logicpd/omap3som/Kconfig"
+ source "board/nokia/rx51/Kconfig"
+ source "board/lg/sniper/Kconfig"
++source "board/ultratronik/mws4/Kconfig"
+
+ endif
+diff --git a/board/ultratronik/mws4/Kconfig b/board/ultratronik/mws4/Kconfig
+new file mode 100644
+index 0000000000..95d4c9e460
+--- /dev/null
++++ b/board/ultratronik/mws4/Kconfig
+@@ -0,0 +1,12 @@
++if TARGET_OMAP3_MWS4
++
++config SYS_BOARD
++ default "mws4"
++
++config SYS_VENDOR
++ default "ultratronik"
++
++config SYS_CONFIG_NAME
++ default "omap3_mws4"
++
++endif
+diff --git a/board/ultratronik/mws4/MAINTAINERS b/board/ultratronik/mws4/MAINTAINERS
+new file mode 100644
+index 0000000000..fc9022c594
+--- /dev/null
++++ b/board/ultratronik/mws4/MAINTAINERS
+@@ -0,0 +1,6 @@
++MWS4 BfS
++M: M. Ulbricht <ulbricht@innoroute.de>
++S: Maintained
++F: board/ultratronik/mws4/
++F: include/configs/omap3_mws4.h
++F: configs/omap3_mws4_defconfig
+diff --git a/board/ultratronik/mws4/Makefile b/board/ultratronik/mws4/Makefile
+new file mode 100644
+index 0000000000..507a365aeb
+--- /dev/null
++++ b/board/ultratronik/mws4/Makefile
+@@ -0,0 +1,6 @@
++# SPDX-License-Identifier: GPL-2.0+
++#
++# (C) Copyright 2000, 2001, 2002
++# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
++
++obj-y := mws4.o
+diff --git a/board/ultratronik/mws4/default.env b/board/ultratronik/mws4/default.env
+new file mode 100644
+index 0000000000..b610a9622d
+--- /dev/null
++++ b/board/ultratronik/mws4/default.env
+@@ -0,0 +1,11 @@
++arch=arm
++baudrate=115200
++board=mws4
++board_name=mws4
++bootargs=console=ttyS2,115200 earlyprintk root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait
++boot_sd=fatload mmc 0 0x80000000 uImage; fatload mmc 0 0x89000000 omap3-mws4.dtb; bootm 0x80000000 - 0x89000000
++boot_nand=nand read.e 0x80000000 0x140000 0xA00000;nand read.e 0x89000000 0x120000 0x20000;bootm 0x80000000 - 0x89000000
++bootmode_nand=setenv bootcmd run boot_nand;setenv bootargs 'console=ttyS2,115200 ubi.mtd=5 root=ubi0:rootfs rootfstype=ubifs rw rootwait';saveenv
++bootmode_sd=setenv bootcmd run boot_sd; setenv bootargs 'console=ttyS2,115200 earlyprintk root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait';saveenv
++flash_kernel=fatload mmc 0 0x80000000 uImage;nand erase 0x140000 0xA00000;nand write.e 0x80000000 0x140000 0xA00000;fatload mmc 0 0x89000000 omap3-mws4.dtb;nand erase 0x120000 0x20000;nand write.e 0x89000000 0x120000 0x20000
++bootcmd=run boot_sd
+diff --git a/board/ultratronik/mws4/mws4.c b/board/ultratronik/mws4/mws4.c
+new file mode 100644
+index 0000000000..463a337e74
+--- /dev/null
++++ b/board/ultratronik/mws4/mws4.c
+@@ -0,0 +1,226 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * (C) Copyright 2004-2011
++ * Texas Instruments, <www.ti.com>
++ *
++ * Author :
++ * Sunil Kumar <sunilsaini05@gmail.com>
++ * Shashi Ranjan <shashiranjanmca05@gmail.com>
++ *
++ * Derived from Beagle Board and 3430 SDP code by
++ * Richard Woodruff <r-woodruff2@ti.com>
++ * Syed Mohammed Khasim <khasim@ti.com>
++ *
++ */
++// mod for BfS ulbricht@innoroute.de 2021
++#include <common.h>
++#include <bootstage.h>
++#include <dm.h>
++#include <env.h>
++#include <init.h>
++#include <net.h>
++#include <ns16550.h>
++#include <serial.h>
++#include <twl4030.h>
++#include <linux/mtd/rawnand.h>
++#include <asm/io.h>
++#include <asm/arch/mmc_host_def.h>
++#include <asm/arch/mux.h>
++#include <asm/arch/mem.h>
++#include <asm/arch/sys_proto.h>
++#include <asm/gpio.h>
++#include <asm/mach-types.h>
++#include <asm/omap_musb.h>
++#include <linux/errno.h>
++#include <linux/usb/ch9.h>
++#include <linux/usb/gadget.h>
++#include <linux/usb/musb.h>
++#include "mws4.h"
++#include <command.h>
++#include <usb.h>
++#include <asm/ehci-omap.h>
++
++#define TWL4030_I2C_BUS 0
++#define EXPANSION_EEPROM_I2C_BUS 1
++#define EXPANSION_EEPROM_I2C_ADDRESS 0x50
++
++#define TINCANTOOLS_ZIPPY 0x01000100
++#define TINCANTOOLS_ZIPPY2 0x02000100
++#define TINCANTOOLS_TRAINER 0x04000100
++#define TINCANTOOLS_SHOWDOG 0x03000100
++#define KBADC_BEAGLEFPGA 0x01000600
++#define LW_BEAGLETOUCH 0x01000700
++#define BRAINMUX_LCDOG 0x01000800
++#define BRAINMUX_LCDOGTOUCH 0x02000800
++#define BBTOYS_WIFI 0x01000B00
++#define BBTOYS_VGA 0x02000B00
++#define BBTOYS_LCD 0x03000B00
++#define BCT_BRETTL3 0x01000F00
++#define BCT_BRETTL4 0x02000F00
++#define LSR_COM6L_ADPT 0x01001300
++#define BEAGLE_NO_EEPROM 0xffffffff
++
++DECLARE_GLOBAL_DATA_PTR;
++
++static struct {
++ unsigned int device_vendor;
++ unsigned char revision;
++ unsigned char content;
++ char fab_revision[8];
++ char env_var[16];
++ char env_setting[64];
++} expansion_config;
++
++
++#if !defined(CONFIG_SPL_BUILD)
++
++static struct omap_usbhs_board_data usbhs_bdata = {
++ .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY
++};
++
++int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
++{
++ return omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
++}
++
++int ehci_hcd_stop(int index)
++{
++ return omap_ehci_hcd_stop();
++}
++#endif
++/*
++ * Routine: board_init
++ * Description: Early hardware init.
++ */
++int board_init(void)
++{
++ gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
++ /* board id for Linux */
++ gd->bd->bi_arch_number = 5109;
++ /* boot param addr */
++ gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
++
++printf("Support InnoRoute.de\n");
++// init power
++ twl4030_power_init();
++// unprotect Power registers
++ twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
++ TWL4030_PM_MASTER_PROTECT_KEY, 0xC0);
++ twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
++ TWL4030_PM_MASTER_PROTECT_KEY, 0x0C);
++// enable HF 19,5MhZ CLK (need for VBUS!)
++ twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
++ TWL4030_PM_MASTER_CFG_BOOT, 0x19);
++// protect power registers
++ twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
++ TWL4030_PM_MASTER_PROTECT_KEY, 0x00);
++ return 0;
++}
++
++#if defined(CONFIG_SPL_OS_BOOT)
++int spl_start_uboot(void)
++{
++ /* break into full u-boot on 'c' */
++ if (serial_tstc() && serial_getc() == 'c')
++ return 1;
++
++ return 0;
++}
++#endif /* CONFIG_SPL_OS_BOOT */
++
++/*
++ * Routine: get_board_revision
++ * Description: Detect if we are running on a Beagle revision Ax/Bx,
++ * C1/2/3, C4, xM Ax/Bx or xM Cx. This can be done by reading
++ * the level of GPIO173, GPIO172 and GPIO171. This should
++ * result in
++ * GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
++ * GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
++ * GPIO173, GPIO172, GPIO171: 1 0 1 => C4
++ * GPIO173, GPIO172, GPIO171: 0 1 0 => xM Cx
++ * GPIO173, GPIO172, GPIO171: 0 0 0 => xM Ax/Bx
++ */
++static int get_board_revision(void)
++{
++ static int revision = 7;
++ return revision;
++}
++
++#ifdef CONFIG_SPL_BUILD
++/*
++ * Routine: get_board_mem_timings
++ * Description: If we use SPL then there is no x-loader nor config header
++ * so we have to setup the DDR timings ourself on the first bank. This
++ * provides the timing values back to the function that configures
++ * the memory.
++ */
++void get_board_mem_timings(struct board_sdrc_timings *timings)
++{
++ int pop_mfr, pop_id;
++
++ /* 256MB DDR */
++ timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
++ timings->ctrla = HYNIX_V_ACTIMA_200;
++ timings->ctrlb = HYNIX_V_ACTIMB_200;
++ timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
++ timings->mr = MICRON_V_MR_165;
++}
++#endif
++
++
++
++
++
++/*
++ * Routine: misc_init_r
++ * Description: Configure board specific parts
++ */
++int misc_init_r(void)
++{
++ struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
++ struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
++ struct control_prog_io *prog_io_base = (struct control_prog_io *)OMAP34XX_CTRL_BASE;
++ bool generate_fake_mac = false;
++ u32 value;
++
++ /* Enable i2c2 pullup resisters */
++ value = readl(&prog_io_base->io1);
++ value &= ~(PRG_I2C2_PULLUPRESX);
++ writel(value, &prog_io_base->io1);
++ env_set("beaglerev", "AxBx");
++ env_set("buddy", "none");
++
++ omap_die_id_display();
++/* Set VAUX2 to 1.8V for EHCI PHY */
++ twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
++ TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
++ TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
++ TWL4030_PM_RECEIVER_DEV_GRP_P1);
++
++ return 0;
++}
++
++/*
++ * Routine: set_muxconf_regs
++ * Description: Setting up the configuration Mux registers specific to the
++ * hardware. Many pins need to be moved from protect to primary
++ * mode.
++ */
++void set_muxconf_regs(void)
++{
++ MUX_MWS4();
++}
++
++#if defined(CONFIG_MMC)
++int board_mmc_init(struct bd_info *bis)
++{
++ return omap_mmc_init(0, 0, 0, -1, -1);
++}
++#endif
++
++#if defined(CONFIG_MMC)
++void board_mmc_power_init(void)
++{
++ twl4030_power_mmc_init(0);
++}
++#endif
+diff --git a/board/ultratronik/mws4/mws4.h b/board/ultratronik/mws4/mws4.h
+new file mode 100644
+index 0000000000..9655d19be3
+--- /dev/null
++++ b/board/ultratronik/mws4/mws4.h
+@@ -0,0 +1,203 @@
++/* SPDX-License-Identifier: GPL-2.0+ */
++/*
++ * (C) Copyright 2008
++ * Dirk Behme <dirk.behme@gmail.com>
++ */
++// mod for BfS ulbricht@innoroute.de 2021
++#ifndef _BEAGLE_H_
++#define _BEAGLE_H_
++
++#include <asm/arch/dss.h>
++
++const omap3_sysinfo sysinfo = {
++ DDR_STACKED,
++ "BfS MWS4",
++#if defined(CONFIG_ENV_IS_IN_ONENAND)
++ "OneNAND",
++#else
++ "NAND",
++#endif
++};
++
++/* BeagleBoard revisions */
++#define REVISION_AXBX 0x7
++#define REVISION_CX 0x6
++#define REVISION_C4 0x5
++#define REVISION_XM_AB 0x0
++#define REVISION_XM_C 0x2
++
++/*
++ * IEN - Input Enable
++ * IDIS - Input Disable
++ * PTD - Pull type Down
++ * PTU - Pull type Up
++ * DIS - Pull type selection is inactive
++ * EN - Pull type selection is active
++ * M0 - Mode 0
++ * The commented string gives the final mux configuration for that pin
++ */
++#define MUX_MWS4() \
++ /*SDRC*/\
++ MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\
++ MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\
++ MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\
++ MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\
++ MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\
++ MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\
++ MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\
++ MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\
++ MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\
++ MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\
++ MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\
++ MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\
++ MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\
++ MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\
++ MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /*SDRC_D14*/\
++ MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /*SDRC_D15*/\
++ MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /*SDRC_D16*/\
++ MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /*SDRC_D17*/\
++ MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /*SDRC_D18*/\
++ MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /*SDRC_D19*/\
++ MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /*SDRC_D20*/\
++ MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /*SDRC_D21*/\
++ MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /*SDRC_D22*/\
++ MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /*SDRC_D23*/\
++ MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /*SDRC_D24*/\
++ MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /*SDRC_D25*/\
++ MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /*SDRC_D26*/\
++ MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /*SDRC_D27*/\
++ MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /*SDRC_D28*/\
++ MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /*SDRC_D29*/\
++ MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /*SDRC_D30*/\
++ MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /*SDRC_D31*/\
++ MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /*SDRC_CLK*/\
++ MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /*SDRC_DQS0*/\
++ MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /*SDRC_DQS1*/\
++ MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\
++ MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\
++ /*GPMC*/\
++ MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /*GPMC_A1*/\
++ MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /*GPMC_A2*/\
++ MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /*GPMC_A3*/\
++ MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /*GPMC_A4*/\
++ MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /*GPMC_A5*/\
++ MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /*GPMC_A6*/\
++ MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /*GPMC_A7*/\
++ MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /*GPMC_A8*/\
++ MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /*GPMC_A9*/\
++ MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /*GPMC_A10*/\
++ MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /*GPMC_D0*/\
++ MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /*GPMC_D1*/\
++ MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /*GPMC_D2*/\
++ MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /*GPMC_D3*/\
++ MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /*GPMC_D4*/\
++ MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /*GPMC_D5*/\
++ MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /*GPMC_D6*/\
++ MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /*GPMC_D7*/\
++ MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /*GPMC_D8*/\
++ MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /*GPMC_D9*/\
++ MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /*GPMC_D10*/\
++ MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /*GPMC_D11*/\
++ MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /*GPMC_D12*/\
++ MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /*GPMC_D13*/\
++ MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /*GPMC_D14*/\
++ MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /*GPMC_D15*/\
++ MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\
++ MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\
++ MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)) /*GPMC_nCS2*/\
++ MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M0)) /*GPMC_nCS3*/\
++ MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M0)) /*GPMC_nCS4*/\
++ MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | DIS | M0)) /*GPMC_nCS5*/\
++ MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M1)) /*SYS_nDMA_REQ2*/\
++ MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M1)) /*SYS_nDMA_REQ3*/\
++ MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) /*GPMC_nBE1*/\
++ MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M0)) /*GPMC_WAIT2*/\
++ MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /*GPMC_WAIT3*/\
++ MUX_VAL(CP(GPMC_CLK), (IEN | PTD | DIS | M4)) /*GPMC_CLK*/\
++ MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\
++ MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\
++ MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\
++ MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTD | DIS | M0)) /*GPMC_nBE0_CLE*/\
++ MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\
++ MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\
++ MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\
++ /*CAMERA*/\
++ MUX_VAL(CP(CAM_HS), (IEN | PTU | EN | M4)) /*CAM_HS HW0*/\
++ MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M4)) /*CAM_VS HW1*/\
++ MUX_VAL(CP(CAM_XCLKA), (IEN | PTU | EN | M4)) /*CAM_XCLKA HW2*/\
++ MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M4)) /*CAM_D0 DIN1*/\
++ MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M4)) /*CAM_D1 DIN2*/\
++ MUX_VAL(CP(CAM_D2), (IDIS | PTD | DIS | M4)) /*CAM_D2, led_sm*/\
++ MUX_VAL(CP(CAM_D3), (IDIS | PTD | DIS | M4)) /*CAM_D3, led1*/\
++ MUX_VAL(CP(CAM_D4), (IDIS | PTD | DIS | M4)) /*CAM_D4, led2*/\
++ MUX_VAL(CP(CAM_D5), (IDIS | PTD | DIS | M4)) /*CAM_D5, led3*/\
++ MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M4)) /*CAM_D6 sw_sm*/\
++ MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M4)) /*CAM_D7 DIN3*/\
++ MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M4)) /*CAM_D8 DIN4*/\
++ MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M4)) /*CAM_D9 DIN5*/\
++ MUX_VAL(CP(CAM_D11), (IDIS | PTD | DIS | M4)) /*CAM_D11,usb2en*/\
++ /*Audio Interface */\
++ MUX_VAL(CP(MCBSP2_CLKX), (IDIS | PTD | DIS | M4)) /*McBSP2_CLKX wd_trigger*/\
++ /*Expansion card */\
++ MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)) /*MMC1_CLK*/\
++ MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)) /*MMC1_CMD*/\
++ MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)) /*MMC1_DAT0*/\
++ MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /*MMC1_DAT1*/\
++ MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /*MMC1_DAT2*/\
++ MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /*MMC1_DAT3*/\
++ /*Wireless LAN */\
++ MUX_VAL(CP(MMC2_CLK), (IEN | PTU | DIS | M4)) /*GPIO_130 eth_irq*/\
++ /*Modem Interface */\
++ MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\
++ MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)) /*GPIO_149*/ \
++ MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /*UART1_RX*/\
++ MUX_VAL(CP(MCBSP4_CLKX), (IDIS | PTD | DIS | M0)) /*SSI1_DAT_RX*/\
++ MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | DIS | M0)) /*GPIO_156*/\
++ MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | DIS | M4)) /*GPIO_157 GPO1*/\
++ MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | DIS | M4)) /*GPIO_158 GPO2*/\
++ MUX_VAL(CP(MCBSP1_DR), (IDIS | PTD | DIS | M4)) /*GPIO_159 GPO3*/\
++ MUX_VAL(CP(MCBSP_CLKS), (IDIS | PTD | DIS | M4)) /*McBSP_CLKS GPO4*/\
++ MUX_VAL(CP(MCBSP1_FSX), (IDIS | PTD | DIS | M4)) /*GPIO_161 GPO5*/\
++ MUX_VAL(CP(MCBSP1_CLKX), (IDIS | PTD | DIS | M4)) /*GPIO_162 GPO6*/\
++ /*Serial Interface*/\
++/* MUX_VAL(CP(UART3_CTS_RCTX), (IDIS | PTD | DIS | M4)) *//*UART3_CTS_RCTX IIC_RES_18*/\
++ MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /*UART3_RX_IRRX*/\
++ MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /*UART3_TX_IRTX*/\
++ MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) /*HSUSB0_CLK*/\
++ MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) /*HSUSB0_STP*/\
++ MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) /*HSUSB0_DIR*/\
++ MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)) /*HSUSB0_NXT*/\
++ MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA0*/\
++ MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA1*/\
++ MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA2*/\
++ MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA3*/\
++ MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA4*/\
++ MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA5*/\
++ MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA6*/\
++ MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA7*/\
++ MUX_VAL(CP(I2C1_SCL), (IEN | PTU | DIS | M0)) /*I2C1_SCL*/\
++ MUX_VAL(CP(I2C1_SDA), (IEN | PTU | DIS | M0)) /*I2C1_SDA*/\
++ MUX_VAL(CP(I2C2_SCL), (IEN | PTU | DIS | M0)) /*I2C2_SCL*/\
++ MUX_VAL(CP(I2C2_SDA), (IEN | PTU | DIS | M0)) /*I2C2_SDA*/\
++ MUX_VAL(CP(I2C3_SCL), (IEN | PTU | DIS | M0)) /*I2C3_SCL*/\
++ MUX_VAL(CP(I2C3_SDA), (IEN | PTU | DIS | M0)) /*I2C3_SDA*/\
++ MUX_VAL(CP(I2C4_SCL), (IEN | PTU | DIS | M0)) /*I2C4_SCL*/\
++ MUX_VAL(CP(I2C4_SDA), (IEN | PTU | DIS | M0)) /*I2C4_SDA*/\
++ /*Control and debug */\
++ MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\
++ MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M0)) /*GPIO_2*/\
++ MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M0)) /*GPIO_3*/\
++ MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M0)) /*GPIO_4*/\
++ MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M0)) /*GPIO_5*/\
++ MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M0)) /*GPIO_6*/\
++ MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M0)) /*GPIO_7*/\
++ MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M0)) /*GPIO_8*/ \
++ MUX_VAL(CP(SYS_OFF_MODE), (IDIS | PTD | DIS | M0)) /*SYS_OFF_MODE*/\
++ MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\
++ MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/
++
++
++#endif
++
++
++
+diff --git a/configs/omap3_mws4_defconfig b/configs/omap3_mws4_defconfig
+new file mode 100644
+index 0000000000..af0bdd1823
+--- /dev/null
++++ b/configs/omap3_mws4_defconfig
+@@ -0,0 +1,74 @@
++CONFIG_SYS_NAND_PAGE_SIZE=2048
++CONFIG_SYS_NAND_OOBSIZE=64
++CONFIG_ARM=y
++CONFIG_ARCH_OMAP2PLUS=y
++CONFIG_SYS_MALLOC_F_LEN=0x4000
++CONFIG_NR_DRAM_BANKS=2
++CONFIG_ENV_OFFSET=0x100000
++CONFIG_TARGET_OMAP3_MWS4=y
++CONFIG_DEFAULT_DEVICE_TREE="omap3-mws4"
++CONFIG_DISTRO_DEFAULTS=y
++CONFIG_NAND_BOOT=y
++CONFIG_SD_BOOT=y
++CONFIG_BOOTDELAY=3
++CONFIG_AUTOBOOT_KEYED=y
++CONFIG_AUTOBOOT_STOP_STR="q"
++CONFIG_AUTOBOOT_KEYED_CTRLC=y
++CONFIG_USE_PREBOOT=y
++CONFIG_DEFAULT_FDT_FILE="omap3-mws4.dtb"
++CONFIG_SYS_CONSOLE_INFO_QUIET=y
++CONFIG_SYS_PROMPT="MWS4 # "
++CONFIG_CMD_ASKENV=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_I2C=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_NAND=y
++CONFIG_CMD_NAND_TRIMFFS=y
++CONFIG_CMD_SPI=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_EXT4_WRITE=y
++CONFIG_CMD_FS_UUID=y
++CONFIG_CMD_UBI=y
++# CONFIG_ISO_PARTITION is not set
++CONFIG_OF_CONTROL=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_NAND=y
++CONFIG_USE_DEFAULT_ENV_FILE=y
++CONFIG_DEFAULT_ENV_FILE="board/ultratronik/mws4/default.env"
++CONFIG_VERSION_VARIABLE=y
++CONFIG_USB_FUNCTION_FASTBOOT=y
++CONFIG_FASTBOOT_BUF_ADDR=0x82000000
++CONFIG_DM_MMC=y
++CONFIG_MMC_OMAP_HS=y
++CONFIG_CMD_PINMUX=y
++CONFIG_DM_I2C=y
++CONFIG_PINCTRL=y
++CONFIG_MTD=y
++CONFIG_SYS_NAND_USE_FLASH_BBT=y
++# CONFIG_NAND_OMAP_GPMC_PREFETCH is not set
++CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
++CONFIG_DM_ETH=y
++CONFIG_SPI=y
++CONFIG_PHY=y
++CONFIG_USB_MUSB_TI=y
++CONFIG_DM_SPI=y
++CONFIG_OMAP3_SPI=y
++CONFIG_USB=y
++CONFIG_USB_MUSB_TI=y
++CONFIG_DM_USB=y
++CONFIG_OMAP_USB_PHY=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_OMAP3=y
++CONFIG_USB_MUSB_HOST=y
++CONFIG_USB_MUSB_GADGET=n
++CONFIG_USB_MUSB_OMAP2PLUS=y
++CONFIG_TWL4030_USB=y
++CONFIG_USB_ETHER=y
++CONFIG_USB_HOST_ETHER=y
++CONFIG_USB_ETHER_ASIX=y
++CONFIG_USB_ETHER_MCS7830=y
++CONFIG_USB_ETHER_SMSC95XX=y
++CONFIG_VIDEO_OMAP3=y
++CONFIG_BCH=y
++CONFIG_SPL_OF_LIBFDT=y
+diff --git a/include/configs/omap3_mws4.h b/include/configs/omap3_mws4.h
+new file mode 100644
+index 0000000000..1c0138a0a6
+--- /dev/null
++++ b/include/configs/omap3_mws4.h
+@@ -0,0 +1,100 @@
++/* SPDX-License-Identifier: GPL-2.0+ */
++/*
++ * (C) Copyright 2006-2008
++ * Texas Instruments.
++ * Richard Woodruff <r-woodruff2@ti.com>
++ * Syed Mohammed Khasim <x0khasim@ti.com>
++ *
++ * Configuration settings for the TI OMAP3530 Beagle board.
++ */
++
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++#include <configs/ti_omap3_common.h>
++
++/*
++ * We are only ever GP parts and will utilize all of the "downloaded image"
++ * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
++ */
++
++#define CONFIG_CMDLINE_TAG
++#define CONFIG_SETUP_MEMORY_TAGS
++#define CONFIG_INITRD_TAG
++#define CONFIG_REVISION_TAG
++
++#define CONFIG_CONS_INDEX 3
++
++/* NAND */
++#if defined(CONFIG_MTD_RAW_NAND)
++#define CONFIG_SYS_FLASH_BASE NAND_BASE
++#define CONFIG_SYS_MAX_NAND_DEVICE 1
++#define CONFIG_SYS_NAND_5_ADDR_CYCLE
++#define CONFIG_SYS_NAND_PAGE_COUNT 64
++#define CONFIG_SYS_NAND_PAGE_SIZE 2048
++#define CONFIG_SYS_NAND_OOBSIZE 64
++#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
++#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
++#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
++ 10, 11, 12, 13}
++#define CONFIG_SYS_NAND_ECCSIZE 512
++#define CONFIG_SYS_NAND_ECCBYTES 3
++#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
++//#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
++#define CONFIG_SYS_ENV_SECT_SIZE SZ_128K
++/* NAND: SPL falcon mode configs */
++#if defined(CONFIG_SPL_OS_BOOT)
++#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x2a0000
++#endif /* CONFIG_SPL_OS_BOOT */
++#endif /* CONFIG_MTD_RAW_NAND */
++
++/* Enable Multi Bus support for I2C */
++#define CONFIG_I2C_MULTI_BUS
++
++/* DSS Support */
++
++/* TWL4030 LED Support */
++
++#define MEM_LAYOUT_ENV_SETTINGS \
++ DEFAULT_LINUX_BOOT_ENV
++
++#define BOOTENV_DEV_LEGACY_MMC(devtypeu, devtypel, instance) \
++ "bootcmd_" #devtypel #instance "=" \
++ "setenv mmcdev " #instance "; " \
++ "run mmcboot\0"
++#define BOOTENV_DEV_NAME_LEGACY_MMC(devtypeu, devtypel, instance) \
++ #devtypel #instance " "
++
++#if defined(CONFIG_MTD_RAW_NAND)
++
++#define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \
++ "bootcmd_" #devtypel #instance "=" \
++ "if test ${mtdids} = '' || test ${mtdparts} = '' ; then " \
++ "echo NAND boot disabled: No mtdids and/or mtdparts; " \
++ "else " \
++ "run nandboot; " \
++ "fi\0"
++#define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \
++ #devtypel #instance " "
++
++#define BOOT_TARGET_DEVICES(func) \
++ func(MMC, mmc, 0) \
++ func(LEGACY_MMC, legacy_mmc, 0) \
++ func(UBIFS, ubifs, 0) \
++ func(NAND, nand, 0)
++
++#else /* !CONFIG_MTD_RAW_NAND */
++
++#define BOOT_TARGET_DEVICES(func) \
++ func(MMC, mmc, 0) \
++ func(LEGACY_MMC, legacy_mmc, 0)
++
++#endif /* CONFIG_MTD_RAW_NAND */
++
++#include <config_distro_bootcmd.h>
++
++#define CONFIG_EXTRA_ENV_SETTINGS \
++ MEM_LAYOUT_ENV_SETTINGS \
++ "console=ttyO2,115200n8\0" \
++ BOOTENV
++#endif /* __CONFIG_H */
+--
+2.25.1
+
diff --git a/board/ultratronik/omap3_mws4/readme.txt b/board/ultratronik/omap3_mws4/readme.txt
new file mode 100644
index 0000000000..10a2da5352
--- /dev/null
+++ b/board/ultratronik/omap3_mws4/readme.txt
@@ -0,0 +1,71 @@
+MWS4 sample config
+=====================
+The MWS4 is a nuclear probe board used by the German government to monitor nuclear activity. Livemap: see https://www.bfs.de
+# Build
+```
+git clone https://github.com/buildroot/buildroot.git
+cd buildroot
+make mws4_defconfig
+make -j$(nproc --all) V=99
+#drink some coffe
+```
+
+# Write the pendrive
+```
+sudo dd if=output/images/sdcard.img of=/dev/mmcblk0 bs=1M status=progress
+```
+## Boot instructions
+* the system is always able to boot from sd-card, if SD-boot jumper is set and uboot uses its default envoronment (reset with ```env default -a; saveenv```)
+* note: if booting from flash(no jumper set), the bootloader can't access the SD-card
+* the boot-jumper just effects the location, the bootloader is loaded from, the kernel location is selected by the boot commands below
+* todo for successfull nand-boot: upgrade bootloader, load kernel in flash, load root-fs in flash (follow the insctructions below)
+### Upgrade bootloader
+* To boot from nand-flash, the bootload needs an update to load the new kernel
+* mount first partition of sdcard
+* rename u-boot.bin -> u-boot-new.bin
+* rename u-boot-old.bin -> u-boot.bin
+* boot from SD-card, press 'Q' to get into bootloader
+* run``` fatload mmc 0 0x80000000 u-boot-new.bin;nand erase 0x40000 ${filesize};nand write 0x80000000 0x40000 ${filesize}```
+* rename back the files, or reset your sd-card
+
+### Load kernel into nand-flash
+* boot from SD-card, press 'q' to get into bootloader
+* run the command ```run flash_kernel```
+* devicetree and new kernel is now in the nand-flash
+
+### Write the ubi-fs root-filesystem to nand- flash
+* boot the linux from sdcard
+* run ```/usr/mws4/flash_ubi.sh```
+
+### Boot mode selection
+* this commands change where, the bootloader searches for the kernel, and where the kernel searches for the root-fs
+* in bootloader run the following commands
+#### nand boot
+```run bootmode_nand```
+#### sdboot
+```run bootmode_sd```
+* run ```boot``` for booting with the selected mode. The bootmode is persistant after reset.
+
+## Upgrade procedure (summary)
+1. build image
+2. flash image to sd-card
+3. Insert Boot-jumper, insert SD-card
+4. Connect serial cable, use minicom for connection
+5. poweron + hit "q" several times to get into uboot
+6. type `run flash_kernel`
+7. type `run bootmode_sd`
+8. type `boot`
+9. linux starting , login with `root`
+10. type `/usr/mws4/flash_ubi.sh`
+11. poweroff, remove sdcard, swap files `uboot-new.bin` and `uboot-old.bin` (see above), insert sd-card
+12. poweron + hit "Q" (captial!) several times to get into uboot
+13. type `fatload mmc 0 0x80000000 u-boot-new.bin;nand erase 0x40000 ${filesize};nand write 0x80000000 0x40000 ${filesize}`
+14. poweroff, remove boot jumper, (remove sd-card)
+15. poweron + hit "q" several times to get into uboot
+16. type `run bootmode_nand`
+17. done, repower and enjoy
+
+
+# Enjoy ;)
+
+
diff --git a/configs/mws4_defconfig b/configs/mws4_defconfig
new file mode 100644
index 0000000000..4e560ff95a
--- /dev/null
+++ b/configs/mws4_defconfig
@@ -0,0 +1,142 @@
+BR2_arm=y
+BR2_cortex_a8=y
+BR2_GLOBAL_PATCH_DIR="board/ultratronik/omap3_mws4/patches"
+BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
+BR2_KERNEL_HEADERS_5_4=y
+BR2_TOOLCHAIN_BUILDROOT_CXX=y
+BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y
+BR2_ROOTFS_DEVICE_TABLE_SUPPORTS_EXTENDED_ATTRIBUTES=y
+BR2_ROOTFS_MERGED_USR=y
+BR2_SYSTEM_BIN_SH_BASH=y
+BR2_SYSTEM_DEFAULT_PATH="/bin:/sbin:/usr/bin:/usr/sbin"
+BR2_TARGET_TZ_INFO=y
+BR2_ROOTFS_OVERLAY="board/ultratronik/omap3_mws4/overlay-base"
+BR2_ROOTFS_POST_IMAGE_SCRIPT="board/ultratronik/omap3_mws4/genimage.sh"
+BR2_LINUX_KERNEL=y
+# BR2_LINUX_KERNEL_CUSTOM_GIT=y
+# BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:InnoRoute/linux-1.git"
+# BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="dev"
+BR2_LINUX_KERNEL_DEFCONFIG="omap3_mws4"
+# BR2_LINUX_KERNEL_LATEST_VERSION is not set
+# BR2_LINUX_KERNEL_LATEST_CIP_VERSION is not set
+# BR2_LINUX_KERNEL_LATEST_CIP_RT_VERSION is not set
+BR2_LINUX_KERNEL_CUSTOM_VERSION=y
+# BR2_LINUX_KERNEL_CUSTOM_TARBALL is not set
+# BR2_LINUX_KERNEL_CUSTOM_GIT is not set
+# BR2_LINUX_KERNEL_CUSTOM_HG is not set
+# BR2_LINUX_KERNEL_CUSTOM_SVN is not set
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="v5.4-rc8"
+BR2_LINUX_KERNEL_VERSION="v5.4-rc8"
+BR2_LINUX_KERNEL_PATCH="$(TOPDIR)/board/ultratronik/omap3_mws4/kernel_patches"
+# BR2_LINUX_KERNEL_USE_DEFCONFIG is not set
+# BR2_LINUX_KERNEL_USE_ARCH_DEFAULT_CONFIG is not set
+BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
+BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(TOPDIR)/board/ultratronik/omap3_mws4/kernel_defconfig.conf"
+BR2_LINUX_KERNEL_UIMAGE=y
+BR2_LINUX_KERNEL_UIMAGE_LOADADDR="0x80000000"
+BR2_LINUX_KERNEL_DTS_SUPPORT=y
+BR2_LINUX_KERNEL_INTREE_DTS_NAME="omap3-mws4"
+BR2_LINUX_KERNEL_DTB_OVERLAY_SUPPORT=y
+BR2_PACKAGE_BUSYBOX_SHOW_OTHERS=y
+BR2_PACKAGE_NETPERF=y
+BR2_PACKAGE_NMON=y
+BR2_PACKAGE_MMC_UTILS=y
+BR2_PACKAGE_MTD=y
+BR2_PACKAGE_MTD_DOCFDISK=y
+BR2_PACKAGE_MTD_DOC_LOADBIOS=y
+BR2_PACKAGE_MTD_MKFSJFFS2=y
+BR2_PACKAGE_MTD_MKFSUBIFS=y
+BR2_PACKAGE_ASCII_INVADERS=y
+BR2_PACKAGE_HWDATA_IAB_OUI_TXT=y
+BR2_PACKAGE_HWDATA_PNP_IDS=y
+BR2_PACKAGE_HWLOC=y
+BR2_PACKAGE_I2C_TOOLS=y
+BR2_PACKAGE_LM_SENSORS=y
+BR2_PACKAGE_LM_SENSORS_FANCONTROL=y
+BR2_PACKAGE_LM_SENSORS_PWMCONFIG=y
+BR2_PACKAGE_LM_SENSORS_SENSORS_DETECT=y
+BR2_PACKAGE_LSHW=y
+BR2_PACKAGE_LSSCSI=y
+BR2_PACKAGE_LSUIO=y
+BR2_PACKAGE_MDEVD=y
+BR2_PACKAGE_MEMTESTER=y
+BR2_PACKAGE_MINICOM=y
+BR2_PACKAGE_PCIUTILS=y
+BR2_PACKAGE_RTC_TOOLS=y
+BR2_PACKAGE_RTL8188EU=y
+BR2_PACKAGE_SDPARM=y
+BR2_PACKAGE_SETSERIAL=y
+BR2_PACKAGE_SPI_TOOLS=y
+BR2_PACKAGE_UBOOT_TOOLS=y
+BR2_PACKAGE_UBOOT_TOOLS_FIT_SUPPORT=y
+BR2_PACKAGE_UBOOT_TOOLS_FIT_SIGNATURE_SUPPORT=y
+BR2_PACKAGE_UBOOT_TOOLS_FIT_CHECK_SIGN=y
+BR2_PACKAGE_UBOOT_TOOLS_MKIMAGE=y
+BR2_PACKAGE_UBOOT_TOOLS_MKENVIMAGE=y
+BR2_PACKAGE_UBOOT_TOOLS_DUMPIMAGE=y
+BR2_PACKAGE_UBUS=y
+BR2_PACKAGE_UBUS_EXAMPLES=y
+BR2_PACKAGE_UDISKS=y
+BR2_PACKAGE_UHUBCTL=y
+BR2_PACKAGE_USB_MODESWITCH_DATA=y
+BR2_PACKAGE_USBMOUNT=y
+BR2_PACKAGE_USBUTILS=y
+BR2_PACKAGE_PERL=y
+BR2_PACKAGE_PERL_THREADS=y
+BR2_PACKAGE_LIBNETFILTER_ACCT=y
+BR2_PACKAGE_LIBNETFILTER_CONNTRACK=y
+BR2_PACKAGE_LIBNETFILTER_CTHELPER=y
+BR2_PACKAGE_LIBNETFILTER_CTTIMEOUT=y
+BR2_PACKAGE_LIBNETFILTER_LOG=y
+BR2_PACKAGE_LIBNETFILTER_QUEUE=y
+BR2_PACKAGE_LIBCAP=y
+BR2_PACKAGE_ETHTOOL=y
+BR2_PACKAGE_IFTOP=y
+BR2_PACKAGE_IFUPDOWN=y
+BR2_PACKAGE_IPERF=y
+BR2_PACKAGE_IPERF3=y
+BR2_PACKAGE_IPTABLES=y
+BR2_PACKAGE_IPTABLES_BPF_NFSYNPROXY=y
+BR2_PACKAGE_IPTABLES_NFTABLES=y
+BR2_PACKAGE_NETCAT=y
+BR2_PACKAGE_NFTABLES=y
+BR2_PACKAGE_RSYNC=y
+BR2_PACKAGE_TCPDUMP=y
+BR2_PACKAGE_TCPREPLAY=y
+BR2_PACKAGE_WGET=y
+BR2_PACKAGE_COREUTILS=y
+BR2_PACKAGE_COREUTILS_INDIVIDUAL_BINARIES=y
+BR2_PACKAGE_CPULOAD=y
+BR2_PACKAGE_HTOP=y
+BR2_PACKAGE_KMOD_TOOLS=y
+BR2_PACKAGE_UTIL_LINUX_AGETTY=y
+BR2_PACKAGE_UTIL_LINUX_FSCK=y
+BR2_PACKAGE_UTIL_LINUX_HWCLOCK=y
+BR2_PACKAGE_UTIL_LINUX_KILL=y
+BR2_PACKAGE_UTIL_LINUX_LSMEM=y
+BR2_PACKAGE_UTIL_LINUX_MORE=y
+BR2_PACKAGE_UTIL_LINUX_MOUNT=y
+BR2_PACKAGE_UTIL_LINUX_MOUNTPOINT=y
+BR2_PACKAGE_WATCHDOG=y
+BR2_TARGET_ROOTFS_CPIO=y
+BR2_TARGET_ROOTFS_CPIO_GZIP=y
+BR2_TARGET_ROOTFS_CPIO_UIMAGE=y
+BR2_TARGET_ROOTFS_EXT2=y
+BR2_TARGET_ROOTFS_EXT2_4=y
+BR2_TARGET_ROOTFS_EXT2_SIZE="200M"
+BR2_TARGET_ROOTFS_EXT2_NONE=y
+BR2_TARGET_ROOTFS_UBI=y
+BR2_TARGET_ROOTFS_UBIFS_RT_LZO=y
+# BR2_TARGET_ROOTFS_TAR is not set
+BR2_TARGET_UBOOT=y
+BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
+BR2_TARGET_UBOOT_BOARD_DEFCONFIG="omap3_mws4"
+BR2_TARGET_UBOOT_NEEDS_DTC=y
+
+# BR2_TARGET_UBOOT_FORMAT_BIN is not set
+BR2_TARGET_UBOOT_FORMAT_IMG=y
+BR2_PACKAGE_HOST_DOSFSTOOLS=y
+BR2_PACKAGE_HOST_GENIMAGE=y
+BR2_PACKAGE_HOST_MTOOLS=y
+BR2_PACKAGE_HOST_UBOOT_TOOLS_FIT_SUPPORT=y
+
--
2.25.1
_______________________________________________
buildroot mailing list
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^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [Buildroot] [PATCH 1/1 v2] add support for mws4 board
2022-07-24 18:12 [Buildroot] [PATCH 1/1 v2] add support for mws4 board Marian Ulbricht
@ 2022-07-26 17:31 ` Thomas Petazzoni via buildroot
0 siblings, 0 replies; 2+ messages in thread
From: Thomas Petazzoni via buildroot @ 2022-07-26 17:31 UTC (permalink / raw)
To: Marian Ulbricht; +Cc: yann.morin.1998, buildroot
Hello Marian,
First of all, thanks for your contribution. See below a number of
comments/questions about your patch.
On Sun, 24 Jul 2022 20:12:51 +0200
Marian Ulbricht <ulbricht@innoroute.de> wrote:
> mws4 is an arm based nuclear probe hardware used from
> German government to monitor nuclear activity.
> This patch adds all necessary files to build an image for this board.
Could you clarify why it would make sense for Buildroot to have a
defconfig for this platform? Contrary to what Yann Morin said, I have
some doubts on the relevance of a defconfig for this platform in
Buildroot. We normally have defconfigs for evaluation boards, for
development boards, hobbyists boards, etc. but not for "real products".
> changelog:
> v2:
> * remove binary files from patch
> * add board-readme
The changelog should go...
> Signed-off-by: Marian Ulbricht <ulbricht@innoroute.de>
> ---
... here, i.e after the "---" sign, so that "git am" doesn't pick up
the changelog in the final commit log.
> diff --git a/board/ultratronik/omap3_mws4/genimage.cfg b/board/ultratronik/omap3_mws4/genimage.cfg
> new file mode 100644
> index 0000000000..35817ea97e
> --- /dev/null
> +++ b/board/ultratronik/omap3_mws4/genimage.cfg
> @@ -0,0 +1,48 @@
> +image boot.vfat {
> + vfat {
> + files = {
> + "uImage",
> + "omap3-mws4.dtb",
> + "u-boot.bin",
> + "mlo",
> + "u-boot-old.bin"
What is u-boot-old.bin, why do we need it?
> + }
> + }
> + size = 16M
> +}
> +
> +
> +image flashdata.vfat {
> + vfat {
> + files = {
> + "rootfs.ubi"
> + }
> + }
> + size = 500M
> +}
Our defconfigs should be minimal, so this flashdata partition should
not be there.
> +
> +image sdcard.img {
> + hdimage {
> + }
> +
> +
> +
Too many empty new lines here.
> + partition boot {
> + partition-type = 0xc
> + bootable = "true"
> + image = "boot.vfat"
> + }
> +
> + partition rootfs {
> + partition-type = 0x83
> + image = "rootfs.ext4"
> + size = 500M
> + }
> +
> + partition flashdata {
> + partition-type = 0xc
> + image = "flashdata.vfat"
> + }
> +
> +}
> +
> diff --git a/board/ultratronik/omap3_mws4/genimage.sh b/board/ultratronik/omap3_mws4/genimage.sh
> new file mode 100755
> index 0000000000..ec7c92d658
> --- /dev/null
> +++ b/board/ultratronik/omap3_mws4/genimage.sh
> @@ -0,0 +1,5 @@
> +#!/bin/bash
> +wget https://github.com/InnoRoute/omap3_mws4/raw/main/mlo -O output/images/mlo
> +wget https://github.com/InnoRoute/omap3_mws4/raw/main/u-boot-old.bin -O output/images/u-boot-old.bin
This is not acceptable, we cannot have a post-image script download
stuff. Your defconfig is building U-Boot, so why do you need to
download MLO and u-boot-old.bin?
> +cp output/images/u-boot.img output/images/u-boot.bin
This seems weird. The normal boot process on OMAP3 expects MLO -> u-boot.img.
> +support/scripts/genimage.sh -c board/ultratronik/omap3_mws4/genimage.cfg
> diff --git a/board/ultratronik/omap3_mws4/kernel_defconfig.conf b/board/ultratronik/omap3_mws4/kernel_defconfig.conf
> new file mode 100644
> index 0000000000..98f2cd3b34
> --- /dev/null
> +++ b/board/ultratronik/omap3_mws4/kernel_defconfig.conf
This file should be named linux.config
> @@ -0,0 +1,793 @@
> +CONFIG_COMPILE_TEST=y
> +CONFIG_KERNEL_LZMA=y
> +CONFIG_SYSVIPC=y
> +CONFIG_POSIX_MQUEUE=y
> +CONFIG_AUDIT=y
> +CONFIG_NO_HZ=y
> +CONFIG_HIGH_RES_TIMERS=y
> +CONFIG_BSD_PROCESS_ACCT=y
> +CONFIG_IKCONFIG=y
> +CONFIG_IKCONFIG_PROC=y
> +CONFIG_LOG_BUF_SHIFT=16
> +CONFIG_CGROUPS=y
> +CONFIG_MEMCG=y
> +CONFIG_BLK_CGROUP=y
> +CONFIG_CGROUP_SCHED=y
> +CONFIG_CFS_BANDWIDTH=y
> +CONFIG_RT_GROUP_SCHED=y
> +CONFIG_CGROUP_FREEZER=y
> +CONFIG_CPUSETS=y
> +CONFIG_CGROUP_DEVICE=y
> +CONFIG_USB_SERIAL_CH341=y
> +CONFIG_CGROUP_CPUACCT=y
> +CONFIG_CGROUP_PERF=y
> +CONFIG_NAMESPACES=y
> +CONFIG_BLK_DEV_INITRD=y
> +CONFIG_USB_EHCI_HCD_OMAP=y
> +CONFIG_USB_OHCI_HCD_OMAP3=y
> +CONFIG_USB_OMAP=y
> +CONFIG_USB_SERIAL_CONSOLE=y
> +CONFIG_NAND_BOOT=y
> +CONFIG_USB_OTG_FSM=y
> +CONFIG_MUSB_PIO_ONLY=y
> +CONFIG_EXPERT=y
> +CONFIG_SLAB=y
> +CONFIG_PROFILING=y
> +CONFIG_ARCH_MULTI_V6=y
> +# CONFIG_OMAP_32K_TIMER is not set
> +CONFIG_ARCH_OMAP2=y
> +CONFIG_ARCH_OMAP3=y
> +CONFIG_ARCH_OMAP4=y
> +CONFIG_SOC_OMAP5=y
> +CONFIG_SOC_AM33XX=y
> +CONFIG_SOC_AM43XX=y
> +CONFIG_SOC_DRA7XX=y
> +CONFIG_ARM_THUMBEE=y
> +CONFIG_ARM_ERRATA_411920=y
> +CONFIG_SMP=y
> +CONFIG_NR_CPUS=2
> +CONFIG_DEPRECATED_PARAM_STRUCT=y
> +CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyS2,115200"
> +CONFIG_KEXEC=y
> +CONFIG_CPU_FREQ=y
> +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
> +CONFIG_CPU_FREQ_GOV_POWERSAVE=y
> +CONFIG_CPU_FREQ_GOV_USERSPACE=y
> +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
> +CONFIG_CPUFREQ_DT=m
> +# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
> +CONFIG_CPU_IDLE=y
> +CONFIG_ARM_CPUIDLE=y
> +CONFIG_KERNEL_MODE_NEON=y
> +CONFIG_ARM_CRYPTO=y
> +CONFIG_CRYPTO_SHA1_ARM_NEON=m
> +CONFIG_CRYPTO_SHA256_ARM=m
> +CONFIG_CRYPTO_SHA512_ARM=m
> +CONFIG_CRYPTO_AES_ARM=m
> +CONFIG_CRYPTO_AES_ARM_BS=m
> +CONFIG_CRYPTO_GHASH_ARM_CE=m
> +CONFIG_CRYPTO_CHACHA20_NEON=m
> +CONFIG_OPROFILE=y
> +CONFIG_KPROBES=y
> +CONFIG_MODULES=y
> +CONFIG_MODULE_FORCE_LOAD=y
> +CONFIG_MODULE_UNLOAD=y
> +CONFIG_MODULE_FORCE_UNLOAD=y
> +CONFIG_MODVERSIONS=y
> +CONFIG_MODULE_SRCVERSION_ALL=y
> +# CONFIG_BLK_DEV_BSG is not set
> +CONFIG_PARTITION_ADVANCED=y
> +CONFIG_BINFMT_MISC=y
> +CONFIG_CMA=y
> +CONFIG_ZSMALLOC=m
> +CONFIG_NET=y
> +CONFIG_PACKET=y
> +CONFIG_UNIX=y
> +CONFIG_TLS=y
> +CONFIG_TLS_DEVICE=y
> +CONFIG_XFRM_USER=y
> +CONFIG_NET_KEY=y
> +CONFIG_NET_KEY_MIGRATE=y
> +CONFIG_INET=y
> +CONFIG_IP_MULTICAST=y
> +CONFIG_IP_PNP=y
> +CONFIG_IP_PNP_DHCP=y
> +CONFIG_IP_PNP_BOOTP=y
> +CONFIG_IP_PNP_RARP=y
> +CONFIG_NETFILTER=y
> +CONFIG_NETFILTER_NETLINK_ACCT=y
> +CONFIG_NF_CONNTRACK=m
> +CONFIG_NF_LOG_NETDEV=m
> +CONFIG_NF_CONNTRACK_ZONES=y
> +CONFIG_NF_CONNTRACK_EVENTS=y
> +CONFIG_NF_CONNTRACK_TIMEOUT=y
> +CONFIG_NF_CONNTRACK_TIMESTAMP=y
> +CONFIG_NF_CONNTRACK_AMANDA=m
> +CONFIG_NF_CONNTRACK_FTP=m
> +CONFIG_NF_CONNTRACK_H323=m
> +CONFIG_NF_CONNTRACK_IRC=m
> +CONFIG_NF_CONNTRACK_NETBIOS_NS=m
> +CONFIG_NF_CONNTRACK_SNMP=m
> +CONFIG_NF_CONNTRACK_PPTP=m
> +CONFIG_NF_CONNTRACK_SANE=m
> +CONFIG_NF_CONNTRACK_SIP=m
> +CONFIG_NF_CONNTRACK_TFTP=m
> +CONFIG_NF_CT_NETLINK=m
> +CONFIG_NF_CT_NETLINK_TIMEOUT=m
> +CONFIG_NF_CT_NETLINK_HELPER=m
> +CONFIG_NETFILTER_NETLINK_GLUE_CT=y
> +CONFIG_NF_TABLES=m
> +CONFIG_NF_TABLES_SET=m
> +CONFIG_NF_TABLES_INET=y
> +CONFIG_NF_TABLES_NETDEV=y
> +CONFIG_NFT_NUMGEN=m
> +CONFIG_NFT_CT=m
> +CONFIG_NFT_COUNTER=m
> +CONFIG_NFT_CONNLIMIT=m
> +CONFIG_NFT_LOG=m
> +CONFIG_NFT_LIMIT=m
> +CONFIG_NFT_MASQ=m
> +CONFIG_NFT_REDIR=m
> +CONFIG_NFT_NAT=m
> +CONFIG_NFT_TUNNEL=m
> +CONFIG_NFT_OBJREF=m
> +CONFIG_NFT_QUEUE=m
> +CONFIG_NFT_QUOTA=m
> +CONFIG_NFT_REJECT=m
> +CONFIG_NFT_COMPAT=m
> +CONFIG_NFT_HASH=m
> +CONFIG_NFT_XFRM=m
> +CONFIG_NFT_SOCKET=m
> +CONFIG_NFT_OSF=m
> +CONFIG_NFT_TPROXY=m
> +CONFIG_NFT_SYNPROXY=m
> +CONFIG_NFT_DUP_NETDEV=m
> +CONFIG_NFT_FWD_NETDEV=m
> +CONFIG_NF_FLOW_TABLE_INET=m
> +CONFIG_NF_FLOW_TABLE=m
> +CONFIG_NETFILTER_XTABLES=y
> +CONFIG_NETFILTER_XT_SET=m
> +CONFIG_NETFILTER_XT_TARGET_AUDIT=m
> +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
> +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
> +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
> +CONFIG_NETFILTER_XT_TARGET_DSCP=m
> +CONFIG_NETFILTER_XT_TARGET_HMARK=m
> +CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
> +CONFIG_NETFILTER_XT_TARGET_LED=m
> +CONFIG_NETFILTER_XT_TARGET_LOG=m
> +CONFIG_NETFILTER_XT_TARGET_MARK=m
> +CONFIG_NETFILTER_XT_TARGET_NFLOG=m
> +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
> +CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
> +CONFIG_NETFILTER_XT_TARGET_TEE=m
> +CONFIG_NETFILTER_XT_TARGET_TPROXY=m
> +CONFIG_NETFILTER_XT_TARGET_TRACE=m
> +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
> +CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
> +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
> +CONFIG_NETFILTER_XT_MATCH_BPF=m
> +CONFIG_NETFILTER_XT_MATCH_CGROUP=m
> +CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
> +CONFIG_NETFILTER_XT_MATCH_COMMENT=m
> +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
> +CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m
> +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
> +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
> +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
> +CONFIG_NETFILTER_XT_MATCH_CPU=m
> +CONFIG_NETFILTER_XT_MATCH_DCCP=m
> +CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m
> +CONFIG_NETFILTER_XT_MATCH_DSCP=m
> +CONFIG_NETFILTER_XT_MATCH_ESP=m
> +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
> +CONFIG_NETFILTER_XT_MATCH_HELPER=m
> +CONFIG_NETFILTER_XT_MATCH_IPCOMP=m
> +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
> +CONFIG_NETFILTER_XT_MATCH_IPVS=m
> +CONFIG_NETFILTER_XT_MATCH_L2TP=m
> +CONFIG_NETFILTER_XT_MATCH_LENGTH=m
> +CONFIG_NETFILTER_XT_MATCH_LIMIT=m
> +CONFIG_NETFILTER_XT_MATCH_MAC=m
> +CONFIG_NETFILTER_XT_MATCH_MARK=m
> +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
> +CONFIG_NETFILTER_XT_MATCH_NFACCT=m
> +CONFIG_NETFILTER_XT_MATCH_OSF=m
> +CONFIG_NETFILTER_XT_MATCH_OWNER=m
> +CONFIG_NETFILTER_XT_MATCH_POLICY=m
> +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
> +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
> +CONFIG_NETFILTER_XT_MATCH_QUOTA=m
> +CONFIG_NETFILTER_XT_MATCH_RATEEST=m
> +CONFIG_NETFILTER_XT_MATCH_REALM=m
> +CONFIG_NETFILTER_XT_MATCH_RECENT=m
> +CONFIG_NETFILTER_XT_MATCH_SCTP=m
> +CONFIG_NETFILTER_XT_MATCH_SOCKET=m
> +CONFIG_NETFILTER_XT_MATCH_STATE=m
> +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
> +CONFIG_NETFILTER_XT_MATCH_STRING=m
> +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
> +CONFIG_NETFILTER_XT_MATCH_TIME=m
> +CONFIG_NETFILTER_XT_MATCH_U32=m
> +CONFIG_IP_SET=m
> +CONFIG_IP_SET_BITMAP_IP=m
> +CONFIG_IP_SET_BITMAP_IPMAC=m
> +CONFIG_IP_SET_BITMAP_PORT=m
> +CONFIG_IP_SET_HASH_IP=m
> +CONFIG_IP_SET_HASH_IPMARK=m
> +CONFIG_IP_SET_HASH_IPPORT=m
> +CONFIG_IP_SET_HASH_IPPORTIP=m
> +CONFIG_IP_SET_HASH_IPPORTNET=m
> +CONFIG_IP_SET_HASH_IPMAC=m
> +CONFIG_IP_SET_HASH_MAC=m
> +CONFIG_IP_SET_HASH_NETPORTNET=m
> +CONFIG_IP_SET_HASH_NET=m
> +CONFIG_IP_SET_HASH_NETNET=m
> +CONFIG_IP_SET_HASH_NETPORT=m
> +CONFIG_IP_SET_HASH_NETIFACE=m
> +CONFIG_IP_SET_LIST_SET=m
> +CONFIG_IP_VS=m
> +CONFIG_NFT_DUP_IPV4=m
> +CONFIG_NFT_FIB_IPV4=m
> +CONFIG_NF_TABLES_ARP=y
> +CONFIG_NF_FLOW_TABLE_IPV4=m
> +CONFIG_NF_LOG_ARP=m
> +CONFIG_IP_NF_IPTABLES=m
> +CONFIG_IP_NF_MATCH_AH=m
> +CONFIG_IP_NF_MATCH_ECN=m
> +CONFIG_IP_NF_MATCH_RPFILTER=m
> +CONFIG_IP_NF_MATCH_TTL=m
> +CONFIG_IP_NF_FILTER=m
> +CONFIG_IP_NF_TARGET_REJECT=m
> +CONFIG_IP_NF_MANGLE=m
> +CONFIG_IP_NF_TARGET_ECN=m
> +CONFIG_IP_NF_TARGET_TTL=m
> +CONFIG_IP_NF_RAW=m
> +CONFIG_IP_NF_SECURITY=m
> +CONFIG_IP_NF_ARPTABLES=m
> +CONFIG_IP_NF_ARPFILTER=m
> +CONFIG_IP_NF_ARP_MANGLE=m
> +CONFIG_NF_TABLES_BRIDGE=m
> +CONFIG_NFT_BRIDGE_META=m
> +CONFIG_NFT_BRIDGE_REJECT=m
> +CONFIG_NF_LOG_BRIDGE=m
> +CONFIG_NF_CONNTRACK_BRIDGE=m
> +CONFIG_BRIDGE_NF_EBTABLES=m
> +CONFIG_BRIDGE=m
> +CONFIG_BRIDGE_VLAN_FILTERING=y
> +CONFIG_VLAN_8021Q=m
> +CONFIG_PHONET=m
> +CONFIG_NET_SCHED=y
> +CONFIG_NET_SCH_INGRESS=m
> +CONFIG_NET_CLS_U32=m
> +CONFIG_NET_CLS_FLOWER=m
> +CONFIG_NET_CLS_MATCHALL=m
> +CONFIG_NET_CLS_ACT=y
> +CONFIG_NET_ACT_POLICE=m
> +CONFIG_NET_ACT_GACT=m
> +CONFIG_NET_SWITCHDEV=y
> +CONFIG_CAN=m
> +CONFIG_CAN_C_CAN=m
> +CONFIG_CAN_C_CAN_PLATFORM=m
> +CONFIG_BT=m
> +CONFIG_BT_RFCOMM=m
> +CONFIG_BT_RFCOMM_TTY=y
> +CONFIG_BT_BNEP=m
> +CONFIG_BT_BNEP_MC_FILTER=y
> +CONFIG_BT_BNEP_PROTO_FILTER=y
> +CONFIG_BT_HIDP=m
> +CONFIG_BT_HCIBTUSB=m
> +CONFIG_BT_HCIBTSDIO=m
> +CONFIG_BT_HCIUART=m
> +CONFIG_BT_HCIUART_NOKIA=m
> +CONFIG_BT_HCIUART_BCSP=y
> +CONFIG_BT_HCIUART_LL=y
> +CONFIG_BT_HCIUART_3WIRE=y
> +CONFIG_BT_HCIUART_BCM=y
> +CONFIG_BT_HCIBCM203X=m
> +CONFIG_BT_HCIBPA10X=m
> +CONFIG_BT_HCIBFUSB=m
> +CONFIG_BT_HCIVHCI=m
> +CONFIG_BT_MRVL=m
> +CONFIG_BT_MRVL_SDIO=m
> +CONFIG_AF_RXRPC=m
> +CONFIG_RXKAD=y
> +CONFIG_CFG80211=m
> +CONFIG_MAC80211=m
> +CONFIG_PCI=y
> +CONFIG_PCIEPORTBUS=y
> +CONFIG_HOTPLUG_PCI_PCIE=y
> +CONFIG_PCI_MSI=y
> +CONFIG_HOTPLUG_PCI=y
> +CONFIG_PCI_DRA7XX_EP=y
> +CONFIG_PCI_ENDPOINT=y
> +CONFIG_PCI_ENDPOINT_CONFIGFS=y
> +CONFIG_PCI_EPF_TEST=m
> +CONFIG_UEVENT_HELPER=y
> +CONFIG_UEVENT_HELPER_PATH="/sbin/mdev"
> +CONFIG_DEVTMPFS=y
> +CONFIG_DEVTMPFS_MOUNT=y
> +# CONFIG_STANDALONE is not set
> +# CONFIG_PREVENT_FIRMWARE_BUILD is not set
> +CONFIG_DMA_FENCE_TRACE=y
> +CONFIG_OMAP_OCP2SCP=y
> +CONFIG_SIMPLE_PM_BUS=y
> +CONFIG_CONNECTOR=y
> +CONFIG_MTD=y
> +CONFIG_MTD_CMDLINE_PARTS=y
> +CONFIG_MTD_BLOCK=y
> +CONFIG_NFTL=y
> +CONFIG_NFTL_RW=y
> +CONFIG_MTD_OOPS=y
> +CONFIG_MTD_CFI=y
> +CONFIG_MTD_CFI_ADV_OPTIONS=y
> +CONFIG_MTD_CFI_GEOMETRY=y
> +CONFIG_MTD_CFI_INTELEXT=y
> +CONFIG_MTD_PHYSMAP=y
> +CONFIG_MTD_PHYSMAP_OF=y
> +CONFIG_MTD_BLOCK2MTD=y
> +CONFIG_MTD_ONENAND=y
> +CONFIG_MTD_ONENAND_VERIFY_WRITE=y
> +CONFIG_MTD_ONENAND_OMAP2=y
> +CONFIG_MTD_RAW_NAND=y
> +CONFIG_MTD_NAND_ECC_SW_BCH=y
> +CONFIG_MTD_NAND_OMAP2=y
> +CONFIG_MTD_NAND_OMAP_BCH=y
> +CONFIG_MTD_SPI_NOR=m
> +CONFIG_MTD_UBI=y
> +CONFIG_UBIFS_FS_ADVANCED_COMPR=y
> +CONFIG_UBIFS_ATIME_SUPPORT=y
> +CONFIG_CRAMFS_MTD=y
> +CONFIG_CRYPTO_CRYPTD=m
> +CONFIG_CRYPTO_CBC=m
> +CONFIG_CRYPTO_MD5=m
> +CONFIG_CRYPTO_SHA512=m
> +CONFIG_CRYPTO_MD5=m
> +CONFIG_PARPORT=y
> +CONFIG_PARPORT_AX88796=y
> +CONFIG_ZRAM=m
> +CONFIG_ZRAM_WRITEBACK=y
> +CONFIG_BLK_DEV_LOOP=y
> +CONFIG_BLK_DEV_RAM=y
> +CONFIG_BLK_DEV_RAM_SIZE=16384
> +CONFIG_SENSORS_TSL2550=m
> +CONFIG_SRAM=y
> +CONFIG_PCI_ENDPOINT_TEST=m
> +CONFIG_EEPROM_AT24=m
> +CONFIG_BLK_DEV_SD=y
> +CONFIG_CHR_DEV_SG=m
> +CONFIG_CHR_DEV_SCH=m
> +CONFIG_SCSI_CONSTANTS=y
> +CONFIG_SCSI_SCAN_ASYNC=y
> +CONFIG_SCSI_DH=y
> +CONFIG_SCSI_DH_RDAC=m
> +CONFIG_SCSI_DH_HP_SW=m
> +CONFIG_SCSI_DH_EMC=m
> +CONFIG_SCSI_DH_ALUA=m
> +CONFIG_ATA=y
> +CONFIG_SATA_AHCI_PLATFORM=y
> +CONFIG_AHCI_DM816=m
> +CONFIG_NETDEVICES=y
> +# CONFIG_NET_VENDOR_ARC is not set
> +# CONFIG_NET_VENDOR_BROADCOM is not set
> +# CONFIG_NET_VENDOR_CIRRUS is not set
> +CONFIG_AX88796DT=y
> +CONFIG_DM9000=y
> +# CONFIG_NET_VENDOR_FARADAY is not set
> +# CONFIG_NET_VENDOR_HISILICON is not set
> +# CONFIG_NET_VENDOR_INTEL is not set
> +# CONFIG_NET_VENDOR_MARVELL is not set
> +CONFIG_KS8851=y
> +CONFIG_KS8851_MLL=y
> +# CONFIG_NET_VENDOR_MICROCHIP is not set
> +CONFIG_NS83820=y
> +CONFIG_AX88796=y
> +CONFIG_AX88796_93CX6=y
> +CONFIG_NE2K_PCI=y
> +# CONFIG_NET_VENDOR_QUALCOMM is not set
> +# CONFIG_NET_VENDOR_SAMSUNG is not set
> +# CONFIG_NET_VENDOR_SEEQ is not set
> +CONFIG_SMC91X=y
> +CONFIG_SMSC911X=y
> +# CONFIG_NET_VENDOR_STMICRO is not set
> +CONFIG_TI_DAVINCI_EMAC=y
> +CONFIG_TI_CPSW=y
> +CONFIG_TI_CPTS=y
> +# CONFIG_NET_VENDOR_VIA is not set
> +# CONFIG_NET_VENDOR_WIZNET is not set
> +CONFIG_AX88796B_PHY=y
> +CONFIG_AT803X_PHY=y
> +CONFIG_DP83848_PHY=y
> +CONFIG_DP83867_PHY=y
> +CONFIG_MICREL_PHY=y
> +CONFIG_SMSC_PHY=y
> +CONFIG_PPP=m
> +CONFIG_PPP_BSDCOMP=m
> +CONFIG_PPP_DEFLATE=m
> +CONFIG_PPP_FILTER=y
> +CONFIG_PPP_MPPE=m
> +CONFIG_PPP_MULTILINK=y
> +CONFIG_PPPOE=m
> +CONFIG_PPP_ASYNC=m
> +CONFIG_PPP_SYNC_TTY=m
> +CONFIG_USB_USBNET=m
> +CONFIG_USB_NET_SMSC75XX=m
> +CONFIG_USB_NET_SMSC95XX=m
> +CONFIG_USB_ALI_M5632=y
> +CONFIG_USB_AN2720=y
> +CONFIG_USB_EPSON2888=y
> +CONFIG_USB_KC2190=y
> +CONFIG_USB_NET_QMI_WWAN=m
> +CONFIG_USB_CDC_PHONET=m
> +CONFIG_LIBERTAS=m
> +CONFIG_LIBERTAS_USB=m
> +CONFIG_LIBERTAS_SDIO=m
> +CONFIG_MWIFIEX=m
> +CONFIG_MWIFIEX_SDIO=m
> +CONFIG_MWIFIEX_USB=m
> +CONFIG_WL12XX=m
> +CONFIG_WL18XX=m
> +CONFIG_WLCORE_SPI=m
> +CONFIG_WLCORE_SDIO=m
> +CONFIG_INPUT_MATRIXKMAP=y
> +CONFIG_INPUT_MOUSEDEV=m
> +CONFIG_INPUT_JOYDEV=m
> +CONFIG_INPUT_EVDEV=m
> +CONFIG_KEYBOARD_ATKBD=m
> +CONFIG_KEYBOARD_GPIO=m
> +CONFIG_KEYBOARD_MATRIX=m
> +CONFIG_KEYBOARD_OMAP4=m
> +# CONFIG_INPUT_MOUSE is not set
> +CONFIG_INPUT_TOUCHSCREEN=y
> +CONFIG_TOUCHSCREEN_ADS7846=m
> +CONFIG_TOUCHSCREEN_ATMEL_MXT=m
> +CONFIG_TOUCHSCREEN_EDT_FT5X06=m
> +CONFIG_TOUCHSCREEN_TI_AM335X_TSC=m
> +CONFIG_TOUCHSCREEN_PIXCIR=m
> +CONFIG_TOUCHSCREEN_TSC2004=m
> +CONFIG_TOUCHSCREEN_TSC2005=m
> +CONFIG_TOUCHSCREEN_TSC2007=m
> +CONFIG_INPUT_MISC=y
> +CONFIG_INPUT_CPCAP_PWRBUTTON=m
> +CONFIG_INPUT_TPS65218_PWRBUTTON=m
> +CONFIG_INPUT_TWL4030_PWRBUTTON=y
> +CONFIG_INPUT_TWL4030_VIBRA=y
> +CONFIG_INPUT_UINPUT=m
> +CONFIG_INPUT_PALMAS_PWRBUTTON=m
> +CONFIG_INPUT_PWM_VIBRA=m
> +CONFIG_SERIO=m
> +# CONFIG_LEGACY_PTYS is not set
> +CONFIG_SERIAL_8250=y
> +CONFIG_SERIAL_8250_CONSOLE=y
> +CONFIG_SERIAL_8250_NR_UARTS=32
> +CONFIG_SERIAL_8250_RUNTIME_UARTS=6
> +CONFIG_SERIAL_8250_EXTENDED=y
> +CONFIG_SERIAL_8250_MANY_PORTS=y
> +CONFIG_SERIAL_8250_SHARE_IRQ=y
> +CONFIG_SERIAL_8250_DETECT_IRQ=y
> +CONFIG_SERIAL_8250_RSA=y
> +CONFIG_SERIAL_8250_OMAP=y
> +CONFIG_SERIAL_OF_PLATFORM=y
> +CONFIG_SERIAL_OMAP=y
> +CONFIG_SERIAL_OMAP_CONSOLE=y
> +CONFIG_SERIAL_DEV_BUS=y
> +CONFIG_I2C_CHARDEV=y
> +CONFIG_I2C_MUX=y
> +CONFIG_I2C_ARB_GPIO_CHALLENGE=y
> +CONFIG_I2C_MUX_GPIO=y
> +CONFIG_I2C_MUX_GPMUX=y
> +CONFIG_SPI=y
> +CONFIG_SPI_OMAP24XX=y
> +CONFIG_SPI_TI_QSPI=m
> +CONFIG_PINCTRL_SINGLE=y
> +CONFIG_GPIO_SYSFS=y
> +CONFIG_HTC_EGPIO=y
> +CONFIG_GPIO_LP873X=m
> +CONFIG_GPIO_LP87565=y
> +CONFIG_GPIO_PALMAS=y
> +CONFIG_GPIO_TPS65218=m
> +CONFIG_GPIO_TPS65910=y
> +CONFIG_GPIO_TQMX86=m
> +CONFIG_GPIO_TWL4030=y
> +CONFIG_GPIO_TWL6040=m
> +CONFIG_GPIO_MOCKUP=y
> +CONFIG_W1=m
> +CONFIG_W1_MASTER_GPIO=m
> +CONFIG_HDQ_MASTER_OMAP=m
> +CONFIG_W1_SLAVE_DS250X=m
> +CONFIG_POWER_RESET=y
> +CONFIG_POWER_RESET_GPIO=y
> +CONFIG_POWER_SUPPLY=y
> +CONFIG_BATTERY_TWL4030_MADC=m
> +CONFIG_CHARGER_TWL4030=m
> +CONFIG_SENSORS_GPIO_FAN=m
> +CONFIG_SENSORS_LM75=m
> +CONFIG_SENSORS_TMP102=m
> +CONFIG_THERMAL_GOV_FAIR_SHARE=y
> +CONFIG_THERMAL_GOV_USER_SPACE=y
> +CONFIG_CPU_THERMAL=y
> +CONFIG_TI_THERMAL=y
> +CONFIG_OMAP4_THERMAL=y
> +CONFIG_OMAP5_THERMAL=y
> +CONFIG_DRA752_THERMAL=y
> +CONFIG_WATCHDOG=y
> +CONFIG_WATCHDOG_CORE=y
> +CONFIG_WATCHDOG_SYSFS=y
> +CONFIG_GPIO_WATCHDOG=m
> +# CONFIG_SIRFSOC_WATCHDOG is not set
> +CONFIG_MFD_CPCAP=y
> +# CONFIG_ABX500_CORE is not set
> +CONFIG_MFD_TI_AM335X_TSCADC=m
> +CONFIG_MFD_TI_LMU=m
> +CONFIG_MFD_PALMAS=y
> +CONFIG_MFD_TPS65217=y
> +CONFIG_MFD_TI_LP873X=y
> +CONFIG_MFD_TI_LP87565=y
> +CONFIG_MFD_TPS65218=y
> +CONFIG_MFD_TPS65910=y
> +CONFIG_TWL6040_CORE=y
> +CONFIG_REGULATOR_CPCAP=y
> +CONFIG_REGULATOR_GPIO=y
> +CONFIG_REGULATOR_LM363X=m
> +CONFIG_REGULATOR_LP872X=y
> +CONFIG_REGULATOR_LP873X=y
> +CONFIG_REGULATOR_LP87565=y
> +CONFIG_REGULATOR_PALMAS=y
> +CONFIG_REGULATOR_PBIAS=y
> +CONFIG_REGULATOR_TI_ABB=y
> +CONFIG_REGULATOR_TPS62360=m
> +CONFIG_REGULATOR_TPS65023=y
> +CONFIG_REGULATOR_TPS6507X=y
> +CONFIG_REGULATOR_TPS65217=y
> +CONFIG_REGULATOR_TPS65218=y
> +CONFIG_REGULATOR_TPS65910=y
> +CONFIG_REGULATOR_TWL4030=y
> +CONFIG_RC_CORE=m
> +CONFIG_LIRC=y
> +CONFIG_RC_DEVICES=y
> +CONFIG_IR_SPI=m
> +CONFIG_IR_RX51=m
> +CONFIG_IR_GPIO_TX=m
> +CONFIG_IR_PWM_TX=m
> +CONFIG_MEDIA_SUPPORT=m
> +CONFIG_DRM=m
> +CONFIG_DRM_OMAP=m
> +CONFIG_OMAP5_DSS_HDMI=y
> +CONFIG_OMAP2_DSS_SDI=y
> +CONFIG_OMAP2_DSS_DSI=y
> +CONFIG_DRM_OMAP_PANEL_DSI_CM=m
> +CONFIG_DRM_TILCDC=m
> +CONFIG_DRM_PANEL_SIMPLE=m
> +CONFIG_DRM_PANEL_LG_LB035Q02=m
> +CONFIG_DRM_PANEL_NEC_NL8048HL11=m
> +CONFIG_DRM_PANEL_SHARP_LS037V7DW01=m
> +CONFIG_DRM_PANEL_SONY_ACX565AKM=m
> +CONFIG_DRM_PANEL_TPO_TD028TTEC1=m
> +CONFIG_DRM_PANEL_TPO_TD043MTEA1=m
> +CONFIG_DRM_TI_TFP410=m
> +CONFIG_FB=y
> +CONFIG_FIRMWARE_EDID=y
> +CONFIG_FB_MODE_HELPERS=y
> +CONFIG_FB_TILEBLITTING=y
> +CONFIG_LCD_CLASS_DEVICE=y
> +CONFIG_LCD_PLATFORM=y
> +CONFIG_BACKLIGHT_CLASS_DEVICE=y
> +CONFIG_BACKLIGHT_PWM=m
> +CONFIG_BACKLIGHT_PANDORA=m
> +CONFIG_BACKLIGHT_GPIO=m
> +CONFIG_FRAMEBUFFER_CONSOLE=y
> +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
> +CONFIG_LOGO=y
> +CONFIG_SOUND=m
> +CONFIG_SND=m
> +CONFIG_SND_OSSEMUL=y
> +CONFIG_SND_MIXER_OSS=m
> +CONFIG_SND_PCM_OSS=m
> +CONFIG_SND_VERBOSE_PRINTK=y
> +CONFIG_SND_USB_AUDIO=m
> +CONFIG_SND_SOC=m
> +CONFIG_SND_SOC_DAVINCI_MCASP=m
> +CONFIG_SND_SOC_NOKIA_RX51=m
> +CONFIG_SND_SOC_OMAP3_PANDORA=m
> +CONFIG_SND_SOC_OMAP3_TWL4030=m
> +CONFIG_SND_SOC_OMAP_ABE_TWL6040=m
> +CONFIG_SND_SOC_OMAP_HDMI=m
> +CONFIG_SND_SOC_CPCAP=m
> +CONFIG_SND_SOC_TLV320AIC23_I2C=m
> +CONFIG_SND_SIMPLE_CARD=m
> +CONFIG_SND_AUDIO_GRAPH_CARD=m
> +CONFIG_HID_GENERIC=m
> +CONFIG_USB_HIDDEV=y
> +CONFIG_USB_KBD=m
> +CONFIG_USB_MOUSE=m
> +CONFIG_USB_LED_TRIG=y
> +CONFIG_USB_ULPI_BUS=m
> +CONFIG_USB_CONN_GPIO=m
> +CONFIG_USB=m
> +# CONFIG_USB_PCI is not set
> +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
> +CONFIG_USB_DYNAMIC_MINORS=y
> +CONFIG_USB_OTG=y
> +CONFIG_USB_OTG_FSM=m
> +CONFIG_USB_LEDS_TRIGGER_USBPORT=m
> +CONFIG_USB_MON=m
> +CONFIG_USB_EHCI_HCD=m
> +CONFIG_USB_EHCI_FSL=m
> +CONFIG_USB_EHCI_HCD_NPCM7XX=m
> +# CONFIG_USB_EHCI_HCD_OMAP is not set
> +CONFIG_USB_OXU210HP_HCD=m
> +CONFIG_USB_ISP116X_HCD=m
> +CONFIG_USB_ISP1362_HCD=m
> +CONFIG_USB_FOTG210_HCD=m
> +CONFIG_USB_MAX3421_HCD=m
> +CONFIG_USB_OHCI_HCD=m
> +# CONFIG_USB_OHCI_HCD_OMAP3 is not set
> +CONFIG_USB_SL811_HCD=m
> +CONFIG_USB_SL811_HCD_ISO=y
> +CONFIG_USB_R8A66597_HCD=m
> +CONFIG_USB_RENESAS_USBHS_HCD=m
> +CONFIG_USB_RENESAS_USBHS=m
> +CONFIG_USB_TMC=m
> +CONFIG_USB_STORAGE=m
> +CONFIG_USB_UAS=m
> +CONFIG_USB_MUSB_HDRC=m
> +CONFIG_USB_MUSB_HOST=y
> +CONFIG_USB_MUSB_TUSB6010=m
> +CONFIG_USB_MUSB_OMAP2PLUS=m
> +CONFIG_USB_MUSB_AM35X=m
> +CONFIG_USB_MUSB_DSPS=m
> +CONFIG_USB_MUSB_UX500=m
> +CONFIG_USB_INVENTRA_DMA=y
> +CONFIG_USB_TI_CPPI41_DMA=y
> +CONFIG_USB_TUSB_OMAP_DMA=y
> +CONFIG_USB_USS720=m
> +CONFIG_USB_SERIAL=m
> +CONFIG_USB_SERIAL_GENERIC=y
> +CONFIG_USB_SERIAL_SIMPLE=m
> +CONFIG_USB_SERIAL_CP210X=m
> +CONFIG_USB_SERIAL_FTDI_SIO=m
> +CONFIG_USB_SERIAL_PL2303=m
> +CONFIG_USB_SERIAL_OPTION=m
> +CONFIG_USB_LD=m
> +CONFIG_USB_TEST=m
> +CONFIG_USB_EZUSB_FX2=m
> +CONFIG_USB_HUB_USB251XB=m
> +CONFIG_USB_HSIC_USB3503=m
> +CONFIG_USB_HSIC_USB4604=m
> +CONFIG_NOP_USB_XCEIV=m
> +CONFIG_TWL6030_USB=m
> +CONFIG_USB_GPIO_VBUS=m
> +CONFIG_USB_ISP1301=m
> +CONFIG_USB_ULPI=y
> +CONFIG_USB_GADGET=m
> +CONFIG_USB_CONFIGFS=m
> +CONFIG_USB_CONFIGFS_SERIAL=y
> +CONFIG_USB_CONFIGFS_ACM=y
> +CONFIG_USB_CONFIGFS_OBEX=y
> +CONFIG_USB_CONFIGFS_NCM=y
> +CONFIG_USB_CONFIGFS_ECM=y
> +CONFIG_USB_CONFIGFS_ECM_SUBSET=y
> +CONFIG_USB_CONFIGFS_RNDIS=y
> +CONFIG_USB_CONFIGFS_EEM=y
> +CONFIG_USB_CONFIGFS_PHONET=y
> +CONFIG_USB_CONFIGFS_MASS_STORAGE=y
> +CONFIG_USB_CONFIGFS_F_LB_SS=y
> +CONFIG_USB_CONFIGFS_F_FS=y
> +CONFIG_USB_CONFIGFS_F_UAC1=y
> +CONFIG_USB_CONFIGFS_F_UAC2=y
> +CONFIG_USB_CONFIGFS_F_MIDI=y
> +CONFIG_USB_CONFIGFS_F_HID=y
> +CONFIG_USB_ZERO=m
> +CONFIG_USB_G_NOKIA=m
> +CONFIG_MMC=y
> +CONFIG_SDIO_UART=y
> +CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_PLTFM=y
> +CONFIG_MMC_OMAP=y
> +CONFIG_MMC_OMAP_HS=y
> +CONFIG_MMC_TIFM_SD=y
> +CONFIG_MMC_SPI=y
> +CONFIG_MMC_SDHCI_OMAP=y
> +CONFIG_MMC_SDHCI_AM654=y
> +CONFIG_NEW_LEDS=y
> +CONFIG_LEDS_CLASS=m
> +CONFIG_LEDS_CPCAP=m
> +CONFIG_LEDS_LM3532=m
> +CONFIG_LEDS_GPIO=m
> +CONFIG_LEDS_PCA963X=m
> +CONFIG_LEDS_PWM=m
> +CONFIG_LEDS_TRIGGERS=y
> +CONFIG_LEDS_TRIGGER_TIMER=m
> +CONFIG_LEDS_TRIGGER_ONESHOT=m
> +CONFIG_LEDS_TRIGGER_HEARTBEAT=m
> +CONFIG_LEDS_TRIGGER_BACKLIGHT=m
> +CONFIG_LEDS_TRIGGER_CPU=y
> +CONFIG_LEDS_TRIGGER_GPIO=m
> +CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
> +CONFIG_RTC_CLASS=y
> +CONFIG_RTC_DRV_DS1307=m
> +CONFIG_RTC_DRV_PCF8523=m
> +CONFIG_RTC_DRV_PCF8563=m
> +CONFIG_RTC_DRV_M41T80=m
> +CONFIG_RTC_DRV_TWL92330=y
> +CONFIG_RTC_DRV_PALMAS=m
> +CONFIG_RTC_DRV_OMAP=m
> +CONFIG_RTC_DRV_CPCAP=m
> +CONFIG_DMADEVICES=y
> +CONFIG_TI_CPPI41=y
> +CONFIG_COMMON_CLK_CDCE706=y
> +CONFIG_COMMON_CLK_CDCE925=y
> +CONFIG_CLK_TWL6040=m
> +CONFIG_COMMON_CLK_PALMAS=m
> +CONFIG_OMAP_IOMMU=y
> +CONFIG_REMOTEPROC=y
> +CONFIG_OMAP_REMOTEPROC=m
> +CONFIG_WKUP_M3_RPROC=m
> +CONFIG_SOC_TI=y
> +CONFIG_AMX3_PM=m
> +CONFIG_WKUP_M3_IPC=m
> +CONFIG_EXTCON_PALMAS=m
> +CONFIG_EXTCON_USB_GPIO=m
> +CONFIG_TI_EMIF=m
> +CONFIG_TI_EMIF_SRAM=m
> +CONFIG_IIO=m
> +CONFIG_IIO_SW_DEVICE=m
> +CONFIG_IIO_SW_TRIGGER=m
> +CONFIG_IIO_ST_ACCEL_3AXIS=m
> +CONFIG_CPCAP_ADC=m
> +CONFIG_INA2XX_ADC=m
> +CONFIG_TI_AM335X_ADC=m
> +CONFIG_TWL4030_MADC=m
> +CONFIG_SENSORS_ISL29028=m
> +CONFIG_BMP280=m
> +CONFIG_PWM=y
> +CONFIG_PWM_OMAP_DMTIMER=m
> +CONFIG_PWM_TIECAP=m
> +CONFIG_PWM_TIEHRPWM=m
> +CONFIG_PWM_TWL=y
> +CONFIG_PWM_TWL_LED=y
> +CONFIG_PHY_CPCAP_USB=m
> +CONFIG_PHY_MAPPHONE_MDM6600=m
> +CONFIG_PHY_ATH79_USB=m
> +CONFIG_PHY_DM816X_USB=m
> +CONFIG_OMAP_USB2=y
> +CONFIG_TI_PIPE3=y
> +CONFIG_TWL4030_USB=m
> +CONFIG_EXT2_FS=y
> +CONFIG_EXT3_FS=y
> +CONFIG_EXT4_FS_SECURITY=y
> +CONFIG_FANOTIFY=y
> +CONFIG_QUOTA=y
> +CONFIG_QFMT_V2=y
> +CONFIG_AUTOFS4_FS=m
> +CONFIG_MSDOS_FS=y
> +CONFIG_VFAT_FS=y
> +CONFIG_TMPFS=y
> +CONFIG_TMPFS_POSIX_ACL=y
> +CONFIG_UBIFS_FS=y
> +CONFIG_CRAMFS=y
> +CONFIG_NFS_FS=y
> +CONFIG_NFS_V3_ACL=y
> +CONFIG_NFS_V4=y
> +CONFIG_ROOT_NFS=y
> +CONFIG_NLS_CODEPAGE_437=y
> +CONFIG_NLS_ISO8859_1=y
> +CONFIG_SECURITY=y
> +CONFIG_CRYPTO_MICHAEL_MIC=y
> +CONFIG_CRYPTO_DEV_OMAP=m
> +CONFIG_CRYPTO_DEV_OMAP_SHAM=m
> +CONFIG_CRYPTO_DEV_OMAP_AES=m
> +CONFIG_CRYPTO_DEV_OMAP_DES=m
> +CONFIG_CRC_CCITT=y
> +CONFIG_CRC_T10DIF=y
> +CONFIG_LIBCRC32C=y
> +CONFIG_DMA_CMA=y
> +CONFIG_FONTS=y
> +CONFIG_FONT_8x8=y
> +CONFIG_FONT_8x16=y
> +CONFIG_PRINTK_TIME=y
> +CONFIG_BOOT_PRINTK_DELAY=y
> +CONFIG_MAGIC_SYSRQ=y
> +CONFIG_SCHEDSTATS=y
> +CONFIG_MEMTEST=y
> +CONFIG_EARLY_PRINTK=y
Could you strip it down? It seems like a *lot* of features are not
really relevant.
> diff --git a/board/ultratronik/omap3_mws4/kernel_patches/mws4.patch b/board/ultratronik/omap3_mws4/kernel_patches/mws4.patch
> new file mode 100644
> index 0000000000..9d8bc1e175
> --- /dev/null
> +++ b/board/ultratronik/omap3_mws4/kernel_patches/mws4.patch
Has this been submitted to the upstream Linux kernel? We prefer to not
have to carry this patch forever in Buildroot.
> +diff --git a/drivers/net/ethernet/asix/ax88796_dt.c b/drivers/net/ethernet/asix/ax88796_dt.c
> +new file mode 100644
> +index 000000000000..048c8aa1feda
> +--- /dev/null
> ++++ b/drivers/net/ethernet/asix/ax88796_dt.c
> +@@ -0,0 +1,193 @@
> ++// devicetree driver for ax88796 platform device
> ++// ulbricht@innoroute.de 2021
This needs to be submitted to the upstream Linux kernel. You will get
lots of feedback explaining that this driver is not correct, I'm afraid.
> ++// GPLv3
GPLv3 is incompatible with the GPLv2-only license of the Linux kernel
unfortunately.
> diff --git a/board/ultratronik/omap3_mws4/overlay-base/etc/network/interfaces b/board/ultratronik/omap3_mws4/overlay-base/etc/network/interfaces
> new file mode 100644
> index 0000000000..ddd3defe73
> --- /dev/null
> +++ b/board/ultratronik/omap3_mws4/overlay-base/etc/network/interfaces
> @@ -0,0 +1,8 @@
> +# Configure Loopback
> +auto lo
> +iface lo inet loopback
> +
> +auto eth0
> +allow-hotplug eth0
> +iface eth0 inet dhcp
Not needed, Buildroot option BR2_SYSTEM_DHCP="eth0" allows to achieve
the same.
> diff --git a/board/ultratronik/omap3_mws4/overlay-base/usr/mws4/GPIO_init.sh b/board/ultratronik/omap3_mws4/overlay-base/usr/mws4/GPIO_init.sh
> new file mode 100755
> index 0000000000..303d73fb75
> --- /dev/null
> +++ b/board/ultratronik/omap3_mws4/overlay-base/usr/mws4/GPIO_init.sh
We generally don't want this sort of product-specific script in
Buildroot.
> diff --git a/board/ultratronik/omap3_mws4/overlay-base/usr/mws4/flash_ubi.sh b/board/ultratronik/omap3_mws4/overlay-base/usr/mws4/flash_ubi.sh
> new file mode 100755
> index 0000000000..79f5e0af72
> --- /dev/null
> +++ b/board/ultratronik/omap3_mws4/overlay-base/usr/mws4/flash_ubi.sh
Same comment.
> @@ -0,0 +1,6 @@
> +#!/bin/bash
> +mkdir /mnt/flash
> +mount /dev/mmcblk0p3 /mnt/flash/
> +flash_erase /dev/mtd5 0 0
> +nandwrite -p /dev/mtd5 /mnt/flash/rootfs.ubi
> +echo "done"
> diff --git a/board/ultratronik/omap3_mws4/patches/uboot/uboot-2022.04-mws4.patch b/board/ultratronik/omap3_mws4/patches/uboot/uboot-2022.04-mws4.patch
> new file mode 100644
> index 0000000000..d2b55ebd0e
> --- /dev/null
> +++ b/board/ultratronik/omap3_mws4/patches/uboot/uboot-2022.04-mws4.patch
Has this been submitted to upstream U-Boot? Just like for the Linux
kernel, we very much prefer not to keep such large board-specific
patches in Buildroot.
> diff --git a/board/ultratronik/omap3_mws4/readme.txt b/board/ultratronik/omap3_mws4/readme.txt
> new file mode 100644
> index 0000000000..10a2da5352
> --- /dev/null
> +++ b/board/ultratronik/omap3_mws4/readme.txt
Please take example on other readme.txt files in the Buildroot tree on
how to write your readme.txt.
> +## Boot instructions
> +* the system is always able to boot from sd-card, if SD-boot jumper is set and uboot uses its default envoronment (reset with ```env default -a; saveenv```)
typo: environment
> +* note: if booting from flash(no jumper set), the bootloader can't access the SD-card
> +* the boot-jumper just effects the location, the bootloader is loaded from, the kernel location is selected by the boot commands below
effects -> affects
> +* todo for successfull nand-boot: upgrade bootloader, load kernel in flash, load root-fs in flash (follow the insctructions below)
> +### Upgrade bootloader
> +* To boot from nand-flash, the bootload needs an update to load the new kernel
> +* mount first partition of sdcard
> +* rename u-boot.bin -> u-boot-new.bin
> +* rename u-boot-old.bin -> u-boot.bin
Why this dance between u-boot-new and u-boot-old? One is for NAND flash
booting, and the other for SD card booting?
I'd say we normally try to support only one case: either SD or NAND,
and not a frankenstein config that tries to support both.
> diff --git a/configs/mws4_defconfig b/configs/mws4_defconfig
> new file mode 100644
> index 0000000000..4e560ff95a
> --- /dev/null
> +++ b/configs/mws4_defconfig
> @@ -0,0 +1,142 @@
> +BR2_arm=y
> +BR2_cortex_a8=y
> +BR2_GLOBAL_PATCH_DIR="board/ultratronik/omap3_mws4/patches"
> +BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
Please keep the default C library.
> +BR2_KERNEL_HEADERS_5_4=y
Please use the option "headers same as kernel".
Overall, your defconfig should be minimal: no extra packages other than
Busybox, Linux and U-Boot.
> +BR2_TOOLCHAIN_BUILDROOT_CXX=y
> +BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y
> +BR2_ROOTFS_DEVICE_TABLE_SUPPORTS_EXTENDED_ATTRIBUTES=y
> +BR2_ROOTFS_MERGED_USR=y
> +BR2_SYSTEM_BIN_SH_BASH=y
> +BR2_SYSTEM_DEFAULT_PATH="/bin:/sbin:/usr/bin:/usr/sbin"
> +BR2_TARGET_TZ_INFO=y
> +BR2_ROOTFS_OVERLAY="board/ultratronik/omap3_mws4/overlay-base"
> +BR2_ROOTFS_POST_IMAGE_SCRIPT="board/ultratronik/omap3_mws4/genimage.sh"
> +BR2_LINUX_KERNEL=y
> +# BR2_LINUX_KERNEL_CUSTOM_GIT=y
> +# BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git@github.com:InnoRoute/linux-1.git"
> +# BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="dev"
> +BR2_LINUX_KERNEL_DEFCONFIG="omap3_mws4"
> +# BR2_LINUX_KERNEL_LATEST_VERSION is not set
> +# BR2_LINUX_KERNEL_LATEST_CIP_VERSION is not set
> +# BR2_LINUX_KERNEL_LATEST_CIP_RT_VERSION is not set
> +BR2_LINUX_KERNEL_CUSTOM_VERSION=y
> +# BR2_LINUX_KERNEL_CUSTOM_TARBALL is not set
> +# BR2_LINUX_KERNEL_CUSTOM_GIT is not set
> +# BR2_LINUX_KERNEL_CUSTOM_HG is not set
> +# BR2_LINUX_KERNEL_CUSTOM_SVN is not set
Many of these "is not set" are useless. Did you use "make
savedefconfig" to generate the defconfig?
> +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="v5.4-rc8"
> +BR2_LINUX_KERNEL_VERSION="v5.4-rc8"
> +BR2_LINUX_KERNEL_PATCH="$(TOPDIR)/board/ultratronik/omap3_mws4/kernel_patches"
Not needed if you use BR2_GLOBAL_PATCH_DIR.
> +BR2_TARGET_UBOOT=y
> +BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
> +BR2_TARGET_UBOOT_BOARD_DEFCONFIG="omap3_mws4"
> +BR2_TARGET_UBOOT_NEEDS_DTC=y
You need to specify an explicit and fixed version of U-Boot.
That's it for this review!
Best regards,
Thomas
--
Thomas Petazzoni, co-owner and CEO, Bootlin
Embedded Linux and Kernel engineering and training
https://bootlin.com
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2022-07-24 18:12 [Buildroot] [PATCH 1/1 v2] add support for mws4 board Marian Ulbricht
2022-07-26 17:31 ` Thomas Petazzoni via buildroot
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