From: Tim Harvey <tharvey@gateworks.com>
To: Shawn Guo <shawnguo@kernel.org>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: Tim Harvey <tharvey@gateworks.com>
Subject: [PATCH] arm64: dts: imx8mm-venice-gw7903: add digital I/O ctl gpios
Date: Fri, 12 Aug 2022 10:23:34 -0700 [thread overview]
Message-ID: <20220812172334.14171-1-tharvey@gateworks.com> (raw)
The GW7903-C revision introduced two additional GPIO's for controlling
the digital I/O direction. Add them.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
index a7dae9bd4c11..1b69ac0e12b0 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
@@ -250,7 +250,7 @@ &gpio1 {
};
&gpio2 {
- gpio-line-names = "dig2_in", "dig2_out#", "", "", "", "", "", "",
+ gpio-line-names = "dig2_in", "dig2_out#", "dig2_ctl", "", "", "", "dig1_ctl", "",
"dig1_out#", "dig1_in", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
@@ -630,6 +630,8 @@ MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x40000041 /* RS485# */
MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x40000041 /* RS232# */
MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9 0x40000041 /* DIG1_IN */
MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x40000041 /* DIG1_OUT */
+ MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x40000041 /* DIG1_CTL */
+ MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x40000041 /* DIG2_CTL */
MX8MM_IOMUXC_SD1_CLK_GPIO2_IO0 0x40000041 /* DIG2_IN */
MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1 0x40000041 /* DIG2_OUT */
MX8MM_IOMUXC_ECSPI1_MOSI_GPIO5_IO7 0x40000041 /* SIM1DET# */
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Tim Harvey <tharvey@gateworks.com>
To: Shawn Guo <shawnguo@kernel.org>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: Tim Harvey <tharvey@gateworks.com>
Subject: [PATCH] arm64: dts: imx8mm-venice-gw7903: add digital I/O ctl gpios
Date: Fri, 12 Aug 2022 10:23:34 -0700 [thread overview]
Message-ID: <20220812172334.14171-1-tharvey@gateworks.com> (raw)
The GW7903-C revision introduced two additional GPIO's for controlling
the digital I/O direction. Add them.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
index a7dae9bd4c11..1b69ac0e12b0 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
@@ -250,7 +250,7 @@ &gpio1 {
};
&gpio2 {
- gpio-line-names = "dig2_in", "dig2_out#", "", "", "", "", "", "",
+ gpio-line-names = "dig2_in", "dig2_out#", "dig2_ctl", "", "", "", "dig1_ctl", "",
"dig1_out#", "dig1_in", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
@@ -630,6 +630,8 @@ MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x40000041 /* RS485# */
MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x40000041 /* RS232# */
MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9 0x40000041 /* DIG1_IN */
MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x40000041 /* DIG1_OUT */
+ MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x40000041 /* DIG1_CTL */
+ MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x40000041 /* DIG2_CTL */
MX8MM_IOMUXC_SD1_CLK_GPIO2_IO0 0x40000041 /* DIG2_IN */
MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1 0x40000041 /* DIG2_OUT */
MX8MM_IOMUXC_ECSPI1_MOSI_GPIO5_IO7 0x40000041 /* SIM1DET# */
--
2.25.1
next reply other threads:[~2022-08-12 17:24 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-12 17:23 Tim Harvey [this message]
2022-08-12 17:23 ` [PATCH] arm64: dts: imx8mm-venice-gw7903: add digital I/O ctl gpios Tim Harvey
2022-08-22 1:55 ` Shawn Guo
2022-08-22 1:55 ` Shawn Guo
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220812172334.14171-1-tharvey@gateworks.com \
--to=tharvey@gateworks.com \
--cc=devicetree@vger.kernel.org \
--cc=festevam@gmail.com \
--cc=kernel@pengutronix.de \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-imx@nxp.com \
--cc=linux-kernel@vger.kernel.org \
--cc=robh+dt@kernel.org \
--cc=s.hauer@pengutronix.de \
--cc=shawnguo@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.