From: "Marek Behún" <kabel@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <helgaas@kernel.org>
Cc: "Krzysztof Wilczyński" <kw@linux.com>,
pali@kernel.org, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
"Miquel Raynal" <miquel.raynal@bootlin.com>,
"Marek Behún" <kabel@kernel.org>
Subject: [PATCH 06/11] PCI: aardvark: Add clock support
Date: Thu, 18 Aug 2022 15:51:35 +0200 [thread overview]
Message-ID: <20220818135140.5996-7-kabel@kernel.org> (raw)
In-Reply-To: <20220818135140.5996-1-kabel@kernel.org>
From: Miquel Raynal <miquel.raynal@bootlin.com>
The IP relies on a gated clock. When we will add S2RAM support, this
clock will need to be resumed before any PCIe registers are
accessed. Add support for this clock.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
drivers/pci/controller/pci-aardvark.c | 32 +++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index 03e318bc171f..3beafc893969 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -9,6 +9,7 @@
*/
#include <linux/bitfield.h>
+#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/interrupt.h>
@@ -297,6 +298,7 @@ struct advk_pcie {
struct timer_list link_irq_timer;
struct pci_bridge_emul bridge;
struct gpio_desc *reset_gpio;
+ struct clk *clk;
struct phy *phy;
};
@@ -1809,6 +1811,29 @@ static int advk_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
return of_irq_parse_and_map_pci(dev, slot, pin);
}
+static int advk_pcie_setup_clk(struct advk_pcie *pcie)
+{
+ struct device *dev = &pcie->pdev->dev;
+ int ret;
+
+ pcie->clk = devm_clk_get(dev, NULL);
+ if (IS_ERR(pcie->clk) && (PTR_ERR(pcie->clk) == -EPROBE_DEFER))
+ return PTR_ERR(pcie->clk);
+
+ /* Old bindings miss the clock handle */
+ if (IS_ERR(pcie->clk)) {
+ dev_warn(dev, "Clock unavailable (%ld)\n", PTR_ERR(pcie->clk));
+ pcie->clk = NULL;
+ return 0;
+ }
+
+ ret = clk_prepare_enable(pcie->clk);
+ if (ret)
+ dev_err(dev, "Clock initialization failed (%d)\n", ret);
+
+ return ret;
+}
+
static void advk_pcie_disable_phy(struct advk_pcie *pcie)
{
phy_power_off(pcie->phy);
@@ -2000,6 +2025,10 @@ static int advk_pcie_probe(struct platform_device *pdev)
slot_power_limit / 1000,
(slot_power_limit / 100) % 10);
+ ret = advk_pcie_setup_clk(pcie);
+ if (ret)
+ return ret;
+
ret = advk_pcie_setup_phy(pcie);
if (ret)
return ret;
@@ -2122,6 +2151,9 @@ static int advk_pcie_remove(struct platform_device *pdev)
/* Disable phy */
advk_pcie_disable_phy(pcie);
+ /* Disable clock */
+ clk_disable_unprepare(pcie->clk);
+
return 0;
}
--
2.35.1
WARNING: multiple messages have this Message-ID (diff)
From: "Marek Behún" <kabel@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <helgaas@kernel.org>
Cc: "Krzysztof Wilczyński" <kw@linux.com>,
pali@kernel.org, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
"Miquel Raynal" <miquel.raynal@bootlin.com>,
"Marek Behún" <kabel@kernel.org>
Subject: [PATCH 06/11] PCI: aardvark: Add clock support
Date: Thu, 18 Aug 2022 15:51:35 +0200 [thread overview]
Message-ID: <20220818135140.5996-7-kabel@kernel.org> (raw)
In-Reply-To: <20220818135140.5996-1-kabel@kernel.org>
From: Miquel Raynal <miquel.raynal@bootlin.com>
The IP relies on a gated clock. When we will add S2RAM support, this
clock will need to be resumed before any PCIe registers are
accessed. Add support for this clock.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
drivers/pci/controller/pci-aardvark.c | 32 +++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index 03e318bc171f..3beafc893969 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -9,6 +9,7 @@
*/
#include <linux/bitfield.h>
+#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/interrupt.h>
@@ -297,6 +298,7 @@ struct advk_pcie {
struct timer_list link_irq_timer;
struct pci_bridge_emul bridge;
struct gpio_desc *reset_gpio;
+ struct clk *clk;
struct phy *phy;
};
@@ -1809,6 +1811,29 @@ static int advk_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
return of_irq_parse_and_map_pci(dev, slot, pin);
}
+static int advk_pcie_setup_clk(struct advk_pcie *pcie)
+{
+ struct device *dev = &pcie->pdev->dev;
+ int ret;
+
+ pcie->clk = devm_clk_get(dev, NULL);
+ if (IS_ERR(pcie->clk) && (PTR_ERR(pcie->clk) == -EPROBE_DEFER))
+ return PTR_ERR(pcie->clk);
+
+ /* Old bindings miss the clock handle */
+ if (IS_ERR(pcie->clk)) {
+ dev_warn(dev, "Clock unavailable (%ld)\n", PTR_ERR(pcie->clk));
+ pcie->clk = NULL;
+ return 0;
+ }
+
+ ret = clk_prepare_enable(pcie->clk);
+ if (ret)
+ dev_err(dev, "Clock initialization failed (%d)\n", ret);
+
+ return ret;
+}
+
static void advk_pcie_disable_phy(struct advk_pcie *pcie)
{
phy_power_off(pcie->phy);
@@ -2000,6 +2025,10 @@ static int advk_pcie_probe(struct platform_device *pdev)
slot_power_limit / 1000,
(slot_power_limit / 100) % 10);
+ ret = advk_pcie_setup_clk(pcie);
+ if (ret)
+ return ret;
+
ret = advk_pcie_setup_phy(pcie);
if (ret)
return ret;
@@ -2122,6 +2151,9 @@ static int advk_pcie_remove(struct platform_device *pdev)
/* Disable phy */
advk_pcie_disable_phy(pcie);
+ /* Disable clock */
+ clk_disable_unprepare(pcie->clk);
+
return 0;
}
--
2.35.1
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next prev parent reply other threads:[~2022-08-18 13:52 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-18 13:51 [PATCH 00/11] PCI: aardvark controller changes BATCH 6 Marek Behún
2022-08-18 13:51 ` Marek Behún
2022-08-18 13:51 ` [PATCH 01/11] PCI: pciehp: Enable DLLSC interrupt only if supported Marek Behún
2022-08-18 13:51 ` Marek Behún
2022-08-21 12:46 ` Lukas Wunner
2022-08-22 10:37 ` Marek Behún
2022-08-22 10:37 ` Marek Behún
2022-08-18 13:51 ` [PATCH 02/11] PCI: pciehp: Enable Command Completed Interrupt " Marek Behún
2022-08-18 13:51 ` Marek Behún
2022-08-21 15:20 ` Lukas Wunner
2022-09-28 8:39 ` Lorenzo Pieralisi
2022-09-28 8:39 ` Lorenzo Pieralisi
2022-08-18 13:51 ` [PATCH 03/11] PCI: aardvark: Add support for DLLSC and hotplug interrupt Marek Behún
2022-08-18 13:51 ` Marek Behún
2022-09-09 14:57 ` Lorenzo Pieralisi
2022-09-09 14:57 ` Lorenzo Pieralisi
2022-09-16 16:23 ` Marek Behún
2022-09-16 16:23 ` Marek Behún
2022-09-27 8:29 ` Lorenzo Pieralisi
2022-09-27 8:29 ` Lorenzo Pieralisi
2022-09-27 11:13 ` Pali Rohár
2022-09-27 11:13 ` Pali Rohár
2022-09-27 15:57 ` Lorenzo Pieralisi
2022-09-27 15:57 ` Lorenzo Pieralisi
2022-09-17 9:05 ` Marc Zyngier
2022-09-17 9:05 ` Marc Zyngier
2022-09-26 11:49 ` Lorenzo Pieralisi
2022-09-26 11:49 ` Lorenzo Pieralisi
2022-09-26 12:35 ` Marc Zyngier
2022-09-26 12:35 ` Marc Zyngier
2022-09-26 14:00 ` Lorenzo Pieralisi
2022-09-26 14:00 ` Lorenzo Pieralisi
2022-09-27 13:40 ` Marek Behún
2022-09-27 13:40 ` Marek Behún
2022-08-18 13:51 ` [PATCH 04/11] PCI: aardvark: Send Set_Slot_Power_Limit message Marek Behún
2022-08-18 13:51 ` Marek Behún
2022-08-18 13:51 ` [PATCH 05/11] arm64: dts: armada-3720-turris-mox: Define slot-power-limit-milliwatt for PCIe Marek Behún
2022-08-18 13:51 ` Marek Behún
2022-08-18 13:51 ` Marek Behún [this message]
2022-08-18 13:51 ` [PATCH 06/11] PCI: aardvark: Add clock support Marek Behún
2022-08-18 13:51 ` [PATCH 07/11] PCI: aardvark: Add suspend to RAM support Marek Behún
2022-08-18 13:51 ` Marek Behún
2022-09-09 10:33 ` Lorenzo Pieralisi
2022-09-09 10:33 ` Lorenzo Pieralisi
2022-09-27 8:30 ` Lorenzo Pieralisi
2022-09-27 8:30 ` Lorenzo Pieralisi
2022-08-18 13:51 ` [PATCH 08/11] PCI: aardvark: Replace custom PCIE_CORE_ERR_CAPCTL_* macros by linux/pci_regs.h macros Marek Behún
2022-08-18 13:51 ` Marek Behún
2022-08-18 13:51 ` [PATCH 09/11] PCI: aardvark: Don't write read-only bits explicitly in PCI_ERR_CAP register Marek Behún
2022-08-18 13:51 ` Marek Behún
2022-08-18 13:51 ` [PATCH 10/11] PCI: aardvark: Explicitly disable Marvell strict ordering Marek Behún
2022-08-18 13:51 ` Marek Behún
2022-08-18 13:51 ` [PATCH 11/11] PCI: aardvark: Cleanup some register macros Marek Behún
2022-08-18 13:51 ` Marek Behún
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