All of lore.kernel.org
 help / color / mirror / Atom feed
From: Rob Herring <robh@kernel.org>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: p.zabel@pengutronix.de, l.stach@pengutronix.de,
	bhelgaas@google.com, lorenzo.pieralisi@arm.com,
	shawnguo@kernel.org, vkoul@kernel.org,
	alexander.stein@ew.tq-group.com, marex@denx.de,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, kernel@pengutronix.de,
	linux-imx@nxp.com
Subject: Re: [PATCH v3 2/6] dt-binding: phy: Add iMX8MP PCIe PHY binding
Date: Mon, 22 Aug 2022 13:07:13 -0500	[thread overview]
Message-ID: <20220822180713.GA75195-robh@kernel.org> (raw)
In-Reply-To: <1660806153-29001-3-git-send-email-hongxing.zhu@nxp.com>

On Thu, Aug 18, 2022 at 03:02:29PM +0800, Richard Zhu wrote:
> Add i.MX8MP PCIe PHY binding.

Explain the differences in h/w. The phy is connected to PERST#?

> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
>  .../bindings/phy/fsl,imx8-pcie-phy.yaml          | 16 +++++++++++++---
>  1 file changed, 13 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml
> index b6421eedece3..692783c7fd69 100644
> --- a/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml
> @@ -16,6 +16,7 @@ properties:
>    compatible:
>      enum:
>        - fsl,imx8mm-pcie-phy
> +      - fsl,imx8mp-pcie-phy
>  
>    reg:
>      maxItems: 1
> @@ -28,11 +29,16 @@ properties:
>        - const: ref
>  
>    resets:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 2
>  
>    reset-names:
> -    items:
> -      - const: pciephy
> +    oneOf:
> +      - items:          # for iMX8MM
> +          - const: pciephy
> +      - items:          # for IMX8MP
> +          - const: pciephy
> +          - const: perst

This does the same thing:

minItems: 1
items:
  - const: pciephy
  - const: perst


>  
>    fsl,refclk-pad-mode:
>      description: |
> @@ -60,6 +66,10 @@ properties:
>      description: A boolean property indicating the CLKREQ# signal is
>        not supported in the board design (optional)
>  
> +  power-domains:
> +    description: PCIe PHY  power domain (optional).
> +    maxItems: 1
> +
>  required:
>    - "#phy-cells"
>    - compatible
> -- 
> 2.25.1
> 
> 

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: p.zabel@pengutronix.de, l.stach@pengutronix.de,
	bhelgaas@google.com, lorenzo.pieralisi@arm.com,
	shawnguo@kernel.org, vkoul@kernel.org,
	alexander.stein@ew.tq-group.com, marex@denx.de,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, kernel@pengutronix.de,
	linux-imx@nxp.com
Subject: Re: [PATCH v3 2/6] dt-binding: phy: Add iMX8MP PCIe PHY binding
Date: Mon, 22 Aug 2022 13:07:13 -0500	[thread overview]
Message-ID: <20220822180713.GA75195-robh@kernel.org> (raw)
In-Reply-To: <1660806153-29001-3-git-send-email-hongxing.zhu@nxp.com>

On Thu, Aug 18, 2022 at 03:02:29PM +0800, Richard Zhu wrote:
> Add i.MX8MP PCIe PHY binding.

Explain the differences in h/w. The phy is connected to PERST#?

> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
>  .../bindings/phy/fsl,imx8-pcie-phy.yaml          | 16 +++++++++++++---
>  1 file changed, 13 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml
> index b6421eedece3..692783c7fd69 100644
> --- a/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml
> @@ -16,6 +16,7 @@ properties:
>    compatible:
>      enum:
>        - fsl,imx8mm-pcie-phy
> +      - fsl,imx8mp-pcie-phy
>  
>    reg:
>      maxItems: 1
> @@ -28,11 +29,16 @@ properties:
>        - const: ref
>  
>    resets:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 2
>  
>    reset-names:
> -    items:
> -      - const: pciephy
> +    oneOf:
> +      - items:          # for iMX8MM
> +          - const: pciephy
> +      - items:          # for IMX8MP
> +          - const: pciephy
> +          - const: perst

This does the same thing:

minItems: 1
items:
  - const: pciephy
  - const: perst


>  
>    fsl,refclk-pad-mode:
>      description: |
> @@ -60,6 +66,10 @@ properties:
>      description: A boolean property indicating the CLKREQ# signal is
>        not supported in the board design (optional)
>  
> +  power-domains:
> +    description: PCIe PHY  power domain (optional).
> +    maxItems: 1
> +
>  required:
>    - "#phy-cells"
>    - compatible
> -- 
> 2.25.1
> 
> 

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: p.zabel@pengutronix.de, l.stach@pengutronix.de,
	bhelgaas@google.com, lorenzo.pieralisi@arm.com,
	shawnguo@kernel.org, vkoul@kernel.org,
	alexander.stein@ew.tq-group.com, marex@denx.de,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, kernel@pengutronix.de,
	linux-imx@nxp.com
Subject: Re: [PATCH v3 2/6] dt-binding: phy: Add iMX8MP PCIe PHY binding
Date: Mon, 22 Aug 2022 13:07:13 -0500	[thread overview]
Message-ID: <20220822180713.GA75195-robh@kernel.org> (raw)
In-Reply-To: <1660806153-29001-3-git-send-email-hongxing.zhu@nxp.com>

On Thu, Aug 18, 2022 at 03:02:29PM +0800, Richard Zhu wrote:
> Add i.MX8MP PCIe PHY binding.

Explain the differences in h/w. The phy is connected to PERST#?

> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
>  .../bindings/phy/fsl,imx8-pcie-phy.yaml          | 16 +++++++++++++---
>  1 file changed, 13 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml
> index b6421eedece3..692783c7fd69 100644
> --- a/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml
> @@ -16,6 +16,7 @@ properties:
>    compatible:
>      enum:
>        - fsl,imx8mm-pcie-phy
> +      - fsl,imx8mp-pcie-phy
>  
>    reg:
>      maxItems: 1
> @@ -28,11 +29,16 @@ properties:
>        - const: ref
>  
>    resets:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 2
>  
>    reset-names:
> -    items:
> -      - const: pciephy
> +    oneOf:
> +      - items:          # for iMX8MM
> +          - const: pciephy
> +      - items:          # for IMX8MP
> +          - const: pciephy
> +          - const: perst

This does the same thing:

minItems: 1
items:
  - const: pciephy
  - const: perst


>  
>    fsl,refclk-pad-mode:
>      description: |
> @@ -60,6 +66,10 @@ properties:
>      description: A boolean property indicating the CLKREQ# signal is
>        not supported in the board design (optional)
>  
> +  power-domains:
> +    description: PCIe PHY  power domain (optional).
> +    maxItems: 1
> +
>  required:
>    - "#phy-cells"
>    - compatible
> -- 
> 2.25.1
> 
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-08-22 18:07 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-18  7:02 [PATCH v3 0/6] Add the iMX8MP PCIe support Richard Zhu
2022-08-18  7:02 ` Richard Zhu
2022-08-18  7:02 ` Richard Zhu
2022-08-18  7:02 ` [PATCH v3 1/6] reset: imx7: Add the iMX8MP PCIe PHY PERST support Richard Zhu
2022-08-18  7:02   ` Richard Zhu
2022-08-18  7:02   ` Richard Zhu
2022-08-18  8:50   ` Philipp Zabel
2022-08-18  8:50     ` Philipp Zabel
2022-08-18  8:50     ` Philipp Zabel
2022-08-18 10:53     ` Hongxing Zhu
2022-08-18 10:53       ` Hongxing Zhu
2022-08-18 10:53       ` Hongxing Zhu
2022-08-29  8:10       ` Lorenzo Pieralisi
2022-08-29  8:10         ` Lorenzo Pieralisi
2022-08-29  8:10         ` Lorenzo Pieralisi
2022-08-29  8:14         ` Hongxing Zhu
2022-08-29  8:14           ` Hongxing Zhu
2022-08-29  8:14           ` Hongxing Zhu
2022-08-18  7:02 ` [PATCH v3 2/6] dt-binding: phy: Add iMX8MP PCIe PHY binding Richard Zhu
2022-08-18  7:02   ` Richard Zhu
2022-08-18  7:02   ` Richard Zhu
2022-08-22 18:07   ` Rob Herring [this message]
2022-08-22 18:07     ` Rob Herring
2022-08-22 18:07     ` Rob Herring
2022-08-23  2:11     ` Hongxing Zhu
2022-08-23  2:11       ` Hongxing Zhu
2022-08-23  2:11       ` Hongxing Zhu
2022-08-24  9:15       ` Hongxing Zhu
2022-08-24  9:15         ` Hongxing Zhu
2022-08-24  9:15         ` Hongxing Zhu
2022-08-18  7:02 ` [PATCH v3 3/6] phy: freescale: imx8m-pcie: Add iMX8MP PCIe PHY support Richard Zhu
2022-08-18  7:02   ` Richard Zhu
2022-08-18  7:02   ` Richard Zhu
2022-08-18  7:02 ` [PATCH v3 4/6] arm64: dts: imx8mp: add the iMX8MP PCIe support Richard Zhu
2022-08-18  7:02   ` Richard Zhu
2022-08-18  7:02   ` Richard Zhu
2022-08-18  7:02 ` [PATCH v3 5/6] arm64: dts: imx8mp-evk: Add " Richard Zhu
2022-08-18  7:02   ` Richard Zhu
2022-08-18  7:02   ` Richard Zhu
2022-08-18  7:02 ` [PATCH v3 6/6] PCI: imx6: Add the iMX8MP " Richard Zhu
2022-08-18  7:02   ` Richard Zhu
2022-08-18  7:02   ` Richard Zhu
2022-08-18  9:20 ` [PATCH v3 0/6] " Marek Vasut
2022-08-18  9:20   ` Marek Vasut
2022-08-18  9:20   ` Marek Vasut
2022-08-18 10:53   ` Hongxing Zhu
2022-08-18 10:53     ` Hongxing Zhu
2022-08-18 10:53     ` Hongxing Zhu
2022-08-18 11:49     ` Marek Vasut
2022-08-18 11:49       ` Marek Vasut
2022-08-18 11:49       ` Marek Vasut
2022-08-25 12:23 ` Richard Leitner
2022-08-25 12:23   ` Richard Leitner
2022-08-25 12:23   ` Richard Leitner
2022-08-26  1:29   ` Hongxing Zhu
2022-08-26  1:29     ` Hongxing Zhu
2022-08-26  1:29     ` Hongxing Zhu
2022-08-26  6:22 ` Alexander Stein
2022-08-26  6:22   ` Alexander Stein
2022-08-26  6:22   ` Alexander Stein
2022-08-26  6:56   ` Hongxing Zhu
2022-08-26  6:56     ` Hongxing Zhu
2022-08-26  6:56     ` Hongxing Zhu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220822180713.GA75195-robh@kernel.org \
    --to=robh@kernel.org \
    --cc=alexander.stein@ew.tq-group.com \
    --cc=bhelgaas@google.com \
    --cc=devicetree@vger.kernel.org \
    --cc=hongxing.zhu@nxp.com \
    --cc=kernel@pengutronix.de \
    --cc=l.stach@pengutronix.de \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-imx@nxp.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-phy@lists.infradead.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=marex@denx.de \
    --cc=p.zabel@pengutronix.de \
    --cc=shawnguo@kernel.org \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.