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From: Rob Herring <robh@kernel.org>
To: Conor Dooley <mail@conchuod.ie>
Cc: linux-kernel@vger.kernel.org,
	Lorenzo Pieralisi <lpieralisi@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Daire McNamara <daire.mcnamara@microchip.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
	Bjorn Helgaas <bhelgaas@google.com>,
	Greentime Hu <greentime.hu@sifive.com>,
	linux-riscv@lists.infradead.org,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v3 3/7] dt-bindings: PCI: microchip,pcie-host: fix missing dma-ranges
Date: Mon, 22 Aug 2022 14:22:14 -0500	[thread overview]
Message-ID: <20220822192214.GA292150-robh@kernel.org> (raw)
In-Reply-To: <20220819231415.3860210-4-mail@conchuod.ie>

On Sat, 20 Aug 2022 00:14:12 +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> The dma-ranges property was missed when adding the binding initially.
> The root port can use up to 6 address translation tables, depending on
> configuration.
> 
> Link: https://www.microsemi.com/document-portal/doc_download/1245812-polarfire-fpga-and-polarfire-soc-fpga-pci-express-user-guide # Section 1.3.3
> Fixes: 6ee6c89aac35 ("dt-bindings: PCI: microchip: Add Microchip PolarFire host binding")
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
>  .../devicetree/bindings/pci/microchip,pcie-host.yaml          | 4 ++++
>  1 file changed, 4 insertions(+)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Conor Dooley <mail@conchuod.ie>
Cc: linux-kernel@vger.kernel.org,
	Lorenzo Pieralisi <lpieralisi@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Daire McNamara <daire.mcnamara@microchip.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
	Bjorn Helgaas <bhelgaas@google.com>,
	Greentime Hu <greentime.hu@sifive.com>,
	linux-riscv@lists.infradead.org,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v3 3/7] dt-bindings: PCI: microchip,pcie-host: fix missing dma-ranges
Date: Mon, 22 Aug 2022 14:22:14 -0500	[thread overview]
Message-ID: <20220822192214.GA292150-robh@kernel.org> (raw)
In-Reply-To: <20220819231415.3860210-4-mail@conchuod.ie>

On Sat, 20 Aug 2022 00:14:12 +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> The dma-ranges property was missed when adding the binding initially.
> The root port can use up to 6 address translation tables, depending on
> configuration.
> 
> Link: https://www.microsemi.com/document-portal/doc_download/1245812-polarfire-fpga-and-polarfire-soc-fpga-pci-express-user-guide # Section 1.3.3
> Fixes: 6ee6c89aac35 ("dt-bindings: PCI: microchip: Add Microchip PolarFire host binding")
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
>  .../devicetree/bindings/pci/microchip,pcie-host.yaml          | 4 ++++
>  1 file changed, 4 insertions(+)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

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  reply	other threads:[~2022-08-22 19:27 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-19 23:14 [PATCH v3 0/7] Fix RISC-V/PCI dt-schema issues with dt-schema v2022.08 Conor Dooley
2022-08-19 23:14 ` Conor Dooley
2022-08-19 23:14 ` [PATCH v3 1/7] dt-bindings: PCI: fu740-pci: fix missing clock-names Conor Dooley
2022-08-19 23:14   ` Conor Dooley
2022-08-22 19:20   ` Rob Herring
2022-08-22 19:20     ` Rob Herring
2022-08-23  7:43     ` Lorenzo Pieralisi
2022-08-23  7:43       ` Lorenzo Pieralisi
2022-08-23 20:21       ` Conor.Dooley
2022-08-23 20:21         ` Conor.Dooley
2022-08-19 23:14 ` [PATCH v3 2/7] dt-bindings: PCI: microchip,pcie-host: fix missing clocks properties Conor Dooley
2022-08-19 23:14   ` Conor Dooley
2022-08-22 19:21   ` Rob Herring
2022-08-22 19:21     ` Rob Herring
2022-08-19 23:14 ` [PATCH v3 3/7] dt-bindings: PCI: microchip,pcie-host: fix missing dma-ranges Conor Dooley
2022-08-19 23:14   ` Conor Dooley
2022-08-22 19:22   ` Rob Herring [this message]
2022-08-22 19:22     ` Rob Herring
2022-08-19 23:14 ` [PATCH v3 4/7] riscv: dts: microchip: mpfs: fix incorrect pcie child node name Conor Dooley
2022-08-19 23:14   ` Conor Dooley
2022-08-19 23:14 ` [PATCH v3 5/7] riscv: dts: microchip: mpfs: remove ti,fifo-depth property Conor Dooley
2022-08-19 23:14   ` Conor Dooley
2022-08-19 23:14 ` [PATCH v3 6/7] riscv: dts: microchip: mpfs: remove bogus card-detect-delay Conor Dooley
2022-08-19 23:14   ` Conor Dooley
2022-08-19 23:14 ` [PATCH v3 7/7] riscv: dts: microchip: mpfs: remove pci axi address translation property Conor Dooley
2022-08-19 23:14   ` Conor Dooley
2022-08-24 11:40 ` (subset) [PATCH v3 0/7] Fix RISC-V/PCI dt-schema issues with dt-schema v2022.08 Lorenzo Pieralisi
2022-08-24 11:40   ` Lorenzo Pieralisi
2022-08-24 16:19 ` Conor Dooley
2022-08-24 16:19   ` Conor Dooley

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