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From: Andi Shyti <andi.shyti@linux.intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Ramalingam C <ramalingampc2008@gmail.com>,
	Thomas Hellstrom <thomas.hellstrom@intel.com>,
	Matthew Auld <matthew.auld@intel.com>
Subject: [Intel-gfx] [RFC PATCH v3 08/17] drm/i915/vm_bind: Add out fence support
Date: Sat, 27 Aug 2022 21:43:54 +0200	[thread overview]
Message-ID: <20220827194403.6495-9-andi.shyti@linux.intel.com> (raw)
In-Reply-To: <20220827194403.6495-1-andi.shyti@linux.intel.com>

From: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>

Add support for handling out fence of vm_bind call.

Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h   |  3 +
 .../drm/i915/gem/i915_gem_vm_bind_object.c    | 82 +++++++++++++++++++
 drivers/gpu/drm/i915/i915_vma.c               |  6 +-
 drivers/gpu/drm/i915/i915_vma_types.h         |  7 ++
 4 files changed, 97 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h b/drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h
index ebc493b7dafc1..d65e6e4fb3972 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h
@@ -18,4 +18,7 @@ int i915_gem_vm_unbind_ioctl(struct drm_device *dev, void *data,
 			     struct drm_file *file);
 
 void i915_gem_vm_unbind_vma_all(struct i915_address_space *vm);
+void i915_vm_bind_signal_fence(struct i915_vma *vma,
+			       struct dma_fence * const fence);
+
 #endif /* __I915_GEM_VM_BIND_H */
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_vm_bind_object.c b/drivers/gpu/drm/i915/gem/i915_gem_vm_bind_object.c
index 3b45529fe8d4c..e57b9c492a7f9 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_vm_bind_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_vm_bind_object.c
@@ -5,6 +5,8 @@
 
 #include <linux/interval_tree_generic.h>
 
+#include <drm/drm_syncobj.h>
+
 #include "gem/i915_gem_vm_bind.h"
 #include "gem/i915_gem_context.h"
 #include "gt/gen8_engine_cs.h"
@@ -109,6 +111,67 @@ void i915_gem_vm_bind_remove(struct i915_vma *vma, bool release_obj)
 	}
 }
 
+static int i915_vm_bind_add_fence(struct drm_file *file, struct i915_vma *vma,
+				  u32 handle, u64 point)
+{
+	struct drm_syncobj *syncobj;
+
+	syncobj = drm_syncobj_find(file, handle);
+	if (!syncobj) {
+		DRM_DEBUG("Invalid syncobj handle provided\n");
+		return -ENOENT;
+	}
+
+	/*
+	 * For timeline syncobjs we need to preallocate chains for
+	 * later signaling.
+	 */
+	if (point) {
+		vma->vm_bind_fence.chain_fence = dma_fence_chain_alloc();
+		if (!vma->vm_bind_fence.chain_fence) {
+			drm_syncobj_put(syncobj);
+			return -ENOMEM;
+		}
+	} else {
+		vma->vm_bind_fence.chain_fence = NULL;
+	}
+	vma->vm_bind_fence.syncobj = syncobj;
+	vma->vm_bind_fence.value = point;
+
+	return 0;
+}
+
+static void i915_vm_bind_put_fence(struct i915_vma *vma)
+{
+	if (!vma->vm_bind_fence.syncobj)
+		return;
+
+	drm_syncobj_put(vma->vm_bind_fence.syncobj);
+	dma_fence_chain_free(vma->vm_bind_fence.chain_fence);
+}
+
+void i915_vm_bind_signal_fence(struct i915_vma *vma,
+			       struct dma_fence * const fence)
+{
+	struct drm_syncobj *syncobj = vma->vm_bind_fence.syncobj;
+
+	if (!syncobj)
+		return;
+
+	if (vma->vm_bind_fence.chain_fence) {
+		drm_syncobj_add_point(syncobj,
+				      vma->vm_bind_fence.chain_fence,
+				      fence, vma->vm_bind_fence.value);
+		/*
+		 * The chain's ownership is transferred to the
+		 * timeline.
+		 */
+		vma->vm_bind_fence.chain_fence = NULL;
+	} else {
+		drm_syncobj_replace_fence(syncobj, fence);
+	}
+}
+
 static int i915_gem_vm_unbind_vma(struct i915_address_space *vm,
 				  struct i915_vma *vma,
 				  struct drm_i915_gem_vm_unbind *va)
@@ -243,6 +306,15 @@ static int i915_gem_vm_bind_obj(struct i915_address_space *vm,
 		goto unlock_vm;
 	}
 
+	if (va->fence.flags & I915_TIMELINE_FENCE_SIGNAL) {
+		ret = i915_vm_bind_add_fence(file, vma, va->fence.handle,
+					     va->fence.value);
+		if (ret)
+			goto put_vma;
+	}
+
+	pin_flags = va->start | PIN_OFFSET_FIXED | PIN_USER;
+
 	for_i915_gem_ww(&ww, ret, true) {
 retry:
 		ret = i915_gem_object_lock(vma->obj, &ww);
@@ -267,12 +339,22 @@ static int i915_gem_vm_bind_obj(struct i915_address_space *vm,
 			ret = i915_gem_ww_ctx_backoff(&ww);
 			if (!ret)
 				goto retry;
+
 		} else {
 			/* Hold object reference until vm_unbind */
 			i915_gem_object_get(vma->obj);
 		}
 	}
 
+	if (va->fence.flags & I915_TIMELINE_FENCE_SIGNAL)
+		i915_vm_bind_put_fence(vma);
+
+put_vma:
+	if (ret && vma) {
+		i915_vma_set_freed(vma);
+		i915_vma_destroy(vma);
+	}
+
 unlock_vm:
 	mutex_unlock(&vm->vm_bind_lock);
 
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 0eb7727d62a6f..6ca37ce2b35a8 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -1542,8 +1542,12 @@ int i915_vma_pin_ww(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
 err_vma_res:
 	i915_vma_resource_free(vma_res);
 err_fence:
-	if (work)
+	if (work) {
+		if (i915_vma_is_persistent(vma))
+			i915_vm_bind_signal_fence(vma, &work->base.dma);
+
 		dma_fence_work_commit_imm(&work->base);
+	}
 err_rpm:
 	if (wakeref)
 		intel_runtime_pm_put(&vma->vm->i915->runtime_pm, wakeref);
diff --git a/drivers/gpu/drm/i915/i915_vma_types.h b/drivers/gpu/drm/i915/i915_vma_types.h
index 5483ccf0c82c7..8bf870a0f689b 100644
--- a/drivers/gpu/drm/i915/i915_vma_types.h
+++ b/drivers/gpu/drm/i915/i915_vma_types.h
@@ -318,6 +318,13 @@ struct i915_vma {
 	/* @vm_rebind_link: link to vm_rebind_list and protected by vm_rebind_lock */
 	struct list_head vm_rebind_link; /* Link in vm_rebind_list */
 
+	/** Timeline fence for vm_bind completion notification */
+	struct {
+		struct drm_syncobj *syncobj;
+		u64 value;
+		struct dma_fence_chain *chain_fence;
+	} vm_bind_fence;
+
 	/** Interval tree structures for persistent vma */
 
 	/** @rb: node for the interval tree of vm for persistent vmas */
-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Andi Shyti <andi.shyti@linux.intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Andi Shyti <andi.shyti@linux.intel.com>,
	Ramalingam C <ramalingampc2008@gmail.com>,
	Thomas Hellstrom <thomas.hellstrom@intel.com>,
	Matthew Auld <matthew.auld@intel.com>,
	Andi Shyti <andi@etezian.org>,
	Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Subject: [RFC PATCH v3 08/17] drm/i915/vm_bind: Add out fence support
Date: Sat, 27 Aug 2022 21:43:54 +0200	[thread overview]
Message-ID: <20220827194403.6495-9-andi.shyti@linux.intel.com> (raw)
In-Reply-To: <20220827194403.6495-1-andi.shyti@linux.intel.com>

From: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>

Add support for handling out fence of vm_bind call.

Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h   |  3 +
 .../drm/i915/gem/i915_gem_vm_bind_object.c    | 82 +++++++++++++++++++
 drivers/gpu/drm/i915/i915_vma.c               |  6 +-
 drivers/gpu/drm/i915/i915_vma_types.h         |  7 ++
 4 files changed, 97 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h b/drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h
index ebc493b7dafc1..d65e6e4fb3972 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h
@@ -18,4 +18,7 @@ int i915_gem_vm_unbind_ioctl(struct drm_device *dev, void *data,
 			     struct drm_file *file);
 
 void i915_gem_vm_unbind_vma_all(struct i915_address_space *vm);
+void i915_vm_bind_signal_fence(struct i915_vma *vma,
+			       struct dma_fence * const fence);
+
 #endif /* __I915_GEM_VM_BIND_H */
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_vm_bind_object.c b/drivers/gpu/drm/i915/gem/i915_gem_vm_bind_object.c
index 3b45529fe8d4c..e57b9c492a7f9 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_vm_bind_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_vm_bind_object.c
@@ -5,6 +5,8 @@
 
 #include <linux/interval_tree_generic.h>
 
+#include <drm/drm_syncobj.h>
+
 #include "gem/i915_gem_vm_bind.h"
 #include "gem/i915_gem_context.h"
 #include "gt/gen8_engine_cs.h"
@@ -109,6 +111,67 @@ void i915_gem_vm_bind_remove(struct i915_vma *vma, bool release_obj)
 	}
 }
 
+static int i915_vm_bind_add_fence(struct drm_file *file, struct i915_vma *vma,
+				  u32 handle, u64 point)
+{
+	struct drm_syncobj *syncobj;
+
+	syncobj = drm_syncobj_find(file, handle);
+	if (!syncobj) {
+		DRM_DEBUG("Invalid syncobj handle provided\n");
+		return -ENOENT;
+	}
+
+	/*
+	 * For timeline syncobjs we need to preallocate chains for
+	 * later signaling.
+	 */
+	if (point) {
+		vma->vm_bind_fence.chain_fence = dma_fence_chain_alloc();
+		if (!vma->vm_bind_fence.chain_fence) {
+			drm_syncobj_put(syncobj);
+			return -ENOMEM;
+		}
+	} else {
+		vma->vm_bind_fence.chain_fence = NULL;
+	}
+	vma->vm_bind_fence.syncobj = syncobj;
+	vma->vm_bind_fence.value = point;
+
+	return 0;
+}
+
+static void i915_vm_bind_put_fence(struct i915_vma *vma)
+{
+	if (!vma->vm_bind_fence.syncobj)
+		return;
+
+	drm_syncobj_put(vma->vm_bind_fence.syncobj);
+	dma_fence_chain_free(vma->vm_bind_fence.chain_fence);
+}
+
+void i915_vm_bind_signal_fence(struct i915_vma *vma,
+			       struct dma_fence * const fence)
+{
+	struct drm_syncobj *syncobj = vma->vm_bind_fence.syncobj;
+
+	if (!syncobj)
+		return;
+
+	if (vma->vm_bind_fence.chain_fence) {
+		drm_syncobj_add_point(syncobj,
+				      vma->vm_bind_fence.chain_fence,
+				      fence, vma->vm_bind_fence.value);
+		/*
+		 * The chain's ownership is transferred to the
+		 * timeline.
+		 */
+		vma->vm_bind_fence.chain_fence = NULL;
+	} else {
+		drm_syncobj_replace_fence(syncobj, fence);
+	}
+}
+
 static int i915_gem_vm_unbind_vma(struct i915_address_space *vm,
 				  struct i915_vma *vma,
 				  struct drm_i915_gem_vm_unbind *va)
@@ -243,6 +306,15 @@ static int i915_gem_vm_bind_obj(struct i915_address_space *vm,
 		goto unlock_vm;
 	}
 
+	if (va->fence.flags & I915_TIMELINE_FENCE_SIGNAL) {
+		ret = i915_vm_bind_add_fence(file, vma, va->fence.handle,
+					     va->fence.value);
+		if (ret)
+			goto put_vma;
+	}
+
+	pin_flags = va->start | PIN_OFFSET_FIXED | PIN_USER;
+
 	for_i915_gem_ww(&ww, ret, true) {
 retry:
 		ret = i915_gem_object_lock(vma->obj, &ww);
@@ -267,12 +339,22 @@ static int i915_gem_vm_bind_obj(struct i915_address_space *vm,
 			ret = i915_gem_ww_ctx_backoff(&ww);
 			if (!ret)
 				goto retry;
+
 		} else {
 			/* Hold object reference until vm_unbind */
 			i915_gem_object_get(vma->obj);
 		}
 	}
 
+	if (va->fence.flags & I915_TIMELINE_FENCE_SIGNAL)
+		i915_vm_bind_put_fence(vma);
+
+put_vma:
+	if (ret && vma) {
+		i915_vma_set_freed(vma);
+		i915_vma_destroy(vma);
+	}
+
 unlock_vm:
 	mutex_unlock(&vm->vm_bind_lock);
 
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 0eb7727d62a6f..6ca37ce2b35a8 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -1542,8 +1542,12 @@ int i915_vma_pin_ww(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
 err_vma_res:
 	i915_vma_resource_free(vma_res);
 err_fence:
-	if (work)
+	if (work) {
+		if (i915_vma_is_persistent(vma))
+			i915_vm_bind_signal_fence(vma, &work->base.dma);
+
 		dma_fence_work_commit_imm(&work->base);
+	}
 err_rpm:
 	if (wakeref)
 		intel_runtime_pm_put(&vma->vm->i915->runtime_pm, wakeref);
diff --git a/drivers/gpu/drm/i915/i915_vma_types.h b/drivers/gpu/drm/i915/i915_vma_types.h
index 5483ccf0c82c7..8bf870a0f689b 100644
--- a/drivers/gpu/drm/i915/i915_vma_types.h
+++ b/drivers/gpu/drm/i915/i915_vma_types.h
@@ -318,6 +318,13 @@ struct i915_vma {
 	/* @vm_rebind_link: link to vm_rebind_list and protected by vm_rebind_lock */
 	struct list_head vm_rebind_link; /* Link in vm_rebind_list */
 
+	/** Timeline fence for vm_bind completion notification */
+	struct {
+		struct drm_syncobj *syncobj;
+		u64 value;
+		struct dma_fence_chain *chain_fence;
+	} vm_bind_fence;
+
 	/** Interval tree structures for persistent vma */
 
 	/** @rb: node for the interval tree of vm for persistent vmas */
-- 
2.34.1


  parent reply	other threads:[~2022-08-27 19:46 UTC|newest]

Thread overview: 82+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-27 19:43 [Intel-gfx] [RFC PATCH v3 00/17] drm/i915/vm_bind: Add VM_BIND functionality Andi Shyti
2022-08-27 19:43 ` Andi Shyti
2022-08-27 19:43 ` [Intel-gfx] [RFC PATCH v3 01/17] drm/i915: Expose vm_lookup in i915_gem_context.h Andi Shyti
2022-08-27 19:43   ` Andi Shyti
2022-08-27 19:43 ` [Intel-gfx] [RFC PATCH v3 02/17] drm/i915: Mark vm for vm_bind usage at creation Andi Shyti
2022-08-27 19:43   ` Andi Shyti
2022-08-27 19:43 ` [Intel-gfx] [RFC PATCH v3 03/17] drm/i915/gem: expose i915_gem_object_max_page_size() in i915_gem_object.h Andi Shyti
2022-08-27 19:43   ` Andi Shyti
2022-08-27 19:43 ` [Intel-gfx] [RFC PATCH v3 04/17] drm/i915: Implement bind and unbind of object Andi Shyti
2022-08-27 19:43   ` Andi Shyti
2022-08-30 17:37   ` [Intel-gfx] " Matthew Auld
2022-08-30 17:37     ` Matthew Auld
2022-08-31  6:10     ` [Intel-gfx] " Niranjana Vishwanathapura
2022-08-31  6:10       ` Niranjana Vishwanathapura
2022-08-30 18:19   ` [Intel-gfx] " Matthew Auld
2022-08-30 18:19     ` Matthew Auld
2022-08-31  7:28     ` [Intel-gfx] " Tvrtko Ursulin
2022-09-01  5:18     ` Niranjana Vishwanathapura
2022-09-01  5:18       ` Niranjana Vishwanathapura
2022-09-01  5:31   ` [Intel-gfx] " Dave Airlie
2022-09-01  5:31     ` Dave Airlie
2022-09-01 20:05     ` [Intel-gfx] " Niranjana Vishwanathapura
2022-09-01 20:05       ` Niranjana Vishwanathapura
2022-09-12 13:11   ` [Intel-gfx] " Jani Nikula
2022-09-12 13:11     ` Jani Nikula
2022-09-21  7:19     ` [Intel-gfx] " Niranjana Vishwanathapura
2022-09-21  7:19       ` Niranjana Vishwanathapura
2022-08-27 19:43 ` [Intel-gfx] [RFC PATCH v3 05/17] drm/i915: Support for VM private BOs Andi Shyti
2022-08-27 19:43   ` Andi Shyti
2022-08-31  6:13   ` [Intel-gfx] " Niranjana Vishwanathapura
2022-08-31  6:13     ` Niranjana Vishwanathapura
2022-08-27 19:43 ` [Intel-gfx] [RFC PATCH v3 06/17] drm/i915/dmabuf: Deny the dmabuf export " Andi Shyti
2022-08-27 19:43   ` Andi Shyti
2022-08-27 19:43 ` [Intel-gfx] [RFC PATCH v3 07/17] drm/i915/vm_bind: Handle persistent vmas Andi Shyti
2022-08-27 19:43   ` Andi Shyti
2022-08-31  6:16   ` [Intel-gfx] " Niranjana Vishwanathapura
2022-08-31  6:16     ` Niranjana Vishwanathapura
2022-09-12 13:16   ` [Intel-gfx] " Jani Nikula
2022-09-21  7:21     ` Niranjana Vishwanathapura
2022-09-21  7:21       ` Niranjana Vishwanathapura
2022-08-27 19:43 ` Andi Shyti [this message]
2022-08-27 19:43   ` [RFC PATCH v3 08/17] drm/i915/vm_bind: Add out fence support Andi Shyti
2022-08-31  6:22   ` [Intel-gfx] " Niranjana Vishwanathapura
2022-08-31  6:22     ` Niranjana Vishwanathapura
2022-08-27 19:43 ` [Intel-gfx] [RFC PATCH v3 09/17] drm/i915: Do not support vm_bind mode in execbuf2 Andi Shyti
2022-08-27 19:43   ` Andi Shyti
2022-08-31  5:45   ` [Intel-gfx] " Niranjana Vishwanathapura
2022-08-31  5:45     ` Niranjana Vishwanathapura
2022-08-27 19:43 ` [Intel-gfx] [RFC PATCH v3 10/17] drm/i915/vm_bind: Implement I915_GEM_EXECBUFFER3 ioctl Andi Shyti
2022-08-27 19:43   ` Andi Shyti
2022-08-31  7:38   ` [Intel-gfx] " Tvrtko Ursulin
2022-09-01  5:09     ` Niranjana Vishwanathapura
2022-09-01  5:09       ` Niranjana Vishwanathapura
2022-09-01  7:58       ` Tvrtko Ursulin
2022-09-01  7:58         ` Tvrtko Ursulin
2022-09-02  5:41         ` Niranjana Vishwanathapura
2022-09-02  5:41           ` Niranjana Vishwanathapura
2022-09-05 15:08           ` Tvrtko Ursulin
2022-09-05 15:08             ` Tvrtko Ursulin
2022-09-21  7:18             ` Niranjana Vishwanathapura
2022-09-21  7:18               ` Niranjana Vishwanathapura
2022-08-27 19:43 ` [Intel-gfx] [RFC PATCH v3 11/17] drm/i915: Add i915_vma_is_bind_complete() Andi Shyti
2022-08-27 19:43   ` Andi Shyti
2022-08-27 19:43 ` [Intel-gfx] [RFC PATCH v3 12/17] drm/i915/vm_bind: Handle persistent vmas in execbuf3 Andi Shyti
2022-08-27 19:43   ` Andi Shyti
2022-08-27 19:43 ` [Intel-gfx] [RFC PATCH v3 13/17] drm/i915/vm_bind: userptr dma-resv changes Andi Shyti
2022-08-27 19:43   ` Andi Shyti
2022-08-31  6:45   ` [Intel-gfx] " Niranjana Vishwanathapura
2022-08-31  6:45     ` Niranjana Vishwanathapura
2022-08-27 19:44 ` [Intel-gfx] [RFC PATCH v3 14/17] drm/i915/vm_bind: Skip vma_lookup for persistent vmas Andi Shyti
2022-08-27 19:44   ` Andi Shyti
2022-08-27 19:44 ` [Intel-gfx] [RFC PATCH v3 15/17] drm/i915: Extend getparm for VM_BIND capability Andi Shyti
2022-08-27 19:44   ` Andi Shyti
2022-08-27 19:44 ` [Intel-gfx] [RFC PATCH v3 16/17] drm/i915/ioctl: Enable the vm_bind/unbind ioctls Andi Shyti
2022-08-27 19:44   ` Andi Shyti
2022-08-27 19:44 ` [Intel-gfx] [RFC PATCH v3 17/17] drm/i915: Enable execbuf3 ioctl for vm_bind Andi Shyti
2022-08-27 19:44   ` Andi Shyti
2022-08-27 20:23 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/vm_bind: Add VM_BIND functionality (rev2) Patchwork
2022-08-27 20:24 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-08-27 20:24 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2022-08-27 20:39 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-08-31  7:33 ` [Intel-gfx] [RFC PATCH v3 00/17] drm/i915/vm_bind: Add VM_BIND functionality Tvrtko Ursulin

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