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From: Stephen Boyd <sboyd@kernel.org>
To: "Michael Turquette" <mturquette@baylibre.com>,
	"Nícolas F. R. A. Prado" <nfraprado@collabora.com>
Cc: "Bo-Chen Chen" <rex-bc.chen@mediatek.com>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	"Nícolas F . R . A . Prado" <nfraprado@collabora.com>,
	"Chen-Yu Tsai" <wenst@chromium.org>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	"Miles Chen" <miles.chen@mediatek.com>,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org
Subject: Re: [RESEND PATCH v3 1/2] clk: mediatek: clk-mt8195-vdo0: Set rate on vdo0_dp_intf0_dp_intf's parent
Date: Wed, 31 Aug 2022 10:51:46 -0700	[thread overview]
Message-ID: <20220831175148.518A5C433D6@smtp.kernel.org> (raw)
In-Reply-To: <20220816193257.658487-2-nfraprado@collabora.com>

Quoting Nícolas F. R. A. Prado (2022-08-16 12:32:55)
> From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> 
> Add the CLK_SET_RATE_PARENT flag to the CLK_VDO0_DP_INTF0_DP_INTF
> clock: this is required to trigger clock source selection on
> CLK_TOP_EDP, while avoiding to manage the enablement of the former
> separately from the latter in the displayport driver.
> 
> Fixes: 70282c90d4a2 ("clk: mediatek: Add MT8195 vdosys0 clock support")
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
> Reviewed-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
> 
> ---

Applied to clk-next


WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd@kernel.org>
To: "Michael Turquette" <mturquette@baylibre.com>,
	"Nícolas F. R. A. Prado" <nfraprado@collabora.com>
Cc: "Bo-Chen Chen" <rex-bc.chen@mediatek.com>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	"Nícolas F . R . A . Prado" <nfraprado@collabora.com>,
	"Chen-Yu Tsai" <wenst@chromium.org>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	"Miles Chen" <miles.chen@mediatek.com>,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org
Subject: Re: [RESEND PATCH v3 1/2] clk: mediatek: clk-mt8195-vdo0: Set rate on vdo0_dp_intf0_dp_intf's parent
Date: Wed, 31 Aug 2022 10:51:46 -0700	[thread overview]
Message-ID: <20220831175148.518A5C433D6@smtp.kernel.org> (raw)
In-Reply-To: <20220816193257.658487-2-nfraprado@collabora.com>

Quoting Nícolas F. R. A. Prado (2022-08-16 12:32:55)
> From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> 
> Add the CLK_SET_RATE_PARENT flag to the CLK_VDO0_DP_INTF0_DP_INTF
> clock: this is required to trigger clock source selection on
> CLK_TOP_EDP, while avoiding to manage the enablement of the former
> separately from the latter in the displayport driver.
> 
> Fixes: 70282c90d4a2 ("clk: mediatek: Add MT8195 vdosys0 clock support")
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
> Reviewed-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
> 
> ---

Applied to clk-next

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  reply	other threads:[~2022-08-31 17:52 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-16 19:32 [RESEND PATCH v3 0/2] MediaTek Kompanio 1200 MT8195 - DisplayPort clocks fixes Nícolas F. R. A. Prado
2022-08-16 19:32 ` Nícolas F. R. A. Prado
2022-08-16 19:32 ` [RESEND PATCH v3 1/2] clk: mediatek: clk-mt8195-vdo0: Set rate on vdo0_dp_intf0_dp_intf's parent Nícolas F. R. A. Prado
2022-08-16 19:32   ` Nícolas F. R. A. Prado
2022-08-31 17:51   ` Stephen Boyd [this message]
2022-08-31 17:51     ` Stephen Boyd
2022-08-16 19:32 ` [RESEND PATCH v3 2/2] clk: mediatek: clk-mt8195-vdo1: Reparent and set rate on vdo1_dpintf's parent Nícolas F. R. A. Prado
2022-08-16 19:32   ` Nícolas F. R. A. Prado
2022-08-31 17:51   ` Stephen Boyd
2022-08-31 17:51     ` Stephen Boyd

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