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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Linus Walleij <linus.walleij@linaro.org>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Patrick Rudolph <patrick.rudolph@9elements.com>,
	linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v1 15/17] pinctrl: cy8c95x0: Override IRQ for one of the expanders on Galileo Gen 1
Date: Fri,  2 Sep 2022 21:26:48 +0300	[thread overview]
Message-ID: <20220902182650.83098-15-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com>

ACPI table on Intel Galileo Gen 1 has wrong pin number for IRQ resource
of the I²C GPIO expander. Since we know what that number is and luckily
have GPIO bases fixed for SoC's controllers, we may use a simple DMI quirk
to match the platform and retrieve GpioInt() pin on it for the expander in
question.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/pinctrl/pinctrl-cy8c95x0.c | 48 ++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c
index 5d8a7d236e62..f38e7dc794e9 100644
--- a/drivers/pinctrl/pinctrl-cy8c95x0.c
+++ b/drivers/pinctrl/pinctrl-cy8c95x0.c
@@ -7,7 +7,9 @@
  * Author: Naresh Solanki <Naresh.Solanki@9elements.com>
  */
 
+#include <linux/acpi.h>
 #include <linux/bitmap.h>
+#include <linux/dmi.h>
 #include <linux/gpio/driver.h>
 #include <linux/gpio/consumer.h>
 #include <linux/i2c.h>
@@ -73,6 +75,46 @@ static const struct of_device_id cy8c95x0_dt_ids[] = {
 
 MODULE_DEVICE_TABLE(of, cy8c95x0_dt_ids);
 
+static const struct acpi_gpio_params cy8c95x0_irq_gpios = { 0, 0, true };
+
+static const struct acpi_gpio_mapping cy8c95x0_acpi_irq_gpios[] = {
+	{ "irq-gpios", &cy8c95x0_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER },
+	{ }
+};
+
+static int cy8c95x0_acpi_get_irq(struct device *dev)
+{
+	int ret;
+
+	ret = devm_acpi_dev_add_driver_gpios(dev, cy8c95x0_acpi_irq_gpios);
+	if (ret)
+		dev_warn(dev, "can't add GPIO ACPI mapping\n");
+
+	ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq-gpios", 0);
+	if (ret < 0)
+		return ret;
+
+	dev_info(dev, "ACPI interrupt quirk (IRQ %d)\n", ret);
+	return ret;
+}
+
+static const struct dmi_system_id cy8c95x0_dmi_acpi_irq_info[] = {
+	{
+		/*
+		 * On Intel Galileo Gen 1 board the IRQ pin is provided
+		 * as an absolute number instead of being relative.
+		 * Since first controller (gpio-sch.c) and second
+		 * (gpio-dwapb.c) are at the fixed bases, we may safely
+		 * refer to the number in the global space to get an IRQ
+		 * out of it.
+		 */
+		.matches = {
+			DMI_EXACT_MATCH(DMI_BOARD_NAME, "Galileo"),
+		},
+	},
+	{}
+};
+
 #define MAX_BANK 8
 #define BANK_SZ 8
 #define MAX_LINE	(MAX_BANK * BANK_SZ)
@@ -1298,6 +1340,12 @@ static int cy8c95x0_probe(struct i2c_client *client)
 	bitmap_set(chip->shiftmask, 0, 20);
 	mutex_init(&chip->i2c_lock);
 
+	if (dmi_first_match(cy8c95x0_dmi_acpi_irq_info)) {
+		ret = cy8c95x0_acpi_get_irq(&client->dev);
+		if (ret > 0)
+			client->irq = ret;
+	}
+
 	if (client->irq) {
 		ret = cy8c95x0_irq_setup(chip, client->irq);
 		if (ret)
-- 
2.35.1


  parent reply	other threads:[~2022-09-02 18:34 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-02 18:26 [PATCH v1 01/17] pinctrl: cy8c95x0: make irq_chip immutable Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 02/17] pinctrl: cy8c95x0: Allow IRQ chip core to handle numbering Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 03/17] pinctrl: cy8c95x0: Allow most of the registers to be cached Andy Shevchenko
2022-09-02 18:42   ` Andy Shevchenko
2022-09-05 12:57     ` Andy Shevchenko
2022-09-05 13:30       ` Linus Walleij
2022-09-05 13:37         ` Andy Shevchenko
2022-09-06  8:36           ` Patrick Rudolph
2022-09-06 10:25             ` Andy Shevchenko
2022-09-08  8:03         ` Linus Walleij
2022-09-08  9:32           ` Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 04/17] pinctrl: cy8c95x0: Fix return value in cy8c95x0_detect() Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 05/17] pinctrl: cy8c95x0: Fix pin control name to enable more than one Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 06/17] pinctrl: cy8c95x0: Drop unneeded npins assignment Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 07/17] pinctrl: cy8c95x0: Enable GPIO range Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 08/17] pinctrl: cy8c95x0: Remove device initialization Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 09/17] pinctrl: cy8c95x0: Remove useless conditionals Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 10/17] pinctrl: cy8c95x0: Remove custom ->set_config() Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 11/17] pinctrl: cy8c95x0: Use 'default' in all switch-cases Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 12/17] pinctrl: cy8c95x0: Implement ->pin_dbg_show() Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 13/17] pinctrl: cy8c95x0: Make use of device properties Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 14/17] pinctrl: cy8c95x0: support ACPI device found on Galileo Gen1 Andy Shevchenko
2022-09-02 18:26 ` Andy Shevchenko [this message]
2022-09-02 18:26 ` [PATCH v1 16/17] pinctrl: cy8c95x0: use bits.h macros for all masks Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 17/17] pinctrl: cy8c95x0: Correct comment style Andy Shevchenko
2022-09-07  8:27   ` Patrick Rudolph

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