From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Linus Walleij <linus.walleij@linaro.org>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Patrick Rudolph <patrick.rudolph@9elements.com>,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v1 06/17] pinctrl: cy8c95x0: Drop unneeded npins assignment
Date: Fri, 2 Sep 2022 21:26:39 +0300 [thread overview]
Message-ID: <20220902182650.83098-6-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com>
The npins field is assigned twice. Remove the first occurrence.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/pinctrl/pinctrl-cy8c95x0.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c
index a05fbf818bf2..eac8b073e19f 100644
--- a/drivers/pinctrl/pinctrl-cy8c95x0.c
+++ b/drivers/pinctrl/pinctrl-cy8c95x0.c
@@ -1187,7 +1187,6 @@ static int cy8c95x0_setup_pinctrl(struct cy8c95x0_pinctrl *chip)
pd->pctlops = &cy8c95x0_pinctrl_ops;
pd->confops = &cy8c95x0_pinconf_ops;
pd->pmxops = &cy8c95x0_pmxops;
- pd->npins = chip->gpio_chip.ngpio;
pd->name = dev_name(chip->dev);
pd->pins = cy8c9560_pins;
pd->npins = chip->tpin;
--
2.35.1
next prev parent reply other threads:[~2022-09-02 18:36 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-02 18:26 [PATCH v1 01/17] pinctrl: cy8c95x0: make irq_chip immutable Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 02/17] pinctrl: cy8c95x0: Allow IRQ chip core to handle numbering Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 03/17] pinctrl: cy8c95x0: Allow most of the registers to be cached Andy Shevchenko
2022-09-02 18:42 ` Andy Shevchenko
2022-09-05 12:57 ` Andy Shevchenko
2022-09-05 13:30 ` Linus Walleij
2022-09-05 13:37 ` Andy Shevchenko
2022-09-06 8:36 ` Patrick Rudolph
2022-09-06 10:25 ` Andy Shevchenko
2022-09-08 8:03 ` Linus Walleij
2022-09-08 9:32 ` Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 04/17] pinctrl: cy8c95x0: Fix return value in cy8c95x0_detect() Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 05/17] pinctrl: cy8c95x0: Fix pin control name to enable more than one Andy Shevchenko
2022-09-02 18:26 ` Andy Shevchenko [this message]
2022-09-02 18:26 ` [PATCH v1 07/17] pinctrl: cy8c95x0: Enable GPIO range Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 08/17] pinctrl: cy8c95x0: Remove device initialization Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 09/17] pinctrl: cy8c95x0: Remove useless conditionals Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 10/17] pinctrl: cy8c95x0: Remove custom ->set_config() Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 11/17] pinctrl: cy8c95x0: Use 'default' in all switch-cases Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 12/17] pinctrl: cy8c95x0: Implement ->pin_dbg_show() Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 13/17] pinctrl: cy8c95x0: Make use of device properties Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 14/17] pinctrl: cy8c95x0: support ACPI device found on Galileo Gen1 Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 15/17] pinctrl: cy8c95x0: Override IRQ for one of the expanders on Galileo Gen 1 Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 16/17] pinctrl: cy8c95x0: use bits.h macros for all masks Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 17/17] pinctrl: cy8c95x0: Correct comment style Andy Shevchenko
2022-09-07 8:27 ` Patrick Rudolph
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