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From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH 1/3] RISC-V: Output cbom-block-size
Date: Tue,  6 Sep 2022 10:35:53 +0200	[thread overview]
Message-ID: <20220906083555.931806-2-ajones@ventanamicro.com> (raw)
In-Reply-To: <20220906083555.931806-1-ajones@ventanamicro.com>

Provide an info message with the block size when the Zicbom extension is
present and the block size has been determined.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
 arch/riscv/mm/cacheflush.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
index e5b087be1577..8595baf8e403 100644
--- a/arch/riscv/mm/cacheflush.c
+++ b/arch/riscv/mm/cacheflush.c
@@ -122,7 +122,9 @@ void riscv_init_cbom_blocksize(void)
 		}
 	}
 
-	if (probed_block_size)
+	if (probed_block_size) {
 		riscv_cbom_block_size = probed_block_size;
+		pr_info("riscv: Zicbom: Cache blocksize is %u bytes", probed_block_size);
+	}
 }
 #endif
-- 
2.37.2



WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org
Cc: "Palmer Dabbelt" <palmer@dabbelt.com>,
	"Conor Dooley" <conor.dooley@microchip.com>,
	"Heiko Stübner" <heiko@sntech.de>,
	"Anup Patel" <anup@brainfault.org>,
	"Atish Patra" <atishp@atishpatra.org>
Subject: [PATCH 1/3] RISC-V: Output cbom-block-size
Date: Tue,  6 Sep 2022 10:35:53 +0200	[thread overview]
Message-ID: <20220906083555.931806-2-ajones@ventanamicro.com> (raw)
In-Reply-To: <20220906083555.931806-1-ajones@ventanamicro.com>

Provide an info message with the block size when the Zicbom extension is
present and the block size has been determined.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
 arch/riscv/mm/cacheflush.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
index e5b087be1577..8595baf8e403 100644
--- a/arch/riscv/mm/cacheflush.c
+++ b/arch/riscv/mm/cacheflush.c
@@ -122,7 +122,9 @@ void riscv_init_cbom_blocksize(void)
 		}
 	}
 
-	if (probed_block_size)
+	if (probed_block_size) {
 		riscv_cbom_block_size = probed_block_size;
+		pr_info("riscv: Zicbom: Cache blocksize is %u bytes", probed_block_size);
+	}
 }
 #endif
-- 
2.37.2


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  reply	other threads:[~2022-09-06  8:35 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-06  8:35 [PATCH 0/3] riscv: KVM: Expose Zicbom to the guest Andrew Jones
2022-09-06  8:35 ` Andrew Jones
2022-09-06  8:35 ` Andrew Jones [this message]
2022-09-06  8:35   ` [PATCH 1/3] RISC-V: Output cbom-block-size Andrew Jones
2022-09-06  8:40   ` Conor.Dooley
2022-09-06  8:40     ` Conor.Dooley
2022-09-06  8:55     ` Andrew Jones
2022-09-06  8:55       ` Andrew Jones
2022-09-06  9:00       ` Conor.Dooley
2022-09-06  9:00         ` Conor.Dooley
2022-09-06  9:29         ` Andrew Jones
2022-09-06  9:29           ` Andrew Jones
2022-09-06  9:42           ` Conor.Dooley
2022-09-06  9:42             ` Conor.Dooley
2022-09-06 14:34             ` Heiko Stübner
2022-09-06 14:34               ` Heiko Stübner
2022-09-06 14:51               ` Andrew Jones
2022-09-06 14:51                 ` Andrew Jones
2022-09-06  9:01       ` Andrew Jones
2022-09-06  9:01         ` Andrew Jones
2022-09-06  8:35 ` [PATCH 2/3] RISC-V: KVM: Provide UAPI for Zicbom block size Andrew Jones
2022-09-06  8:35   ` Andrew Jones
2022-09-06  8:35 ` [PATCH 3/3] RISC-V: KVM: Expose Zicbom to the guest Andrew Jones
2022-09-06  8:35   ` Andrew Jones

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