From: Rob Herring <robh@kernel.org>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: l.stach@pengutronix.de, richard.leitner@linux.dev,
vkoul@kernel.org, shawnguo@kernel.org, bhelgaas@google.com,
alexander.stein@ew.tq-group.com, linux-phy@lists.infradead.org,
kernel@pengutronix.de, devicetree@vger.kernel.org,
linux-imx@nxp.com, p.zabel@pengutronix.de,
lorenzo.pieralisi@arm.com, marex@denx.de,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v7 1/7] dt-binding: phy: Add iMX8MP PCIe PHY binding
Date: Thu, 8 Sep 2022 14:42:58 -0500 [thread overview]
Message-ID: <20220908194258.GA3217149-robh@kernel.org> (raw)
In-Reply-To: <1662109086-15881-2-git-send-email-hongxing.zhu@nxp.com>
On Fri, 02 Sep 2022 16:58:00 +0800, Richard Zhu wrote:
> Add i.MX8MP PCIe PHY binding.
> On iMX8MM, the initialized default value of PERST bit(BIT3) of
> SRC_PCIEPHY_RCR is 1b'1.
> But i.MX8MP has one inversed default value 1b'0 of PERST bit.
>
> And the PERST bit should be kept 1b'1 after power and clocks are stable.
> So add one more PERST explicitly for i.MX8MP PCIe PHY.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> Tested-by: Marek Vasut <marex@denx.de>
> Tested-by: Richard Leitner <richard.leitner@skidata.com>
> Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> .../bindings/phy/fsl,imx8-pcie-phy.yaml | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: l.stach@pengutronix.de, richard.leitner@linux.dev,
vkoul@kernel.org, shawnguo@kernel.org, bhelgaas@google.com,
alexander.stein@ew.tq-group.com, linux-phy@lists.infradead.org,
kernel@pengutronix.de, devicetree@vger.kernel.org,
linux-imx@nxp.com, p.zabel@pengutronix.de,
lorenzo.pieralisi@arm.com, marex@denx.de,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v7 1/7] dt-binding: phy: Add iMX8MP PCIe PHY binding
Date: Thu, 8 Sep 2022 14:42:58 -0500 [thread overview]
Message-ID: <20220908194258.GA3217149-robh@kernel.org> (raw)
In-Reply-To: <1662109086-15881-2-git-send-email-hongxing.zhu@nxp.com>
On Fri, 02 Sep 2022 16:58:00 +0800, Richard Zhu wrote:
> Add i.MX8MP PCIe PHY binding.
> On iMX8MM, the initialized default value of PERST bit(BIT3) of
> SRC_PCIEPHY_RCR is 1b'1.
> But i.MX8MP has one inversed default value 1b'0 of PERST bit.
>
> And the PERST bit should be kept 1b'1 after power and clocks are stable.
> So add one more PERST explicitly for i.MX8MP PCIe PHY.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> Tested-by: Marek Vasut <marex@denx.de>
> Tested-by: Richard Leitner <richard.leitner@skidata.com>
> Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> .../bindings/phy/fsl,imx8-pcie-phy.yaml | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: l.stach@pengutronix.de, richard.leitner@linux.dev,
vkoul@kernel.org, shawnguo@kernel.org, bhelgaas@google.com,
alexander.stein@ew.tq-group.com, linux-phy@lists.infradead.org,
kernel@pengutronix.de, devicetree@vger.kernel.org,
linux-imx@nxp.com, p.zabel@pengutronix.de,
lorenzo.pieralisi@arm.com, marex@denx.de,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v7 1/7] dt-binding: phy: Add iMX8MP PCIe PHY binding
Date: Thu, 8 Sep 2022 14:42:58 -0500 [thread overview]
Message-ID: <20220908194258.GA3217149-robh@kernel.org> (raw)
In-Reply-To: <1662109086-15881-2-git-send-email-hongxing.zhu@nxp.com>
On Fri, 02 Sep 2022 16:58:00 +0800, Richard Zhu wrote:
> Add i.MX8MP PCIe PHY binding.
> On iMX8MM, the initialized default value of PERST bit(BIT3) of
> SRC_PCIEPHY_RCR is 1b'1.
> But i.MX8MP has one inversed default value 1b'0 of PERST bit.
>
> And the PERST bit should be kept 1b'1 after power and clocks are stable.
> So add one more PERST explicitly for i.MX8MP PCIe PHY.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> Tested-by: Marek Vasut <marex@denx.de>
> Tested-by: Richard Leitner <richard.leitner@skidata.com>
> Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> .../bindings/phy/fsl,imx8-pcie-phy.yaml | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-09-08 19:43 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-02 8:57 [PATCH v7 0/7] Add the iMX8MP PCIe support Richard Zhu
2022-09-02 8:57 ` Richard Zhu
2022-09-02 8:57 ` Richard Zhu
2022-09-02 8:58 ` [PATCH v7 1/7] dt-binding: phy: Add iMX8MP PCIe PHY binding Richard Zhu
2022-09-02 8:58 ` Richard Zhu
2022-09-02 8:58 ` Richard Zhu
2022-09-08 19:42 ` Rob Herring [this message]
2022-09-08 19:42 ` Rob Herring
2022-09-08 19:42 ` Rob Herring
2022-09-02 8:58 ` [PATCH v7 2/7] arm64: dts: imx8mp: Add iMX8MP PCIe support Richard Zhu
2022-09-02 8:58 ` Richard Zhu
2022-09-02 8:58 ` Richard Zhu
2022-09-05 2:32 ` Shawn Guo
2022-09-05 2:32 ` Shawn Guo
2022-09-05 2:32 ` Shawn Guo
2022-09-02 8:58 ` [PATCH v7 3/7] arm64: dts: imx8mp-evk: Add " Richard Zhu
2022-09-02 8:58 ` Richard Zhu
2022-09-02 8:58 ` Richard Zhu
2022-09-05 2:33 ` Shawn Guo
2022-09-05 2:33 ` Shawn Guo
2022-09-05 2:33 ` Shawn Guo
2022-09-19 15:22 ` Marcel Ziswiler
2022-09-19 15:22 ` Marcel Ziswiler
2022-09-19 15:22 ` Marcel Ziswiler
2022-09-19 21:34 ` Tim Harvey
2022-09-19 21:34 ` Tim Harvey
2022-09-19 21:34 ` Tim Harvey
2022-09-20 0:55 ` Hongxing Zhu
2022-09-20 0:55 ` Hongxing Zhu
2022-09-20 0:55 ` Hongxing Zhu
2022-09-02 8:58 ` [PATCH v7 4/7] reset: imx7: Fix the iMX8MP PCIe PHY PERST support Richard Zhu
2022-09-02 8:58 ` Richard Zhu
2022-09-02 8:58 ` Richard Zhu
2022-09-02 8:58 ` [PATCH v7 5/7] soc: imx: imx8mp-blk-ctrl: handle PCIe PHY resets Richard Zhu
2022-09-02 8:58 ` Richard Zhu
2022-09-02 8:58 ` Richard Zhu
2022-09-05 2:29 ` Shawn Guo
2022-09-05 2:29 ` Shawn Guo
2022-09-05 2:29 ` Shawn Guo
2022-09-02 8:58 ` [PATCH v7 6/7] phy: freescale: imx8m-pcie: Add i.MX8MP PCIe PHY support Richard Zhu
2022-09-02 8:58 ` Richard Zhu
2022-09-02 8:58 ` Richard Zhu
2022-09-02 16:54 ` Lucas Stach
2022-09-02 16:54 ` Lucas Stach
2022-09-02 16:54 ` Lucas Stach
2022-09-02 8:58 ` [PATCH v7 7/7] PCI: imx6: Add i.MX8MP PCIe support Richard Zhu
2022-09-02 8:58 ` Richard Zhu
2022-09-02 8:58 ` Richard Zhu
2022-09-02 16:54 ` Lucas Stach
2022-09-02 16:54 ` Lucas Stach
2022-09-02 16:54 ` Lucas Stach
2022-09-16 8:21 ` (subset) [PATCH v7 0/7] Add the iMX8MP " Lorenzo Pieralisi
2022-09-16 8:21 ` Lorenzo Pieralisi
2022-09-16 8:21 ` Lorenzo Pieralisi
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