All of lore.kernel.org
 help / color / mirror / Atom feed
From: Conor Dooley <conor@kernel.org>
To: linux-riscv@lists.infradead.org
Cc: palmer@dabbelt.com, damien.lemoal@opensource.wdc.com,
	geert@linux-mk68.org, heiko@sntech.de, kernel@esmil.dk,
	arnd@arndb.de, Conor Dooley <conor.dooley@microchip.com>
Subject: [RFC 11/27] riscv: replace SOC_SIFIVE with ARCH_SIFIVE
Date: Fri, 23 Sep 2022 19:55:50 +0100	[thread overview]
Message-ID: <20220923185605.1900083-12-conor@kernel.org> (raw)
In-Reply-To: <20220923185605.1900083-1-conor@kernel.org>

From: Conor Dooley <conor.dooley@microchip.com>

Per discussion at LPC, the SoC/platform Kconfig symbols in RISC-V land
are to be converted to ARCH_FOO from SOC_FOO so that the symbols are
consistent between the "incumbents" & those coming from ARM64 etc.

Predictably, SOC_SIFIVE becomes ARCH_SIFIVE.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/Kconfig.socs             | 2 +-
 arch/riscv/boot/dts/sifive/Makefile | 2 +-
 arch/riscv/configs/defconfig        | 2 +-
 arch/riscv/configs/rv32_defconfig   | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 910697baf097..3604b90251b4 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -6,7 +6,7 @@ config ARCH_MICROCHIP
 	help
 	  This enables support for Microchip SoC FPGAs.
 
-config SOC_SIFIVE
+config ARCH_SIFIVE
 	bool "SiFive SoCs"
 	select SERIAL_SIFIVE if TTY
 	select SERIAL_SIFIVE_CONSOLE if TTY
diff --git a/arch/riscv/boot/dts/sifive/Makefile b/arch/riscv/boot/dts/sifive/Makefile
index d90e4eb0ade8..b1c2d563a0e6 100644
--- a/arch/riscv/boot/dts/sifive/Makefile
+++ b/arch/riscv/boot/dts/sifive/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_SOC_SIFIVE) += hifive-unleashed-a00.dtb \
+dtb-$(CONFIG_ARCH_SIFIVE) += hifive-unleashed-a00.dtb \
 			    hifive-unmatched-a00.dtb
 obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 971986be875f..bfb6f6f57ae2 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -26,7 +26,7 @@ CONFIG_EXPERT=y
 # CONFIG_SYSFS_SYSCALL is not set
 CONFIG_PROFILING=y
 CONFIG_ARCH_MICROCHIP_POLARFIRE=y
-CONFIG_SOC_SIFIVE=y
+CONFIG_ARCH_SIFIVE=y
 CONFIG_ARCH_STARFIVE=y
 CONFIG_SOC_VIRT=y
 CONFIG_SMP=y
diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
index 38760e4296cf..4badab395546 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -16,7 +16,7 @@ CONFIG_BLK_DEV_INITRD=y
 CONFIG_EXPERT=y
 # CONFIG_SYSFS_SYSCALL is not set
 CONFIG_PROFILING=y
-CONFIG_SOC_SIFIVE=y
+CONFIG_ARCH_SIFIVE=y
 CONFIG_SOC_VIRT=y
 CONFIG_NONPORTABLE=y
 CONFIG_ARCH_RV32I=y
-- 
2.37.3


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  parent reply	other threads:[~2022-09-23 18:57 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
2022-09-23 18:55 ` [RFC 01/27] clk: microchip: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP Conor Dooley
2022-09-28 12:16   ` Christoph Hellwig
2022-09-28 12:51     ` Conor Dooley
2022-09-23 18:55 ` [RFC 02/27] i2c: microchip-corei2c: " Conor Dooley
2022-09-23 18:55 ` [RFC 03/27] mailbox: mpfs: " Conor Dooley
2022-09-23 18:55 ` [RFC 04/27] usb: musb: " Conor Dooley
2022-09-23 18:55 ` [RFC 05/27] rtc: " Conor Dooley
2022-09-23 18:55 ` [RFC 06/27] riscv: stop selecting the PolarFire SoC clock driver Conor Dooley
2022-09-23 18:55 ` [RFC 07/27] riscv: replace SOC_STARFIVE with ARCH_STARFIVE Conor Dooley
2022-09-23 19:09   ` Heiko Stuebner
2022-09-23 19:14     ` Conor Dooley
2022-09-23 19:20       ` Heiko Stuebner
2022-09-23 19:22         ` Conor Dooley
2022-09-23 18:55 ` [RFC 08/27] clk: starfive: " Conor Dooley
2022-09-23 18:55 ` [RFC 09/27] pinctrl: " Conor Dooley
2022-09-23 18:55 ` [RFC 10/27] reset: " Conor Dooley
2022-09-23 18:55 ` Conor Dooley [this message]
2022-09-23 18:55 ` [RFC 12/27] soc: sifive: convert SOC_SIFIVE to ARCH_SIFIVE Conor Dooley
2022-09-23 18:55 ` [RFC 13/27] clk: " Conor Dooley
2022-09-23 18:55 ` [RFC 14/27] clk: sifive: select by default if ARCH_SIFIVE Conor Dooley
2022-09-23 18:55 ` [RFC 15/27] serial: " Conor Dooley
2022-09-23 18:55 ` [RFC 16/27] PCI: dwc: fu740: convert SOC_SIFIVE to ARCH_SIFIVE Conor Dooley
2022-09-23 18:55 ` [RFC 17/27] riscv: stop selecting SiFive clock and serial drivers directly Conor Dooley
2022-09-23 18:55 ` [RFC 18/27] riscv: convert SOC_VIRT to ARCH_VIRT Conor Dooley
2022-09-23 18:55 ` [RFC 19/27] kunit: tool: rename SOC_VIRT to ARCH_VIRT in riscv's QEMU config Conor Dooley
2022-09-23 18:55 ` [RFC 20/27] wireguard: selftests: swap SOC_VIRT for ARCH_VIRT on riscv Conor Dooley
2022-09-24 10:03   ` Jason A. Donenfeld
2022-09-23 18:56 ` [RFC 21/27] riscv: convert SOC_CANAAN to ARCH_CANAAN Conor Dooley
2022-09-23 18:56 ` [RFC 22/27] clk: k210: " Conor Dooley
2022-09-23 18:56 ` [RFC 23/27] pinctrl: " Conor Dooley
2022-09-23 18:56 ` [RFC 24/27] soc: " Conor Dooley
2022-09-23 18:56 ` [RFC 25/27] reset: " Conor Dooley
2022-09-23 18:56 ` [RFC 26/27] serial: sifive: select by default if ARCH_CANAAN Conor Dooley
2022-09-23 18:56 ` [RFC 27/27] riscv: stop directly selecting drivers for ARCH_CANAAN Conor Dooley
2022-09-23 18:59 ` [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
2022-09-26  1:50 ` Damien Le Moal
2022-09-26  8:02   ` Conor Dooley
2022-09-26  9:04 ` Geert Uytterhoeven
2022-09-27  6:34   ` Conor Dooley
2022-09-27  6:48     ` Arnd Bergmann
2022-09-27  6:57       ` Conor Dooley
2022-09-27  7:03         ` Geert Uytterhoeven

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220923185605.1900083-12-conor@kernel.org \
    --to=conor@kernel.org \
    --cc=arnd@arndb.de \
    --cc=conor.dooley@microchip.com \
    --cc=damien.lemoal@opensource.wdc.com \
    --cc=geert@linux-mk68.org \
    --cc=heiko@sntech.de \
    --cc=kernel@esmil.dk \
    --cc=linux-riscv@lists.infradead.org \
    --cc=palmer@dabbelt.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.