From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: Gregory Price <gourry.memverge@gmail.com>
Cc: <qemu-devel@nongnu.org>, <linux-cxl@vger.kernel.org>,
<alison.schofield@intel.com>, <dave@stgolabs.net>,
<a.manzanares@samsung.com>, <bwidawsk@kernel.org>,
Gregory Price <gregory.price@memverge.com>,
Michael Tsirkin <mst@redhat.com>
Subject: Re: [PATCH 1/2] hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_CXL
Date: Fri, 7 Oct 2022 17:35:12 +0100 [thread overview]
Message-ID: <20221007173512.00006bb5@huawei.com> (raw)
In-Reply-To: <20221006233702.18532-1-gregory.price@memverge.com>
On Thu, 6 Oct 2022 19:37:01 -0400
Gregory Price <gourry.memverge@gmail.com> wrote:
> Current code sets to STORAGE_EXPRESS and then overrides it.
>
> Signed-off-by: Gregory Price <gregory.price@memverge.com>
I'm carry the same patch after you reported it the other day.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> ---
> hw/mem/cxl_type3.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index ada2108fac..1837c1c83a 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -146,7 +146,6 @@ static void ct3_realize(PCIDevice *pci_dev, Error **errp)
> }
>
> pci_config_set_prog_interface(pci_conf, 0x10);
> - pci_config_set_class(pci_conf, PCI_CLASS_MEMORY_CXL);
>
> pcie_endpoint_cap_init(pci_dev, 0x80);
> cxl_cstate->dvsec_offset = 0x100;
> @@ -335,7 +334,7 @@ static void ct3_class_init(ObjectClass *oc, void *data)
>
> pc->realize = ct3_realize;
> pc->exit = ct3_exit;
> - pc->class_id = PCI_CLASS_STORAGE_EXPRESS;
> + pc->class_id = PCI_CLASS_MEMORY_CXL;
> pc->vendor_id = PCI_VENDOR_ID_INTEL;
> pc->device_id = 0xd93; /* LVF for now */
> pc->revision = 1;
WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron via <qemu-devel@nongnu.org>
To: Gregory Price <gourry.memverge@gmail.com>
Cc: <qemu-devel@nongnu.org>, <linux-cxl@vger.kernel.org>,
<alison.schofield@intel.com>, <dave@stgolabs.net>,
<a.manzanares@samsung.com>, <bwidawsk@kernel.org>,
Gregory Price <gregory.price@memverge.com>,
Michael Tsirkin <mst@redhat.com>
Subject: Re: [PATCH 1/2] hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_CXL
Date: Fri, 7 Oct 2022 17:35:12 +0100 [thread overview]
Message-ID: <20221007173512.00006bb5@huawei.com> (raw)
In-Reply-To: <20221006233702.18532-1-gregory.price@memverge.com>
On Thu, 6 Oct 2022 19:37:01 -0400
Gregory Price <gourry.memverge@gmail.com> wrote:
> Current code sets to STORAGE_EXPRESS and then overrides it.
>
> Signed-off-by: Gregory Price <gregory.price@memverge.com>
I'm carry the same patch after you reported it the other day.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> ---
> hw/mem/cxl_type3.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index ada2108fac..1837c1c83a 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -146,7 +146,6 @@ static void ct3_realize(PCIDevice *pci_dev, Error **errp)
> }
>
> pci_config_set_prog_interface(pci_conf, 0x10);
> - pci_config_set_class(pci_conf, PCI_CLASS_MEMORY_CXL);
>
> pcie_endpoint_cap_init(pci_dev, 0x80);
> cxl_cstate->dvsec_offset = 0x100;
> @@ -335,7 +334,7 @@ static void ct3_class_init(ObjectClass *oc, void *data)
>
> pc->realize = ct3_realize;
> pc->exit = ct3_exit;
> - pc->class_id = PCI_CLASS_STORAGE_EXPRESS;
> + pc->class_id = PCI_CLASS_MEMORY_CXL;
> pc->vendor_id = PCI_VENDOR_ID_INTEL;
> pc->device_id = 0xd93; /* LVF for now */
> pc->revision = 1;
next prev parent reply other threads:[~2022-10-07 16:35 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-06 23:37 [PATCH 1/2] hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_CXL Gregory Price
2022-10-06 23:37 ` [PATCH 2/2] hw/cxl: Allow CXL type-3 devices to be persistent or volatile Gregory Price
2022-10-10 15:25 ` Jonathan Cameron
2022-10-10 15:25 ` Jonathan Cameron via
2022-10-10 17:12 ` Davidlohr Bueso
2022-10-10 19:36 ` Davidlohr Bueso
2022-10-10 20:07 ` Gregory Price
2022-10-07 16:35 ` Jonathan Cameron [this message]
2022-10-07 16:35 ` [PATCH 1/2] hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_CXL Jonathan Cameron via
2022-10-07 17:10 ` Davidlohr Bueso
2022-10-07 17:16 ` Davidlohr Bueso
2022-10-26 20:06 ` Michael S. Tsirkin
2022-10-26 20:09 ` Gregory Price
2022-10-26 20:11 ` Michael S. Tsirkin
2022-10-26 21:07 ` Gregory Price
2022-11-03 18:12 ` Jonathan Cameron
2022-11-03 18:12 ` Jonathan Cameron via
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