From: Dinh Nguyen <dinguyen@kernel.org>
To: jh80.chung@samsung.com
Cc: dinguyen@kernel.org, ulf.hansson@linaro.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com,
sboyd@kernel.org, linux-mmc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org
Subject: [PATCHv5 6/6] arm: dts: socfpga: remove "clk-phase" in sdmmc_clk
Date: Wed, 19 Oct 2022 12:06:57 -0500 [thread overview]
Message-ID: <20221019170657.68014-7-dinguyen@kernel.org> (raw)
In-Reply-To: <20221019170657.68014-1-dinguyen@kernel.org>
Now that the SDMMC driver can use the "clk-phase-sd-hs" binding, we don't
need the clk-phase in the sdmmc_clk anymore.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v5: new
---
arch/arm/boot/dts/socfpga.dtsi | 1 -
arch/arm/boot/dts/socfpga_arria10.dtsi | 1 -
2 files changed, 2 deletions(-)
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 604fc6e0c4ad..a2419a5c6c26 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -453,7 +453,6 @@ sdmmc_clk: sdmmc_clk {
compatible = "altr,socfpga-gate-clk";
clocks = <&f2s_periph_ref_clk>, <&main_nand_sdmmc_clk>, <&per_nand_mmc_clk>;
clk-gate = <0xa0 8>;
- clk-phase = <0 135>;
};
sdmmc_clk_divided: sdmmc_clk_divided {
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index b6ebe207e2bc..eb528c103d70 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -365,7 +365,6 @@ sdmmc_clk: sdmmc_clk {
compatible = "altr,socfpga-a10-gate-clk";
clocks = <&sdmmc_free_clk>;
clk-gate = <0xC8 5>;
- clk-phase = <0 135>;
};
qspi_clk: qspi_clk {
--
2.25.1
prev parent reply other threads:[~2022-10-19 17:07 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-19 17:06 [PATCHv5 0/6] arm: socfpga: use clk-phase-sd-hs Dinh Nguyen
2022-10-19 17:06 ` [PATCHv5 1/6] dt-bindings: mmc: synopsys-dw-mshc: document "altr,sysmgr-syscon" Dinh Nguyen
2022-10-19 23:31 ` Rob Herring
2022-10-20 23:01 ` Rob Herring
2022-10-20 18:20 ` Krzysztof Kozlowski
2022-10-19 17:06 ` [PATCHv5 2/6] arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node Dinh Nguyen
2022-10-19 17:06 ` [PATCHv5 3/6] arm: " Dinh Nguyen
2022-10-19 17:06 ` [PATCHv5 4/6] mmc: dw_mmc-pltfm: socfpga: add method to configure clk-phase Dinh Nguyen
2022-10-21 13:32 ` Krzysztof Kozlowski
2022-10-21 15:17 ` Dinh Nguyen
2022-10-19 17:06 ` [PATCHv5 5/6] clk: socfpga: remove the setting of clk-phase for sdmmc_clk Dinh Nguyen
2022-10-19 17:06 ` Dinh Nguyen [this message]
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