From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>
Subject: [Intel-gfx] [PATCH v2 0/4] drm/i915/tgl+: Fix race conditions during DKL PHY accesses
Date: Thu, 20 Oct 2022 19:00:18 +0300 [thread overview]
Message-ID: <20221020160022.1823365-1-imre.deak@intel.com> (raw)
This is v2 of [1] addressing the review comments from Jani.
[1] https://lore.kernel.org/intel-gfx/Y1BaRfTAH%2Fl+XLqc@ideak-desk.fi.intel.com/T/#t
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Imre Deak (4):
drm/i915/tgl+: Add locking around DKL PHY register accesses
drm/i915: Rename intel_tc_phy_regs.h to intel_mg_phy_regs.h
drm/i915/tgl+: Move DKL PHY register definitions to
intel_dkl_phy_regs.h
drm/i915/tgl+: Sanitize DKL PHY register definitions
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_ddi.c | 71 +++---
.../gpu/drm/i915/display/intel_display_core.h | 4 +
.../i915/display/intel_display_power_well.c | 8 +-
drivers/gpu/drm/i915/display/intel_dkl_phy.c | 101 +++++++++
drivers/gpu/drm/i915/display/intel_dkl_phy.h | 20 ++
.../gpu/drm/i915/display/intel_dkl_phy_regs.h | 202 ++++++++++++++++++
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 62 +++---
...ntel_tc_phy_regs.h => intel_mg_phy_regs.h} | 6 +-
drivers/gpu/drm/i915/display/intel_tc.c | 3 +-
drivers/gpu/drm/i915/i915_driver.c | 1 +
drivers/gpu/drm/i915/i915_reg.h | 176 ---------------
12 files changed, 397 insertions(+), 258 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_dkl_phy.c
create mode 100644 drivers/gpu/drm/i915/display/intel_dkl_phy.h
create mode 100644 drivers/gpu/drm/i915/display/intel_dkl_phy_regs.h
rename drivers/gpu/drm/i915/display/{intel_tc_phy_regs.h => intel_mg_phy_regs.h} (99%)
--
2.37.1
next reply other threads:[~2022-10-20 16:00 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-20 16:00 Imre Deak [this message]
2022-10-20 16:00 ` [Intel-gfx] [PATCH v2 1/4] drm/i915/tgl+: Add locking around DKL PHY register accesses Imre Deak
2022-10-20 16:00 ` Imre Deak
2022-10-20 16:00 ` [Intel-gfx] [PATCH v2 2/4] drm/i915: Rename intel_tc_phy_regs.h to intel_mg_phy_regs.h Imre Deak
2022-10-20 16:00 ` [Intel-gfx] [PATCH v2 3/4] drm/i915/tgl+: Move DKL PHY register definitions to intel_dkl_phy_regs.h Imre Deak
2022-10-20 16:00 ` [Intel-gfx] [PATCH v2 4/4] drm/i915/tgl+: Sanitize DKL PHY register definitions Imre Deak
2022-10-20 17:48 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tgl+: Fix race conditions during DKL PHY accesses Patchwork
2022-10-20 17:48 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-10-20 18:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-10-20 23:06 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-10-21 8:26 ` [Intel-gfx] [PATCH v2 0/4] " Jani Nikula
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