* [PATCH 0/2] Enable ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP & fixup race condition on PG_dcache_clean
@ 2022-10-23 13:32 ` guoren
0 siblings, 0 replies; 10+ messages in thread
From: guoren @ 2022-10-23 13:32 UTC (permalink / raw)
To: guoren, palmer, palmer, heiko, arnd, songmuchun, catalin.marinas,
chenhuacai, Conor.Dooley, paul.walmsley, aou
Cc: linux-arch, linux-kernel, linux-riscv, linux-mm, Guo Ren
From: Guo Ren <guoren@linux.alibaba.com>
The first patch fixup race condition on PG_dcache_clean which found in
arm64. Then enable ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP and tested
with simple hugetlbfs test case.
# cat /proc/sys/vm/hugetlb_optimize_vmemmap
1
# echo 8 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages
# mount -t hugetlbfs none test/ -o pagesize=2048k
# ./myhugemap_test
# umount test/
# echo 0 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages
No problem found.
Guo Ren (2):
riscv: Fixup race condition on PG_dcache_clean in flush_icache_pte
riscv: Enable ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP
arch/riscv/Kconfig | 1 +
arch/riscv/include/asm/cacheflush.h | 3 +++
arch/riscv/mm/cacheflush.c | 7 ++++++-
3 files changed, 10 insertions(+), 1 deletion(-)
--
2.36.1
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 1/2] riscv: Fixup race condition on PG_dcache_clean in flush_icache_pte
2022-10-23 13:32 ` guoren
@ 2022-10-23 13:32 ` guoren
-1 siblings, 0 replies; 10+ messages in thread
From: guoren @ 2022-10-23 13:32 UTC (permalink / raw)
To: guoren, palmer, palmer, heiko, arnd, songmuchun, catalin.marinas,
chenhuacai, Conor.Dooley, paul.walmsley, aou
Cc: linux-arch, linux-kernel, linux-riscv, linux-mm, Guo Ren,
Will Deacon, Steven Price
From: Guo Ren <guoren@linux.alibaba.com>
RISC-V follows the arm64 flush_icache_pte mechanism and also includes
its bug. The patch ensures that instructions are observable in a new
mapping. For more details, see 588a513d3425 ("arm64: Fix race condition
on PG_dcache_clean in __sync_icache_dcache()").
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Steven Price <steven.price@arm.com>
---
arch/riscv/mm/cacheflush.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
index 6cb7d96ad9c7..7c9f97fa3938 100644
--- a/arch/riscv/mm/cacheflush.c
+++ b/arch/riscv/mm/cacheflush.c
@@ -82,7 +82,9 @@ void flush_icache_pte(pte_t pte)
{
struct page *page = pte_page(pte);
- if (!test_and_set_bit(PG_dcache_clean, &page->flags))
+ if (!test_bit(PG_dcache_clean, &page->flags)) {
flush_icache_all();
+ set_bit(PG_dcache_clean, &page->flags);
+ }
}
#endif /* CONFIG_MMU */
--
2.36.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 1/2] riscv: Fixup race condition on PG_dcache_clean in flush_icache_pte
@ 2022-10-23 13:32 ` guoren
0 siblings, 0 replies; 10+ messages in thread
From: guoren @ 2022-10-23 13:32 UTC (permalink / raw)
To: guoren, palmer, palmer, heiko, arnd, songmuchun, catalin.marinas,
chenhuacai, Conor.Dooley, paul.walmsley, aou
Cc: linux-arch, linux-kernel, linux-riscv, linux-mm, Guo Ren,
Will Deacon, Steven Price
From: Guo Ren <guoren@linux.alibaba.com>
RISC-V follows the arm64 flush_icache_pte mechanism and also includes
its bug. The patch ensures that instructions are observable in a new
mapping. For more details, see 588a513d3425 ("arm64: Fix race condition
on PG_dcache_clean in __sync_icache_dcache()").
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Steven Price <steven.price@arm.com>
---
arch/riscv/mm/cacheflush.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
index 6cb7d96ad9c7..7c9f97fa3938 100644
--- a/arch/riscv/mm/cacheflush.c
+++ b/arch/riscv/mm/cacheflush.c
@@ -82,7 +82,9 @@ void flush_icache_pte(pte_t pte)
{
struct page *page = pte_page(pte);
- if (!test_and_set_bit(PG_dcache_clean, &page->flags))
+ if (!test_bit(PG_dcache_clean, &page->flags)) {
flush_icache_all();
+ set_bit(PG_dcache_clean, &page->flags);
+ }
}
#endif /* CONFIG_MMU */
--
2.36.1
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/2] riscv: Enable ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP
2022-10-23 13:32 ` guoren
@ 2022-10-23 13:32 ` guoren
-1 siblings, 0 replies; 10+ messages in thread
From: guoren @ 2022-10-23 13:32 UTC (permalink / raw)
To: guoren, palmer, palmer, heiko, arnd, songmuchun, catalin.marinas,
chenhuacai, Conor.Dooley, paul.walmsley, aou
Cc: linux-arch, linux-kernel, linux-riscv, linux-mm, Guo Ren
From: Guo Ren <guoren@linux.alibaba.com>
This patch enable the feature of "free some vmemmap pages of HugeTLB
page" [1]. To make it work correct, we also need fixup PG_dcache_clean
setting for huge page [2].
[1] https://lore.kernel.org/linux-doc/20210510030027.56044-1-songmuchun@bytedance.com/
[2] https://lore.kernel.org/linux-mm/20220302084624.33340-1-songmuchun@bytedance.com/
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
Cc: Muchun Song <songmuchun@bytedance.com>
Cc: Huacai Chen <chenhuacai@loongson.cn>
Cc: Arnd Bergmann <arnd@arndb.de>
---
arch/riscv/Kconfig | 1 +
arch/riscv/include/asm/cacheflush.h | 3 +++
arch/riscv/mm/cacheflush.c | 3 +++
3 files changed, 7 insertions(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 6b48a3ae9843..81ac25b0e005 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -45,6 +45,7 @@ config RISCV
select ARCH_WANT_FRAME_POINTERS
select ARCH_WANT_GENERAL_HUGETLB
select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
+ select ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP
select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE
select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU
select BUILDTIME_TABLE_SORT if MMU
diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
index 8a5c246b0a21..96f7381aeeeb 100644
--- a/arch/riscv/include/asm/cacheflush.h
+++ b/arch/riscv/include/asm/cacheflush.h
@@ -17,6 +17,9 @@ static inline void local_flush_icache_all(void)
static inline void flush_dcache_page(struct page *page)
{
+ if (PageHuge(page))
+ page = compound_head(page);
+
if (test_bit(PG_dcache_clean, &page->flags))
clear_bit(PG_dcache_clean, &page->flags);
}
diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
index 7c9f97fa3938..ca35807cf185 100644
--- a/arch/riscv/mm/cacheflush.c
+++ b/arch/riscv/mm/cacheflush.c
@@ -82,6 +82,9 @@ void flush_icache_pte(pte_t pte)
{
struct page *page = pte_page(pte);
+ if (PageHuge(page))
+ page = compound_head(page);
+
if (!test_bit(PG_dcache_clean, &page->flags)) {
flush_icache_all();
set_bit(PG_dcache_clean, &page->flags);
--
2.36.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 2/2] riscv: Enable ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP
@ 2022-10-23 13:32 ` guoren
0 siblings, 0 replies; 10+ messages in thread
From: guoren @ 2022-10-23 13:32 UTC (permalink / raw)
To: guoren, palmer, palmer, heiko, arnd, songmuchun, catalin.marinas,
chenhuacai, Conor.Dooley, paul.walmsley, aou
Cc: linux-arch, linux-kernel, linux-riscv, linux-mm, Guo Ren
From: Guo Ren <guoren@linux.alibaba.com>
This patch enable the feature of "free some vmemmap pages of HugeTLB
page" [1]. To make it work correct, we also need fixup PG_dcache_clean
setting for huge page [2].
[1] https://lore.kernel.org/linux-doc/20210510030027.56044-1-songmuchun@bytedance.com/
[2] https://lore.kernel.org/linux-mm/20220302084624.33340-1-songmuchun@bytedance.com/
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
Cc: Muchun Song <songmuchun@bytedance.com>
Cc: Huacai Chen <chenhuacai@loongson.cn>
Cc: Arnd Bergmann <arnd@arndb.de>
---
arch/riscv/Kconfig | 1 +
arch/riscv/include/asm/cacheflush.h | 3 +++
arch/riscv/mm/cacheflush.c | 3 +++
3 files changed, 7 insertions(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 6b48a3ae9843..81ac25b0e005 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -45,6 +45,7 @@ config RISCV
select ARCH_WANT_FRAME_POINTERS
select ARCH_WANT_GENERAL_HUGETLB
select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
+ select ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP
select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE
select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU
select BUILDTIME_TABLE_SORT if MMU
diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
index 8a5c246b0a21..96f7381aeeeb 100644
--- a/arch/riscv/include/asm/cacheflush.h
+++ b/arch/riscv/include/asm/cacheflush.h
@@ -17,6 +17,9 @@ static inline void local_flush_icache_all(void)
static inline void flush_dcache_page(struct page *page)
{
+ if (PageHuge(page))
+ page = compound_head(page);
+
if (test_bit(PG_dcache_clean, &page->flags))
clear_bit(PG_dcache_clean, &page->flags);
}
diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
index 7c9f97fa3938..ca35807cf185 100644
--- a/arch/riscv/mm/cacheflush.c
+++ b/arch/riscv/mm/cacheflush.c
@@ -82,6 +82,9 @@ void flush_icache_pte(pte_t pte)
{
struct page *page = pte_page(pte);
+ if (PageHuge(page))
+ page = compound_head(page);
+
if (!test_bit(PG_dcache_clean, &page->flags)) {
flush_icache_all();
set_bit(PG_dcache_clean, &page->flags);
--
2.36.1
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH 2/2] riscv: Enable ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP
2022-10-23 13:32 ` guoren
@ 2022-10-24 7:07 ` Muchun Song
-1 siblings, 0 replies; 10+ messages in thread
From: Muchun Song @ 2022-10-24 7:07 UTC (permalink / raw)
To: guoren
Cc: palmer, palmer, heiko, arnd, Muchun Song, catalin.marinas,
chenhuacai, Conor.Dooley, paul.walmsley, aou, linux-arch,
linux-kernel, linux-riscv, linux-mm, Guo Ren
> On Oct 23, 2022, at 21:32, guoren@kernel.org wrote:
>
> From: Guo Ren <guoren@linux.alibaba.com>
>
> This patch enable the feature of "free some vmemmap pages of HugeTLB
We have a new name “HVO" to refer to this feature. So I’d like to rewrite
The changelog to something like “Enable HVO [1] for RISCV”.
> page" [1]. To make it work correct, we also need fixup PG_dcache_clean
> setting for huge page [2].
>
> [1] https://lore.kernel.org/linux-doc/20210510030027.56044-1-songmuchun@bytedance.com/
> [2] https://lore.kernel.org/linux-mm/20220302084624.33340-1-songmuchun@bytedance.com/
>
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Signed-off-by: Guo Ren <guoren@kernel.org>
> Cc: Muchun Song <songmuchun@bytedance.com>
> Cc: Huacai Chen <chenhuacai@loongson.cn>
> Cc: Arnd Bergmann <arnd@arndb.de>
I’am really glad to see more and more arches for support HVO.
Acked-by: Muchun Song <songmuchun@bytedance.com>
Thanks.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 2/2] riscv: Enable ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP
@ 2022-10-24 7:07 ` Muchun Song
0 siblings, 0 replies; 10+ messages in thread
From: Muchun Song @ 2022-10-24 7:07 UTC (permalink / raw)
To: guoren
Cc: palmer, palmer, heiko, arnd, Muchun Song, catalin.marinas,
chenhuacai, Conor.Dooley, paul.walmsley, aou, linux-arch,
linux-kernel, linux-riscv, linux-mm, Guo Ren
> On Oct 23, 2022, at 21:32, guoren@kernel.org wrote:
>
> From: Guo Ren <guoren@linux.alibaba.com>
>
> This patch enable the feature of "free some vmemmap pages of HugeTLB
We have a new name “HVO" to refer to this feature. So I’d like to rewrite
The changelog to something like “Enable HVO [1] for RISCV”.
> page" [1]. To make it work correct, we also need fixup PG_dcache_clean
> setting for huge page [2].
>
> [1] https://lore.kernel.org/linux-doc/20210510030027.56044-1-songmuchun@bytedance.com/
> [2] https://lore.kernel.org/linux-mm/20220302084624.33340-1-songmuchun@bytedance.com/
>
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Signed-off-by: Guo Ren <guoren@kernel.org>
> Cc: Muchun Song <songmuchun@bytedance.com>
> Cc: Huacai Chen <chenhuacai@loongson.cn>
> Cc: Arnd Bergmann <arnd@arndb.de>
I’am really glad to see more and more arches for support HVO.
Acked-by: Muchun Song <songmuchun@bytedance.com>
Thanks.
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 2/2] riscv: Enable ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP
2022-10-24 7:07 ` Muchun Song
@ 2022-10-24 8:02 ` Guo Ren
-1 siblings, 0 replies; 10+ messages in thread
From: Guo Ren @ 2022-10-24 8:02 UTC (permalink / raw)
To: Muchun Song
Cc: palmer, palmer, heiko, arnd, Muchun Song, catalin.marinas,
chenhuacai, Conor.Dooley, paul.walmsley, aou, linux-arch,
linux-kernel, linux-riscv, linux-mm, Guo Ren
On Mon, Oct 24, 2022 at 3:07 PM Muchun Song <muchun.song@linux.dev> wrote:
>
>
>
> > On Oct 23, 2022, at 21:32, guoren@kernel.org wrote:
> >
> > From: Guo Ren <guoren@linux.alibaba.com>
> >
> > This patch enable the feature of "free some vmemmap pages of HugeTLB
>
> We have a new name “HVO" to refer to this feature. So I’d like to rewrite
> The changelog to something like “Enable HVO [1] for RISCV”.
Okay.
>
> > page" [1]. To make it work correct, we also need fixup PG_dcache_clean
> > setting for huge page [2].
> >
> > [1] https://lore.kernel.org/linux-doc/20210510030027.56044-1-songmuchun@bytedance.com/
> > [2] https://lore.kernel.org/linux-mm/20220302084624.33340-1-songmuchun@bytedance.com/
> >
> > Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> > Signed-off-by: Guo Ren <guoren@kernel.org>
> > Cc: Muchun Song <songmuchun@bytedance.com>
> > Cc: Huacai Chen <chenhuacai@loongson.cn>
> > Cc: Arnd Bergmann <arnd@arndb.de>
>
> I’am really glad to see more and more arches for support HVO.
>
> Acked-by: Muchun Song <songmuchun@bytedance.com>
Thx
>
> Thanks.
>
--
Best Regards
Guo Ren
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 2/2] riscv: Enable ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP
@ 2022-10-24 8:02 ` Guo Ren
0 siblings, 0 replies; 10+ messages in thread
From: Guo Ren @ 2022-10-24 8:02 UTC (permalink / raw)
To: Muchun Song
Cc: palmer, palmer, heiko, arnd, Muchun Song, catalin.marinas,
chenhuacai, Conor.Dooley, paul.walmsley, aou, linux-arch,
linux-kernel, linux-riscv, linux-mm, Guo Ren
On Mon, Oct 24, 2022 at 3:07 PM Muchun Song <muchun.song@linux.dev> wrote:
>
>
>
> > On Oct 23, 2022, at 21:32, guoren@kernel.org wrote:
> >
> > From: Guo Ren <guoren@linux.alibaba.com>
> >
> > This patch enable the feature of "free some vmemmap pages of HugeTLB
>
> We have a new name “HVO" to refer to this feature. So I’d like to rewrite
> The changelog to something like “Enable HVO [1] for RISCV”.
Okay.
>
> > page" [1]. To make it work correct, we also need fixup PG_dcache_clean
> > setting for huge page [2].
> >
> > [1] https://lore.kernel.org/linux-doc/20210510030027.56044-1-songmuchun@bytedance.com/
> > [2] https://lore.kernel.org/linux-mm/20220302084624.33340-1-songmuchun@bytedance.com/
> >
> > Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> > Signed-off-by: Guo Ren <guoren@kernel.org>
> > Cc: Muchun Song <songmuchun@bytedance.com>
> > Cc: Huacai Chen <chenhuacai@loongson.cn>
> > Cc: Arnd Bergmann <arnd@arndb.de>
>
> I’am really glad to see more and more arches for support HVO.
>
> Acked-by: Muchun Song <songmuchun@bytedance.com>
Thx
>
> Thanks.
>
--
Best Regards
Guo Ren
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 10+ messages in thread