From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH 8/9] RISC-V: lib: Use named labels in memset
Date: Thu, 27 Oct 2022 15:02:46 +0200 [thread overview]
Message-ID: <20221027130247.31634-9-ajones@ventanamicro.com> (raw)
In-Reply-To: <20221027130247.31634-1-ajones@ventanamicro.com>
In a coming patch we'll be adding more branch targets. Let's
change the numeric labels to named labels to make it easier
to read and integrate with.
No functional change intended.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
arch/riscv/lib/memset.S | 29 +++++++++++++++--------------
1 file changed, 15 insertions(+), 14 deletions(-)
diff --git a/arch/riscv/lib/memset.S b/arch/riscv/lib/memset.S
index e613c5c27998..74e4c7feec00 100644
--- a/arch/riscv/lib/memset.S
+++ b/arch/riscv/lib/memset.S
@@ -13,7 +13,7 @@ WEAK(memset)
/* Defer to byte-oriented fill for small sizes */
sltiu a3, a2, 16
- bnez a3, 4f
+ bnez a3, .Lfinish
/*
* Round to nearest XLEN-aligned address
@@ -21,17 +21,18 @@ WEAK(memset)
*/
addi a3, t0, SZREG-1
andi a3, a3, ~(SZREG-1)
- beq a3, t0, 2f /* Skip if already aligned */
+ beq a3, t0, .Ldo_duff /* Skip if already aligned */
/* Handle initial misalignment */
sub a4, a3, t0
-1:
+.Lmisaligned1:
sb a1, 0(t0)
addi t0, t0, 1
- bltu t0, a3, 1b
+ bltu t0, a3, .Lmisaligned1
sub a2, a2, a4 /* Update count */
-2: /* Duff's device with 32 XLEN stores per iteration */
+.Ldo_duff:
+ /* Duff's device with 32 XLEN stores per iteration */
/* Broadcast value into all bytes */
andi a1, a1, 0xff
slli a3, a1, 8
@@ -48,7 +49,7 @@ WEAK(memset)
add a3, t0, a4
andi a4, a4, 31*SZREG /* Calculate remainder */
- beqz a4, 3f /* Shortcut if no remainder */
+ beqz a4, .Lduff_loop /* Shortcut if no remainder */
neg a4, a4
addi a4, a4, 32*SZREG /* Calculate initial offset */
@@ -57,13 +58,13 @@ WEAK(memset)
/* Jump into loop body */
/* Assumes 32-bit instruction lengths */
- la a5, 3f
+ la a5, .Lduff_loop
#ifdef CONFIG_64BIT
srli a4, a4, 1
#endif
add a5, a5, a4
jr a5
-3:
+.Lduff_loop:
REG_S a1, 0(t0)
REG_S a1, SZREG(t0)
REG_S a1, 2*SZREG(t0)
@@ -98,17 +99,17 @@ WEAK(memset)
REG_S a1, 31*SZREG(t0)
addi t0, t0, 32*SZREG
- bltu t0, a3, 3b
+ bltu t0, a3, .Lduff_loop
andi a2, a2, SZREG-1 /* Update count */
-4:
+.Lfinish:
/* Handle trailing misalignment */
- beqz a2, 6f
+ beqz a2, .Ldone
add a3, t0, a2
-5:
+.Lmisaligned2:
sb a1, 0(t0)
addi t0, t0, 1
- bltu t0, a3, 5b
-6:
+ bltu t0, a3, .Lmisaligned2
+.Ldone:
ret
END(__memset)
--
2.37.3
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: linux-riscv@lists.infradead.org, kvm-riscv@lists.infradead.org
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Anup Patel <apatel@ventanamicro.com>,
Heiko Stuebner <heiko@sntech.de>,
Conor Dooley <conor.dooley@microchip.com>,
Atish Patra <atishp@rivosinc.com>,
Jisheng Zhang <jszhang@kernel.org>
Subject: [PATCH 8/9] RISC-V: lib: Use named labels in memset
Date: Thu, 27 Oct 2022 15:02:46 +0200 [thread overview]
Message-ID: <20221027130247.31634-9-ajones@ventanamicro.com> (raw)
In-Reply-To: <20221027130247.31634-1-ajones@ventanamicro.com>
In a coming patch we'll be adding more branch targets. Let's
change the numeric labels to named labels to make it easier
to read and integrate with.
No functional change intended.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
arch/riscv/lib/memset.S | 29 +++++++++++++++--------------
1 file changed, 15 insertions(+), 14 deletions(-)
diff --git a/arch/riscv/lib/memset.S b/arch/riscv/lib/memset.S
index e613c5c27998..74e4c7feec00 100644
--- a/arch/riscv/lib/memset.S
+++ b/arch/riscv/lib/memset.S
@@ -13,7 +13,7 @@ WEAK(memset)
/* Defer to byte-oriented fill for small sizes */
sltiu a3, a2, 16
- bnez a3, 4f
+ bnez a3, .Lfinish
/*
* Round to nearest XLEN-aligned address
@@ -21,17 +21,18 @@ WEAK(memset)
*/
addi a3, t0, SZREG-1
andi a3, a3, ~(SZREG-1)
- beq a3, t0, 2f /* Skip if already aligned */
+ beq a3, t0, .Ldo_duff /* Skip if already aligned */
/* Handle initial misalignment */
sub a4, a3, t0
-1:
+.Lmisaligned1:
sb a1, 0(t0)
addi t0, t0, 1
- bltu t0, a3, 1b
+ bltu t0, a3, .Lmisaligned1
sub a2, a2, a4 /* Update count */
-2: /* Duff's device with 32 XLEN stores per iteration */
+.Ldo_duff:
+ /* Duff's device with 32 XLEN stores per iteration */
/* Broadcast value into all bytes */
andi a1, a1, 0xff
slli a3, a1, 8
@@ -48,7 +49,7 @@ WEAK(memset)
add a3, t0, a4
andi a4, a4, 31*SZREG /* Calculate remainder */
- beqz a4, 3f /* Shortcut if no remainder */
+ beqz a4, .Lduff_loop /* Shortcut if no remainder */
neg a4, a4
addi a4, a4, 32*SZREG /* Calculate initial offset */
@@ -57,13 +58,13 @@ WEAK(memset)
/* Jump into loop body */
/* Assumes 32-bit instruction lengths */
- la a5, 3f
+ la a5, .Lduff_loop
#ifdef CONFIG_64BIT
srli a4, a4, 1
#endif
add a5, a5, a4
jr a5
-3:
+.Lduff_loop:
REG_S a1, 0(t0)
REG_S a1, SZREG(t0)
REG_S a1, 2*SZREG(t0)
@@ -98,17 +99,17 @@ WEAK(memset)
REG_S a1, 31*SZREG(t0)
addi t0, t0, 32*SZREG
- bltu t0, a3, 3b
+ bltu t0, a3, .Lduff_loop
andi a2, a2, SZREG-1 /* Update count */
-4:
+.Lfinish:
/* Handle trailing misalignment */
- beqz a2, 6f
+ beqz a2, .Ldone
add a3, t0, a2
-5:
+.Lmisaligned2:
sb a1, 0(t0)
addi t0, t0, 1
- bltu t0, a3, 5b
-6:
+ bltu t0, a3, .Lmisaligned2
+.Ldone:
ret
END(__memset)
--
2.37.3
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next prev parent reply other threads:[~2022-10-27 13:02 UTC|newest]
Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-27 13:02 [PATCH 0/9] RISC-V: Apply Zicboz to clear_page and memset Andrew Jones
2022-10-27 13:02 ` Andrew Jones
2022-10-27 13:02 ` [PATCH 1/9] RISC-V: Factor out body of riscv_init_cbom_blocksize loop Andrew Jones
2022-10-27 13:02 ` Andrew Jones
2022-10-27 14:58 ` Heiko Stübner
2022-10-27 14:58 ` Heiko Stübner
2022-10-30 20:31 ` Conor Dooley
2022-10-30 20:31 ` Conor Dooley
2022-10-31 8:11 ` Andrew Jones
2022-10-31 8:11 ` Andrew Jones
2022-10-27 13:02 ` [PATCH 2/9] RISC-V: Add Zicboz detection and block size parsing Andrew Jones
2022-10-27 13:02 ` Andrew Jones
2022-10-27 15:03 ` Heiko Stübner
2022-10-27 15:03 ` Heiko Stübner
2022-10-27 15:42 ` Andrew Jones
2022-10-27 15:42 ` Andrew Jones
2022-10-30 20:47 ` Conor Dooley
2022-10-30 20:47 ` Conor Dooley
2022-10-31 8:12 ` Andrew Jones
2022-10-31 8:12 ` Andrew Jones
2022-11-13 22:24 ` Conor Dooley
2022-11-13 22:24 ` Conor Dooley
2022-11-14 8:29 ` Andrew Jones
2022-11-14 8:29 ` Andrew Jones
2022-10-27 13:02 ` [PATCH 3/9] RISC-V: insn-def: Define cbo.zero Andrew Jones
2022-10-27 13:02 ` Andrew Jones
2022-10-27 15:37 ` Heiko Stübner
2022-10-27 15:37 ` Heiko Stübner
2022-10-30 21:08 ` Conor Dooley
2022-10-30 21:08 ` Conor Dooley
2022-10-31 8:18 ` Andrew Jones
2022-10-31 8:18 ` Andrew Jones
2022-10-27 13:02 ` [PATCH 4/9] RISC-V: Use Zicboz in clear_page when available Andrew Jones
2022-10-27 13:02 ` Andrew Jones
2022-10-27 13:02 ` [PATCH 5/9] RISC-V: KVM: Provide UAPI for Zicboz block size Andrew Jones
2022-10-27 13:02 ` Andrew Jones
2022-10-30 21:23 ` Conor Dooley
2022-10-30 21:23 ` Conor Dooley
2022-11-27 5:37 ` Anup Patel
2022-11-27 5:37 ` Anup Patel
2022-10-27 13:02 ` [PATCH 6/9] RISC-V: KVM: Expose Zicboz to the guest Andrew Jones
2022-10-27 13:02 ` Andrew Jones
2022-10-30 21:23 ` Conor Dooley
2022-10-30 21:23 ` Conor Dooley
2022-11-27 5:38 ` Anup Patel
2022-11-27 5:38 ` Anup Patel
2022-10-27 13:02 ` [PATCH 7/9] RISC-V: lib: Improve memset assembler formatting Andrew Jones
2022-10-27 13:02 ` Andrew Jones
2022-10-30 21:27 ` Conor Dooley
2022-10-30 21:27 ` Conor Dooley
2022-10-27 13:02 ` Andrew Jones [this message]
2022-10-27 13:02 ` [PATCH 8/9] RISC-V: lib: Use named labels in memset Andrew Jones
2022-10-30 22:15 ` Conor Dooley
2022-10-30 22:15 ` Conor Dooley
2022-10-31 8:24 ` Andrew Jones
2022-10-31 8:24 ` Andrew Jones
2022-10-27 13:02 ` [PATCH 9/9] RISC-V: Use Zicboz in memset when available Andrew Jones
2022-10-27 13:02 ` Andrew Jones
2022-10-30 22:35 ` Conor Dooley
2022-10-30 22:35 ` Conor Dooley
2022-10-31 8:30 ` Andrew Jones
2022-10-31 8:30 ` Andrew Jones
2022-11-03 2:43 ` Palmer Dabbelt
2022-11-03 2:43 ` Palmer Dabbelt
2022-11-03 10:21 ` Andrew Jones
2022-11-03 10:21 ` Andrew Jones
2022-10-29 9:59 ` [PATCH 0/9] RISC-V: Apply Zicboz to clear_page and memset Andrew Jones
2022-10-29 9:59 ` Andrew Jones
2022-10-30 20:23 ` Conor Dooley
2022-10-30 20:23 ` Conor Dooley
2022-10-31 8:39 ` Andrew Jones
2022-10-31 8:39 ` Andrew Jones
2022-11-01 10:37 ` Andrew Jones
2022-11-01 10:37 ` Andrew Jones
2022-11-01 10:53 ` Andrew Jones
2022-11-01 10:53 ` Andrew Jones
2022-12-20 12:55 ` Conor Dooley
2022-12-20 12:55 ` Conor Dooley
2022-12-26 18:56 ` Andrew Jones
2022-12-26 18:56 ` Andrew Jones
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