From: Rob Herring <robh@kernel.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: "Andy Gross" <agross@kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@somainline.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Vinod Koul" <vkoul@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Johan Hovold" <johan@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v1 1/7] dt-bindings: PCI: qcom: Add sm8350 to bindings
Date: Mon, 31 Oct 2022 16:40:55 -0500 [thread overview]
Message-ID: <20221031214055.GA3613285-robh@kernel.org> (raw)
In-Reply-To: <20221029211312.929862-2-dmitry.baryshkov@linaro.org>
On Sun, Oct 30, 2022 at 12:13:06AM +0300, Dmitry Baryshkov wrote:
> Add bindings for two PCIe hosts on SM8350 platform. The only difference
> between them is in the aggre0 clock, which warrants the oneOf clause for
> the clocks properties.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> .../devicetree/bindings/pci/qcom,pcie.yaml | 54 +++++++++++++++++++
> 1 file changed, 54 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> index 54f07852d279..55bf5958ef79 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> @@ -32,6 +32,7 @@ properties:
> - qcom,pcie-sdm845
> - qcom,pcie-sm8150
> - qcom,pcie-sm8250
> + - qcom,pcie-sm8350
> - qcom,pcie-sm8450-pcie0
> - qcom,pcie-sm8450-pcie1
> - qcom,pcie-ipq6018
> @@ -185,6 +186,7 @@ allOf:
> - qcom,pcie-sc8180x
> - qcom,pcie-sc8280xp
> - qcom,pcie-sm8250
> + - qcom,pcie-sm8350
> - qcom,pcie-sm8450-pcie0
> - qcom,pcie-sm8450-pcie1
> then:
> @@ -540,6 +542,57 @@ allOf:
> items:
> - const: pci # PCIe core reset
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,pcie-sm8350
> + then:
> + oneOf:
> + # Unfortunately the "optional" ref clock is used in the middle of the list
> + - properties:
> + clocks:
> + maxItems: 13
> + clock-names:
> + items:
> + - const: pipe # PIPE clock
> + - const: pipe_mux # PIPE MUX
> + - const: phy_pipe # PIPE output clock
> + - const: ref # REFERENCE clock
> + - const: aux # Auxiliary clock
> + - const: cfg # Configuration clock
> + - const: bus_master # Master AXI clock
> + - const: bus_slave # Slave AXI clock
> + - const: slave_q2a # Slave Q2A clock
> + - const: tbu # PCIe TBU clock
> + - const: ddrss_sf_tbu # PCIe SF TBU clock
> + - const: aggre0 # Aggre NoC PCIe0 AXI clock
'enum: [ aggre0, aggre1 ]' and 'minItems: 12' would eliminate the 2nd
case. There's a implicit requirement that string names are unique (by
default).
> + - const: aggre1 # Aggre NoC PCIe1 AXI clock
> + - properties:
> + clocks:
> + maxItems: 12
> + clock-names:
> + items:
> + - const: pipe # PIPE clock
> + - const: pipe_mux # PIPE MUX
> + - const: phy_pipe # PIPE output clock
> + - const: ref # REFERENCE clock
> + - const: aux # Auxiliary clock
> + - const: cfg # Configuration clock
> + - const: bus_master # Master AXI clock
> + - const: bus_slave # Slave AXI clock
> + - const: slave_q2a # Slave Q2A clock
> + - const: tbu # PCIe TBU clock
> + - const: ddrss_sf_tbu # PCIe SF TBU clock
> + - const: aggre1 # Aggre NoC PCIe1 AXI clock
> + properties:
> + resets:
> + maxItems: 1
> + reset-names:
> + items:
> + - const: pci # PCIe core reset
> +
> - if:
> properties:
> compatible:
> @@ -670,6 +723,7 @@ allOf:
> - qcom,pcie-sdm845
> - qcom,pcie-sm8150
> - qcom,pcie-sm8250
> + - qcom,pcie-sm8350
> - qcom,pcie-sm8450-pcie0
> - qcom,pcie-sm8450-pcie1
> then:
> --
> 2.35.1
>
>
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: "Andy Gross" <agross@kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@somainline.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Vinod Koul" <vkoul@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Johan Hovold" <johan@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v1 1/7] dt-bindings: PCI: qcom: Add sm8350 to bindings
Date: Mon, 31 Oct 2022 16:40:55 -0500 [thread overview]
Message-ID: <20221031214055.GA3613285-robh@kernel.org> (raw)
In-Reply-To: <20221029211312.929862-2-dmitry.baryshkov@linaro.org>
On Sun, Oct 30, 2022 at 12:13:06AM +0300, Dmitry Baryshkov wrote:
> Add bindings for two PCIe hosts on SM8350 platform. The only difference
> between them is in the aggre0 clock, which warrants the oneOf clause for
> the clocks properties.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> .../devicetree/bindings/pci/qcom,pcie.yaml | 54 +++++++++++++++++++
> 1 file changed, 54 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> index 54f07852d279..55bf5958ef79 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> @@ -32,6 +32,7 @@ properties:
> - qcom,pcie-sdm845
> - qcom,pcie-sm8150
> - qcom,pcie-sm8250
> + - qcom,pcie-sm8350
> - qcom,pcie-sm8450-pcie0
> - qcom,pcie-sm8450-pcie1
> - qcom,pcie-ipq6018
> @@ -185,6 +186,7 @@ allOf:
> - qcom,pcie-sc8180x
> - qcom,pcie-sc8280xp
> - qcom,pcie-sm8250
> + - qcom,pcie-sm8350
> - qcom,pcie-sm8450-pcie0
> - qcom,pcie-sm8450-pcie1
> then:
> @@ -540,6 +542,57 @@ allOf:
> items:
> - const: pci # PCIe core reset
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,pcie-sm8350
> + then:
> + oneOf:
> + # Unfortunately the "optional" ref clock is used in the middle of the list
> + - properties:
> + clocks:
> + maxItems: 13
> + clock-names:
> + items:
> + - const: pipe # PIPE clock
> + - const: pipe_mux # PIPE MUX
> + - const: phy_pipe # PIPE output clock
> + - const: ref # REFERENCE clock
> + - const: aux # Auxiliary clock
> + - const: cfg # Configuration clock
> + - const: bus_master # Master AXI clock
> + - const: bus_slave # Slave AXI clock
> + - const: slave_q2a # Slave Q2A clock
> + - const: tbu # PCIe TBU clock
> + - const: ddrss_sf_tbu # PCIe SF TBU clock
> + - const: aggre0 # Aggre NoC PCIe0 AXI clock
'enum: [ aggre0, aggre1 ]' and 'minItems: 12' would eliminate the 2nd
case. There's a implicit requirement that string names are unique (by
default).
> + - const: aggre1 # Aggre NoC PCIe1 AXI clock
> + - properties:
> + clocks:
> + maxItems: 12
> + clock-names:
> + items:
> + - const: pipe # PIPE clock
> + - const: pipe_mux # PIPE MUX
> + - const: phy_pipe # PIPE output clock
> + - const: ref # REFERENCE clock
> + - const: aux # Auxiliary clock
> + - const: cfg # Configuration clock
> + - const: bus_master # Master AXI clock
> + - const: bus_slave # Slave AXI clock
> + - const: slave_q2a # Slave Q2A clock
> + - const: tbu # PCIe TBU clock
> + - const: ddrss_sf_tbu # PCIe SF TBU clock
> + - const: aggre1 # Aggre NoC PCIe1 AXI clock
> + properties:
> + resets:
> + maxItems: 1
> + reset-names:
> + items:
> + - const: pci # PCIe core reset
> +
> - if:
> properties:
> compatible:
> @@ -670,6 +723,7 @@ allOf:
> - qcom,pcie-sdm845
> - qcom,pcie-sm8150
> - qcom,pcie-sm8250
> + - qcom,pcie-sm8350
> - qcom,pcie-sm8450-pcie0
> - qcom,pcie-sm8450-pcie1
> then:
> --
> 2.35.1
>
>
--
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linux-phy@lists.infradead.org
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next prev parent reply other threads:[~2022-10-31 21:40 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-29 21:13 [PATCH v1 0/7] PCI/phy: Add support for PCI on sm8350 platform Dmitry Baryshkov
2022-10-29 21:13 ` Dmitry Baryshkov
2022-10-29 21:13 ` [PATCH v1 1/7] dt-bindings: PCI: qcom: Add sm8350 to bindings Dmitry Baryshkov
2022-10-29 21:13 ` Dmitry Baryshkov
2022-10-31 21:40 ` Rob Herring [this message]
2022-10-31 21:40 ` Rob Herring
2022-10-31 21:47 ` Dmitry Baryshkov
2022-10-31 21:47 ` Dmitry Baryshkov
2022-11-01 17:22 ` Rob Herring
2022-11-01 17:22 ` Rob Herring
2022-11-10 10:02 ` Dmitry Baryshkov
2022-11-10 10:02 ` Dmitry Baryshkov
2022-10-29 21:13 ` [PATCH v1 2/7] dt-bindings: phy: qcom,qmp-pcie: add sm8350 bindings Dmitry Baryshkov
2022-10-29 21:13 ` Dmitry Baryshkov
2022-10-31 21:41 ` Rob Herring
2022-10-31 21:41 ` Rob Herring
2022-10-29 21:13 ` [PATCH v1 3/7] PCI: qcom: Add support for SM8350 Dmitry Baryshkov
2022-10-29 21:13 ` Dmitry Baryshkov
2022-10-29 21:13 ` [PATCH v1 4/7] phy: qcom-qmp-pcie: split and rename the sm8450 gen3 PHY config tables Dmitry Baryshkov
2022-10-29 21:13 ` Dmitry Baryshkov
2022-10-30 12:25 ` Bjorn Helgaas
2022-10-30 12:25 ` Bjorn Helgaas
2022-10-30 14:05 ` Dmitry Baryshkov
2022-10-30 14:05 ` Dmitry Baryshkov
2022-10-29 21:13 ` [PATCH v1 5/7] phy: qcom-qmp-pcie: add support for sm8350 platform Dmitry Baryshkov
2022-10-29 21:13 ` Dmitry Baryshkov
2022-10-29 21:13 ` [PATCH v1 6/7] arm64: dts: qcom: sm8350: add PCIe devices Dmitry Baryshkov
2022-10-29 21:13 ` Dmitry Baryshkov
2022-10-29 21:13 ` [PATCH v1 7/7] arm64: dts: qcom: sm8350-hdk: enable " Dmitry Baryshkov
2022-10-29 21:13 ` Dmitry Baryshkov
2022-10-30 12:23 ` [PATCH v1 0/7] PCI/phy: Add support for PCI on sm8350 platform Bjorn Helgaas
2022-10-30 12:23 ` Bjorn Helgaas
2022-10-30 14:26 ` Dmitry Baryshkov
2022-10-30 14:26 ` Dmitry Baryshkov
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