From: Frank Li <Frank.Li@nxp.com>
To: shawnguo@kernel.org
Cc: Frank.Li@nxp.com, aisheng.dong@nxp.com,
devicetree@vger.kernel.org, festevam@gmail.com, han.xu@nxp.com,
imx@lists.linux.dev, kernel@pengutronix.de,
krzysztof.kozlowski+dt@linaro.org,
linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com,
linux-kernel@vger.kernel.org, peng.fan@nxp.com,
robh+dt@kernel.org, s.hauer@pengutronix.de, shenwei.wang@nxp.com
Subject: [PATCH v2 4/6] arm64: dts: imx8dxl_evk: add flexspi0 support
Date: Fri, 11 Nov 2022 10:47:40 -0500 [thread overview]
Message-ID: <20221111154742.2753318-5-Frank.Li@nxp.com> (raw)
In-Reply-To: <20221111154742.2753318-1-Frank.Li@nxp.com>
Enable flexspi0 at imx8dxl_evk boards dts.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 36 +++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
index 11b1ff90c06d..f8d416f7fd92 100644
--- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
@@ -181,6 +181,23 @@ vddio1: vddio-regulator {
};
};
+&flexspi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexspi0>;
+ nxp,fspi-dll-slvdly = <4>;
+ status = "okay";
+
+ mt35xu512aba0: flash@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <133000000>;
+ spi-tx-bus-width = <8>;
+ spi-rx-bus-width = <8>;
+ };
+};
+
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
@@ -386,6 +403,25 @@ IMX8DXL_ENET1_RGMII_TX_CTL_CONN_EQOS_RGMII_TX_CTL 0x06000020
>;
};
+ pinctrl_flexspi0: flexspi0grp {
+ fsl,pins = <
+ IMX8DXL_QSPI0A_DATA0_LSIO_QSPI0A_DATA0 0x06000021
+ IMX8DXL_QSPI0A_DATA1_LSIO_QSPI0A_DATA1 0x06000021
+ IMX8DXL_QSPI0A_DATA2_LSIO_QSPI0A_DATA2 0x06000021
+ IMX8DXL_QSPI0A_DATA3_LSIO_QSPI0A_DATA3 0x06000021
+ IMX8DXL_QSPI0A_DQS_LSIO_QSPI0A_DQS 0x06000021
+ IMX8DXL_QSPI0A_SS0_B_LSIO_QSPI0A_SS0_B 0x06000021
+ IMX8DXL_QSPI0A_SCLK_LSIO_QSPI0A_SCLK 0x06000021
+ IMX8DXL_QSPI0B_SCLK_LSIO_QSPI0B_SCLK 0x06000021
+ IMX8DXL_QSPI0B_DATA0_LSIO_QSPI0B_DATA0 0x06000021
+ IMX8DXL_QSPI0B_DATA1_LSIO_QSPI0B_DATA1 0x06000021
+ IMX8DXL_QSPI0B_DATA2_LSIO_QSPI0B_DATA2 0x06000021
+ IMX8DXL_QSPI0B_DATA3_LSIO_QSPI0B_DATA3 0x06000021
+ IMX8DXL_QSPI0B_DQS_LSIO_QSPI0B_DQS 0x06000021
+ IMX8DXL_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B 0x06000021
+ >;
+ };
+
pinctrl_fec1: fec1grp {
fsl,pins = <
IMX8DXL_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD 0x000014a0
--
2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Frank Li <Frank.Li@nxp.com>
To: shawnguo@kernel.org
Cc: Frank.Li@nxp.com, aisheng.dong@nxp.com,
devicetree@vger.kernel.org, festevam@gmail.com, han.xu@nxp.com,
imx@lists.linux.dev, kernel@pengutronix.de,
krzysztof.kozlowski+dt@linaro.org,
linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com,
linux-kernel@vger.kernel.org, peng.fan@nxp.com,
robh+dt@kernel.org, s.hauer@pengutronix.de, shenwei.wang@nxp.com
Subject: [PATCH v2 4/6] arm64: dts: imx8dxl_evk: add flexspi0 support
Date: Fri, 11 Nov 2022 10:47:40 -0500 [thread overview]
Message-ID: <20221111154742.2753318-5-Frank.Li@nxp.com> (raw)
In-Reply-To: <20221111154742.2753318-1-Frank.Li@nxp.com>
Enable flexspi0 at imx8dxl_evk boards dts.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 36 +++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
index 11b1ff90c06d..f8d416f7fd92 100644
--- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
@@ -181,6 +181,23 @@ vddio1: vddio-regulator {
};
};
+&flexspi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexspi0>;
+ nxp,fspi-dll-slvdly = <4>;
+ status = "okay";
+
+ mt35xu512aba0: flash@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <133000000>;
+ spi-tx-bus-width = <8>;
+ spi-rx-bus-width = <8>;
+ };
+};
+
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
@@ -386,6 +403,25 @@ IMX8DXL_ENET1_RGMII_TX_CTL_CONN_EQOS_RGMII_TX_CTL 0x06000020
>;
};
+ pinctrl_flexspi0: flexspi0grp {
+ fsl,pins = <
+ IMX8DXL_QSPI0A_DATA0_LSIO_QSPI0A_DATA0 0x06000021
+ IMX8DXL_QSPI0A_DATA1_LSIO_QSPI0A_DATA1 0x06000021
+ IMX8DXL_QSPI0A_DATA2_LSIO_QSPI0A_DATA2 0x06000021
+ IMX8DXL_QSPI0A_DATA3_LSIO_QSPI0A_DATA3 0x06000021
+ IMX8DXL_QSPI0A_DQS_LSIO_QSPI0A_DQS 0x06000021
+ IMX8DXL_QSPI0A_SS0_B_LSIO_QSPI0A_SS0_B 0x06000021
+ IMX8DXL_QSPI0A_SCLK_LSIO_QSPI0A_SCLK 0x06000021
+ IMX8DXL_QSPI0B_SCLK_LSIO_QSPI0B_SCLK 0x06000021
+ IMX8DXL_QSPI0B_DATA0_LSIO_QSPI0B_DATA0 0x06000021
+ IMX8DXL_QSPI0B_DATA1_LSIO_QSPI0B_DATA1 0x06000021
+ IMX8DXL_QSPI0B_DATA2_LSIO_QSPI0B_DATA2 0x06000021
+ IMX8DXL_QSPI0B_DATA3_LSIO_QSPI0B_DATA3 0x06000021
+ IMX8DXL_QSPI0B_DQS_LSIO_QSPI0B_DQS 0x06000021
+ IMX8DXL_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B 0x06000021
+ >;
+ };
+
pinctrl_fec1: fec1grp {
fsl,pins = <
IMX8DXL_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD 0x000014a0
--
2.34.1
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next prev parent reply other threads:[~2022-11-11 15:48 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-11 15:47 [PATCH v2 0/6] add adc0 flexspi lpspi to 8dxl evk board dts Frank Li
2022-11-11 15:47 ` Frank Li
2022-11-11 15:47 ` [PATCH v2 1/6] arm64: dts: imx8dxl: add adc0 support Frank Li
2022-11-11 15:47 ` Frank Li
2022-11-11 15:47 ` [PATCH v2 2/6] arm64: dts: imx8dxl_evk: " Frank Li
2022-11-11 15:47 ` Frank Li
2022-11-11 15:47 ` [PATCH v2 3/6] arm64: dts: imx8dxl: add flexspi0 support Frank Li
2022-11-11 15:47 ` Frank Li
2022-11-11 15:47 ` Frank Li [this message]
2022-11-11 15:47 ` [PATCH v2 4/6] arm64: dts: imx8dxl_evk: " Frank Li
2022-11-11 15:47 ` [PATCH v2 5/6] arm64: dts: imx8dxl: add lpspi support Frank Li
2022-11-11 15:47 ` Frank Li
2022-11-11 15:47 ` [PATCH v2 6/6] arm64: dts: imx8dxl_evk: add lpspi0 support Frank Li
2022-11-11 15:47 ` Frank Li
2022-11-14 8:49 ` [PATCH v2 0/6] add adc0 flexspi lpspi to 8dxl evk board dts Shawn Guo
2022-11-14 8:49 ` Shawn Guo
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