From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Gregory Price <gourry.memverge@gmail.com>
Cc: <qemu-devel@nongnu.org>, <linux-cxl@vger.kernel.org>,
<mst@redhat.com>, <marcel.apfelbaum@gmail.com>,
<imammedo@redhat.com>, <ani@anisinha.ca>,
<alison.schofield@intel.com>, <dave@stgolabs.net>,
<a.manzanares@samsung.com>, <bwidawsk@kernel.org>,
<gregory.price@memverge.com>, <hchkuo@avery-design.com.tw>,
<cbrowy@avery-design.com>, <ira.weiny@intel.com>
Subject: Re: [PATCH 2/4] hw/cxl: Add CXL_CAPACITY_MULTIPLIER definition
Date: Mon, 14 Nov 2022 17:55:16 +0000 [thread overview]
Message-ID: <20221114175516.0000375d@Huawei.com> (raw)
In-Reply-To: <20221026004737.3646-3-gregory.price@memverge.com>
On Tue, 25 Oct 2022 20:47:35 -0400
Gregory Price <gourry.memverge@gmail.com> wrote:
> Remove usage of magic numbers when accessing capacity fields and replace
> with CXL_CAPACITY_MULTIPLIER, matching the kernel definition.
>
> Signed-off-by: Gregory Price <gregory.price@memverge.com>
> Reviewed-by: Davidlohr Bueso <dave@stgolabs.net>
Makes sense. I'll add it to my local tree.
Depending on how timing works out, I might roll this into a wider series
of cleanups sent to Michael or we might want to keep this as part of your
series.
Jonathan
> ---
> hw/cxl/cxl-mailbox-utils.c | 14 ++++++++------
> 1 file changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index 3e23d29e2d..d7543fd5b4 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -15,6 +15,8 @@
> #include "qemu/log.h"
> #include "qemu/uuid.h"
>
> +#define CXL_CAPACITY_MULTIPLIER 0x10000000 /* SZ_256M */
> +
> /*
> * How to add a new command, example. The command set FOO, with cmd BAR.
> * 1. Add the command set and cmd to the enum.
> @@ -267,7 +269,7 @@ static ret_code cmd_firmware_update_get_info(struct cxl_cmd *cmd,
> } QEMU_PACKED *fw_info;
> QEMU_BUILD_BUG_ON(sizeof(*fw_info) != 0x50);
>
> - if (cxl_dstate->pmem_size < (256 << 20)) {
> + if (cxl_dstate->pmem_size < CXL_CAPACITY_MULTIPLIER) {
> return CXL_MBOX_INTERNAL_ERROR;
> }
>
> @@ -412,7 +414,7 @@ static ret_code cmd_identify_memory_device(struct cxl_cmd *cmd,
> CXLType3Class *cvc = CXL_TYPE3_GET_CLASS(ct3d);
> uint64_t size = cxl_dstate->pmem_size;
>
> - if (!QEMU_IS_ALIGNED(size, 256 << 20)) {
> + if (!QEMU_IS_ALIGNED(size, CXL_CAPACITY_MULTIPLIER)) {
> return CXL_MBOX_INTERNAL_ERROR;
> }
>
> @@ -422,8 +424,8 @@ static ret_code cmd_identify_memory_device(struct cxl_cmd *cmd,
> /* PMEM only */
> snprintf(id->fw_revision, 0x10, "BWFW VERSION %02d", 0);
>
> - id->total_capacity = size / (256 << 20);
> - id->persistent_capacity = size / (256 << 20);
> + id->total_capacity = size / CXL_CAPACITY_MULTIPLIER;
> + id->persistent_capacity = size / CXL_CAPACITY_MULTIPLIER;
> id->lsa_size = cvc->get_lsa_size(ct3d);
> id->poison_list_max_mer[1] = 0x1; /* 256 poison records */
>
> @@ -444,14 +446,14 @@ static ret_code cmd_ccls_get_partition_info(struct cxl_cmd *cmd,
> QEMU_BUILD_BUG_ON(sizeof(*part_info) != 0x20);
> uint64_t size = cxl_dstate->pmem_size;
>
> - if (!QEMU_IS_ALIGNED(size, 256 << 20)) {
> + if (!QEMU_IS_ALIGNED(size, CXL_CAPACITY_MULTIPLIER)) {
> return CXL_MBOX_INTERNAL_ERROR;
> }
>
> /* PMEM only */
> part_info->active_vmem = 0;
> part_info->next_vmem = 0;
> - part_info->active_pmem = size / (256 << 20);
> + part_info->active_pmem = size / CXL_CAPACITY_MULTIPLIER;
> part_info->next_pmem = 0;
>
> *len = sizeof(*part_info);
WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron via <qemu-devel@nongnu.org>
To: Gregory Price <gourry.memverge@gmail.com>
Cc: <qemu-devel@nongnu.org>, <linux-cxl@vger.kernel.org>,
<mst@redhat.com>, <marcel.apfelbaum@gmail.com>,
<imammedo@redhat.com>, <ani@anisinha.ca>,
<alison.schofield@intel.com>, <dave@stgolabs.net>,
<a.manzanares@samsung.com>, <bwidawsk@kernel.org>,
<gregory.price@memverge.com>, <hchkuo@avery-design.com.tw>,
<cbrowy@avery-design.com>, <ira.weiny@intel.com>
Subject: Re: [PATCH 2/4] hw/cxl: Add CXL_CAPACITY_MULTIPLIER definition
Date: Mon, 14 Nov 2022 17:55:16 +0000 [thread overview]
Message-ID: <20221114175516.0000375d@Huawei.com> (raw)
In-Reply-To: <20221026004737.3646-3-gregory.price@memverge.com>
On Tue, 25 Oct 2022 20:47:35 -0400
Gregory Price <gourry.memverge@gmail.com> wrote:
> Remove usage of magic numbers when accessing capacity fields and replace
> with CXL_CAPACITY_MULTIPLIER, matching the kernel definition.
>
> Signed-off-by: Gregory Price <gregory.price@memverge.com>
> Reviewed-by: Davidlohr Bueso <dave@stgolabs.net>
Makes sense. I'll add it to my local tree.
Depending on how timing works out, I might roll this into a wider series
of cleanups sent to Michael or we might want to keep this as part of your
series.
Jonathan
> ---
> hw/cxl/cxl-mailbox-utils.c | 14 ++++++++------
> 1 file changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index 3e23d29e2d..d7543fd5b4 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -15,6 +15,8 @@
> #include "qemu/log.h"
> #include "qemu/uuid.h"
>
> +#define CXL_CAPACITY_MULTIPLIER 0x10000000 /* SZ_256M */
> +
> /*
> * How to add a new command, example. The command set FOO, with cmd BAR.
> * 1. Add the command set and cmd to the enum.
> @@ -267,7 +269,7 @@ static ret_code cmd_firmware_update_get_info(struct cxl_cmd *cmd,
> } QEMU_PACKED *fw_info;
> QEMU_BUILD_BUG_ON(sizeof(*fw_info) != 0x50);
>
> - if (cxl_dstate->pmem_size < (256 << 20)) {
> + if (cxl_dstate->pmem_size < CXL_CAPACITY_MULTIPLIER) {
> return CXL_MBOX_INTERNAL_ERROR;
> }
>
> @@ -412,7 +414,7 @@ static ret_code cmd_identify_memory_device(struct cxl_cmd *cmd,
> CXLType3Class *cvc = CXL_TYPE3_GET_CLASS(ct3d);
> uint64_t size = cxl_dstate->pmem_size;
>
> - if (!QEMU_IS_ALIGNED(size, 256 << 20)) {
> + if (!QEMU_IS_ALIGNED(size, CXL_CAPACITY_MULTIPLIER)) {
> return CXL_MBOX_INTERNAL_ERROR;
> }
>
> @@ -422,8 +424,8 @@ static ret_code cmd_identify_memory_device(struct cxl_cmd *cmd,
> /* PMEM only */
> snprintf(id->fw_revision, 0x10, "BWFW VERSION %02d", 0);
>
> - id->total_capacity = size / (256 << 20);
> - id->persistent_capacity = size / (256 << 20);
> + id->total_capacity = size / CXL_CAPACITY_MULTIPLIER;
> + id->persistent_capacity = size / CXL_CAPACITY_MULTIPLIER;
> id->lsa_size = cvc->get_lsa_size(ct3d);
> id->poison_list_max_mer[1] = 0x1; /* 256 poison records */
>
> @@ -444,14 +446,14 @@ static ret_code cmd_ccls_get_partition_info(struct cxl_cmd *cmd,
> QEMU_BUILD_BUG_ON(sizeof(*part_info) != 0x20);
> uint64_t size = cxl_dstate->pmem_size;
>
> - if (!QEMU_IS_ALIGNED(size, 256 << 20)) {
> + if (!QEMU_IS_ALIGNED(size, CXL_CAPACITY_MULTIPLIER)) {
> return CXL_MBOX_INTERNAL_ERROR;
> }
>
> /* PMEM only */
> part_info->active_vmem = 0;
> part_info->next_vmem = 0;
> - part_info->active_pmem = size / (256 << 20);
> + part_info->active_pmem = size / CXL_CAPACITY_MULTIPLIER;
> part_info->next_pmem = 0;
>
> *len = sizeof(*part_info);
next prev parent reply other threads:[~2022-11-14 17:56 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20221026004835uscas1p1d37255ba8daaba8fc7e16e5129cb94b5@uscas1p1.samsung.com>
2022-10-26 0:47 ` [PATCH 0/4 v3] Multi-Region and Volatile Memory support for CXL Type-3 Devices Gregory Price
2022-10-26 0:47 ` [PATCH 1/4] hw/i386/pc.c: CXL Fixed Memory Window should not reserve e820 in bios Gregory Price
2022-10-26 20:33 ` Michael S. Tsirkin
2022-10-26 0:47 ` [PATCH 2/4] hw/cxl: Add CXL_CAPACITY_MULTIPLIER definition Gregory Price
2022-11-14 17:55 ` Jonathan Cameron [this message]
2022-11-14 17:55 ` Jonathan Cameron via
2022-10-26 0:47 ` [PATCH 3/4] hw/cxl: Multi-Region CXL Type-3 Devices (Volatile and Persistent) Gregory Price
2022-11-14 17:53 ` Jonathan Cameron
2022-11-14 17:53 ` Jonathan Cameron via
2022-11-14 23:00 ` Gregory Price
2022-11-17 13:53 ` Jonathan Cameron
2022-11-17 13:53 ` Jonathan Cameron via
2022-11-23 17:42 ` Gregory Price
2022-10-26 0:47 ` [PATCH 4/4] hw/acpi/cxl.c: Fill in SRAT for vmem/pmem if NUMA node is assigned Gregory Price
2022-10-26 20:13 ` [PATCH 0/4 v3] Multi-Region and Volatile Memory support for CXL Type-3 Devices Adam Manzanares
2022-10-26 20:47 ` Gregory Price
2022-10-27 10:58 ` Jonathan Cameron
2022-10-27 10:58 ` Jonathan Cameron via
2022-10-27 14:29 ` Gregory Price
2022-10-27 18:10 ` Adam Manzanares
2022-10-26 20:15 ` Michael S. Tsirkin
2022-10-26 20:20 ` Michael S. Tsirkin
2022-10-26 20:48 ` Gregory Price
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