From: Luca Ceresoli <luca.ceresoli@bootlin.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Sowjanya Komatineni <skomatineni@nvidia.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Hans Verkuil <hverkuil-cisco@xs4all.nl>,
Dmitry Osipenko <digetx@gmail.com>,
linux-media@vger.kernel.org, linux-tegra@vger.kernel.org,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Richard Leitner <richard.leitner@skidata.com>,
Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Subject: Re: [PATCH 01/23] dt-bindings: display: tegra: add bindings for Tegra20 VIP
Date: Fri, 18 Nov 2022 10:08:00 +0100 [thread overview]
Message-ID: <20221118100800.4950aec0@booty> (raw)
In-Reply-To: <ca5f3b54-25bd-4dd5-799f-c7bda08cdef6@linaro.org>
Hello Krzysztof,
thanks for the review. I'm glad my error rate on bindings is lower than
it used to be before I attended your ELCE talk! ;)
On Tue, 15 Nov 2022 13:12:44 +0100
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:
> On 09/11/2022 15:18, luca.ceresoli@bootlin.com wrote:
> > From: Luca Ceresoli <luca.ceresoli@bootlin.com>
> >
> > VIP is the parallel video capture component within the video input
> > subsystem of Tegra20 (and other Tegra chips, apparently).
>
> Subject: drop second, redundant "bindings".
>
> >
> > Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
> > ---
> > .../display/tegra/nvidia,tegra20-vip.yaml | 64 +++++++++++++++++++
> > MAINTAINERS | 7 ++
> > 2 files changed, 71 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml
> > new file mode 100644
> > index 000000000000..934dabfd2307
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml
> > @@ -0,0 +1,64 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-vip.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: NVIDIA Tegra VIP (parallel video capture) controller
> > +
> > +maintainers:
> > + - Luca Ceresoli <luca.ceresoli@bootlin.com>
> > +
> > +properties:
> > + $nodename:
> > + const: vip
>
> No need to enforce names in device schemas, especially that this does
> not look like a generic name.
>
> > +
> > + compatible:
> > + enum:
> > + - nvidia,tegra20-vip
> > +
> > + "#address-cells":
> > + const: 1
> > +
> > + "#size-cells":
> > + const: 0
> > +
> > + channel@0:
>
> Missing description.
OK, I think this should do:
description: parallel video capture interface for the VI
> > + type: object
>
> Do you expect it to grow to more channels?
Not on Tegra20, it has one input only, but for other SoCs it's likely.
Definitely some (including Tegra20 itself) have multiple CSI-2 inputs,
and it's reasonable that this can apply to parallel input too.
Is this enough motivation to make room for more channels, or should I
remove it since I have no plans to introduce support for other Tegra
chips?
> > +
> > + properties:
> > + reg: true
>
> const: 0
>
> > +
> > + ports:
> > + $ref: /schemas/graph.yaml#/properties/ports
> > +
> > + properties:
> > + port@0:
> > + $ref: /schemas/graph.yaml#/properties/port
> > + description:
> > + Port receiving the video stream from the sensor
> > +
> > + port@1:
> > + $ref: /schemas/graph.yaml#/properties/port
> > + description:
> > + Port sending the video stream to the VI
> > +
> > + required:
> > + - port@0
> > + - port@1
> > +
> > + additionalProperties: false
> > +
> > + required:
> > + - reg
> > + - ports
> > +
> > +unevaluatedProperties: false
> > +
> > +required:
> > + - compatible
> > + - "#address-cells"
> > + - "#size-cells"
> > + - channel@0
> > +
> > +# see nvidia,tegra20-vi.yaml for an example
>
> That file does not have this compatible. At least not on next-20221109.
It's added in patch 2. It's a chicken-egg problem, should I add a third
patch that adds this line only?
ACK for all other comments you wrote.
--
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
WARNING: multiple messages have this Message-ID (diff)
From: Luca Ceresoli <luca.ceresoli@bootlin.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: devicetree@vger.kernel.org,
Richard Leitner <richard.leitner@skidata.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org,
Rob Herring <robh+dt@kernel.org>,
Jonathan Hunter <jonathanh@nvidia.com>,
Paul Kocialkowski <paul.kocialkowski@bootlin.com>,
linux-tegra@vger.kernel.org,
Thierry Reding <thierry.reding@gmail.com>,
Sowjanya Komatineni <skomatineni@nvidia.com>,
dri-devel@lists.freedesktop.org,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Hans Verkuil <hverkuil-cisco@xs4all.nl>,
Dmitry Osipenko <digetx@gmail.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
linux-media@vger.kernel.org
Subject: Re: [PATCH 01/23] dt-bindings: display: tegra: add bindings for Tegra20 VIP
Date: Fri, 18 Nov 2022 10:08:00 +0100 [thread overview]
Message-ID: <20221118100800.4950aec0@booty> (raw)
In-Reply-To: <ca5f3b54-25bd-4dd5-799f-c7bda08cdef6@linaro.org>
Hello Krzysztof,
thanks for the review. I'm glad my error rate on bindings is lower than
it used to be before I attended your ELCE talk! ;)
On Tue, 15 Nov 2022 13:12:44 +0100
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:
> On 09/11/2022 15:18, luca.ceresoli@bootlin.com wrote:
> > From: Luca Ceresoli <luca.ceresoli@bootlin.com>
> >
> > VIP is the parallel video capture component within the video input
> > subsystem of Tegra20 (and other Tegra chips, apparently).
>
> Subject: drop second, redundant "bindings".
>
> >
> > Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
> > ---
> > .../display/tegra/nvidia,tegra20-vip.yaml | 64 +++++++++++++++++++
> > MAINTAINERS | 7 ++
> > 2 files changed, 71 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml
> > new file mode 100644
> > index 000000000000..934dabfd2307
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml
> > @@ -0,0 +1,64 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-vip.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: NVIDIA Tegra VIP (parallel video capture) controller
> > +
> > +maintainers:
> > + - Luca Ceresoli <luca.ceresoli@bootlin.com>
> > +
> > +properties:
> > + $nodename:
> > + const: vip
>
> No need to enforce names in device schemas, especially that this does
> not look like a generic name.
>
> > +
> > + compatible:
> > + enum:
> > + - nvidia,tegra20-vip
> > +
> > + "#address-cells":
> > + const: 1
> > +
> > + "#size-cells":
> > + const: 0
> > +
> > + channel@0:
>
> Missing description.
OK, I think this should do:
description: parallel video capture interface for the VI
> > + type: object
>
> Do you expect it to grow to more channels?
Not on Tegra20, it has one input only, but for other SoCs it's likely.
Definitely some (including Tegra20 itself) have multiple CSI-2 inputs,
and it's reasonable that this can apply to parallel input too.
Is this enough motivation to make room for more channels, or should I
remove it since I have no plans to introduce support for other Tegra
chips?
> > +
> > + properties:
> > + reg: true
>
> const: 0
>
> > +
> > + ports:
> > + $ref: /schemas/graph.yaml#/properties/ports
> > +
> > + properties:
> > + port@0:
> > + $ref: /schemas/graph.yaml#/properties/port
> > + description:
> > + Port receiving the video stream from the sensor
> > +
> > + port@1:
> > + $ref: /schemas/graph.yaml#/properties/port
> > + description:
> > + Port sending the video stream to the VI
> > +
> > + required:
> > + - port@0
> > + - port@1
> > +
> > + additionalProperties: false
> > +
> > + required:
> > + - reg
> > + - ports
> > +
> > +unevaluatedProperties: false
> > +
> > +required:
> > + - compatible
> > + - "#address-cells"
> > + - "#size-cells"
> > + - channel@0
> > +
> > +# see nvidia,tegra20-vi.yaml for an example
>
> That file does not have this compatible. At least not on next-20221109.
It's added in patch 2. It's a chicken-egg problem, should I add a third
patch that adds this line only?
ACK for all other comments you wrote.
--
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2022-11-18 9:08 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-09 14:18 [PATCH 00/23] Add Tegra20 parallel video input capture luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 01/23] dt-bindings: display: tegra: add bindings for Tegra20 VIP luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-15 12:12 ` Krzysztof Kozlowski
2022-11-15 12:12 ` Krzysztof Kozlowski
2022-11-18 9:08 ` Luca Ceresoli [this message]
2022-11-18 9:08 ` Luca Ceresoli
2022-11-18 13:11 ` Krzysztof Kozlowski
2022-11-18 13:11 ` Krzysztof Kozlowski
2022-11-09 14:18 ` [PATCH 02/23] dt-bindings: display: tegra: vi: add 'vip' property and example luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-15 12:15 ` Krzysztof Kozlowski
2022-11-15 12:15 ` Krzysztof Kozlowski
2022-11-09 14:18 ` [PATCH 03/23] ARM: dts: tegra20: add label to nvidia,tegra20-vi node luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-15 12:16 ` Krzysztof Kozlowski
2022-11-15 12:16 ` Krzysztof Kozlowski
2022-11-09 14:18 ` [PATCH 04/23] ARM: dts: tegra20-tamonten: add label to avdd_vdac regulator luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-15 12:16 ` Krzysztof Kozlowski
2022-11-15 12:16 ` Krzysztof Kozlowski
2022-11-09 14:18 ` [PATCH 05/23] staging: media: tegra-video: fix .vidioc_enum_fmt_vid_cap to return all formats luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 06/23] staging: media: tegra-video: improve documentation of tegra_video_format fields luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 07/23] staging: media: tegra-video: document tegra_channel_get_remote_source_subdev luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 08/23] staging: media: tegra-video: fix typos in comment luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 09/23] staging: media: tegra-video: improve error messages luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 10/23] staging: media: tegra-video: slightly simplify cleanup on errors luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 11/23] staging: media: tegra-video: move private struct declaration to C file luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 12/23] staging: media: tegra-video: remove unneeded include luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 13/23] staging: media: tegra-video: Kconfig: allow TPG only on Tegra210 luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 14/23] staging: media: tegra-video: move tegra_channel_fmt_align to a per-soc op luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 15/23] staging: media: tegra-video: move default format to soc-specific data luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 16/23] staging: media: tegra-video: move MIPI calibration calls from VI to CSI luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 17/23] staging: media: tegra-video: add a per-soc enable/disable op luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 18/23] staging: media: tegra-video: move syncpt init/free to a per-soc op luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 19/23] staging: media: tegra-video: add syncpts for Tegra20 to struct tegra_vi luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 20/23] staging: media: tegra-video: add hooks for planar YUV and H/V flip luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 21/23] staging: media: tegra-video: add H/V flip controls luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 22/23] staging: media: tegra-video: add support for VIP (parallel video input) luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 14:18 ` [PATCH 23/23] staging: media: tegra-video: add tegra20 variant luca.ceresoli
2022-11-09 14:18 ` luca.ceresoli
2022-11-09 16:25 ` Luca Ceresoli
2022-11-24 8:36 ` [PATCH 00/23] Add Tegra20 parallel video input capture Hans Verkuil
2022-11-24 8:36 ` Hans Verkuil
2022-11-24 14:56 ` Luca Ceresoli
2022-11-24 14:56 ` Luca Ceresoli
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