From: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
To: Vadym Kochan <vadym.kochan@plvision.eu>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
"Elad Nachman" <enachman@marvell.com>,
"Raz Adashi" <raza@marvell.com>,
"Yuval Shaia" <yshaia@marvell.com>
Subject: Re: [PATCH v2 2/3] PCI: armada8k: Add AC5 SoC support
Date: Thu, 24 Nov 2022 15:58:17 +0100 [thread overview]
Message-ID: <20221124155817.5f372417@windsurf> (raw)
In-Reply-To: <20221124135829.2551873-3-vadym.kochan@plvision.eu>
Hello,
On Thu, 24 Nov 2022 15:58:27 +0200
Vadym Kochan <vadym.kochan@plvision.eu> wrote:
> -static int armada8k_pcie_start_link(struct dw_pcie *pci)
> -{
> - u32 reg;
> -
> - /* Start LTSSM */
> - reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_CONTROL_REG);
> - reg |= PCIE_APP_LTSSM_EN;
> - dw_pcie_writel_dbi(pci, PCIE_GLOBAL_CONTROL_REG, reg);
> -
> - return 0;
> -}
So this code is going away, but I don't see it being re-added anywhere.
I don't think anything in the code you are adding that sets the
LTSSM_EN bit in PCIE_GLOBAL_CONTROL_REG. Am I missing something?
Thomas
--
Thomas Petazzoni, co-owner and CEO, Bootlin
Embedded Linux and Kernel engineering and training
https://bootlin.com
WARNING: multiple messages have this Message-ID (diff)
From: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
To: Vadym Kochan <vadym.kochan@plvision.eu>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
"Elad Nachman" <enachman@marvell.com>,
"Raz Adashi" <raza@marvell.com>,
"Yuval Shaia" <yshaia@marvell.com>
Subject: Re: [PATCH v2 2/3] PCI: armada8k: Add AC5 SoC support
Date: Thu, 24 Nov 2022 15:58:17 +0100 [thread overview]
Message-ID: <20221124155817.5f372417@windsurf> (raw)
In-Reply-To: <20221124135829.2551873-3-vadym.kochan@plvision.eu>
Hello,
On Thu, 24 Nov 2022 15:58:27 +0200
Vadym Kochan <vadym.kochan@plvision.eu> wrote:
> -static int armada8k_pcie_start_link(struct dw_pcie *pci)
> -{
> - u32 reg;
> -
> - /* Start LTSSM */
> - reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_CONTROL_REG);
> - reg |= PCIE_APP_LTSSM_EN;
> - dw_pcie_writel_dbi(pci, PCIE_GLOBAL_CONTROL_REG, reg);
> -
> - return 0;
> -}
So this code is going away, but I don't see it being re-added anywhere.
I don't think anything in the code you are adding that sets the
LTSSM_EN bit in PCIE_GLOBAL_CONTROL_REG. Am I missing something?
Thomas
--
Thomas Petazzoni, co-owner and CEO, Bootlin
Embedded Linux and Kernel engineering and training
https://bootlin.com
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-11-24 14:58 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-24 13:58 [PATCH v2 0/3] PCI: armada8k: Add support for AC5 SoC Vadym Kochan
2022-11-24 13:58 ` Vadym Kochan
2022-11-24 13:58 ` [PATCH v2 1/3] dt-bindings: PCI: armada8k: Add compatible string " Vadym Kochan
2022-11-24 13:58 ` Vadym Kochan
2022-11-24 14:46 ` Krzysztof Kozlowski
2022-11-24 14:46 ` Krzysztof Kozlowski
2022-11-24 13:58 ` [PATCH v2 2/3] PCI: armada8k: Add AC5 SoC support Vadym Kochan
2022-11-24 13:58 ` Vadym Kochan
2022-11-24 14:58 ` Thomas Petazzoni [this message]
2022-11-24 14:58 ` Thomas Petazzoni
2022-11-25 8:43 ` Vadym Kochan
2022-11-25 8:43 ` Vadym Kochan
2022-11-25 15:51 ` Thomas Petazzoni
2022-11-25 15:51 ` Thomas Petazzoni
2022-11-24 13:58 ` [PATCH v2 3/3] PCI: armada8k: Add MSI support for AC5 SoC Vadym Kochan
2022-11-24 13:58 ` Vadym Kochan
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