From: Ayan Kumar Halder <ayan.kumar.halder@amd.com>
To: <xen-devel@lists.xenproject.org>
Cc: <sstabellini@kernel.org>, <stefano.stabellini@amd.com>,
<julien@xen.org>, <Volodymyr_Babchuk@epam.com>,
<bertrand.marquis@arm.com>,
Ayan Kumar Halder <ayan.kumar.halder@amd.com>
Subject: [XEN v1 2/9] xen/arm: Define translate_dt_address_size() for the translation between u64 and paddr_t
Date: Thu, 15 Dec 2022 19:32:38 +0000 [thread overview]
Message-ID: <20221215193245.48314-3-ayan.kumar.halder@amd.com> (raw)
In-Reply-To: <20221215193245.48314-1-ayan.kumar.halder@amd.com>
paddr_t may be u64 or u32 depending of the type of architecture.
Thus, while translating between u64 and paddr_t, one should check that the
truncated bits are 0. If not, then raise an appropriate error.
Signed-off-by: Ayan Kumar Halder <ayan.kumar.halder@amd.com>
---
xen/arch/arm/include/asm/platform.h | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/xen/arch/arm/include/asm/platform.h b/xen/arch/arm/include/asm/platform.h
index 997eb25216..6be1549f09 100644
--- a/xen/arch/arm/include/asm/platform.h
+++ b/xen/arch/arm/include/asm/platform.h
@@ -42,6 +42,32 @@ struct platform_desc {
unsigned int dma_bitsize;
};
+static inline int translate_dt_address_size(u64 *dt_addr, u64 *dt_size,
+ paddr_t *addr, paddr_t *size)
+{
+#ifdef CONFIG_ARM_PA_32
+ if ( dt_addr && (*dt_addr >> PADDR_SHIFT) )
+ {
+ dprintk(XENLOG_ERR, "Error in DT. Invalid address\n");
+ return -ENXIO;
+ }
+
+ if ( dt_size && (*dt_size >> PADDR_SHIFT) )
+ {
+ dprintk(XENLOG_ERR, "Error in DT. Invalid size\n");
+ return -ENXIO;
+ }
+#endif
+
+ if ( dt_addr && addr )
+ *addr = (paddr_t) (*dt_addr);
+
+ if ( dt_size && size )
+ *size = (paddr_t) (*dt_size);
+
+ return 0;
+}
+
/*
* Quirk for platforms where device tree incorrectly reports 4K GICC
* size, but actually the two GICC register ranges are placed at 64K
--
2.17.1
next prev parent reply other threads:[~2022-12-15 19:33 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-15 19:32 [XEN v1 0/9] Add support for 32 bit physical address Ayan Kumar Halder
2022-12-15 19:32 ` [XEN v1 1/9] xen/arm: Remove the extra assignment Ayan Kumar Halder
2022-12-16 7:56 ` Jan Beulich
2022-12-16 9:41 ` Julien Grall
2022-12-15 19:32 ` Ayan Kumar Halder [this message]
2022-12-16 9:51 ` [XEN v1 2/9] xen/arm: Define translate_dt_address_size() for the translation between u64 and paddr_t Julien Grall
2022-12-17 0:46 ` Stefano Stabellini
2022-12-17 8:42 ` Julien Grall
2022-12-22 23:20 ` Stefano Stabellini
2022-12-23 10:01 ` Ayan Kumar Halder
2022-12-23 10:17 ` Julien Grall
2023-01-04 23:56 ` Stefano Stabellini
2022-12-15 19:32 ` [XEN v1 3/9] xen/arm: Always use 'u64' instead of 'paddr_t' for address and size in DT Ayan Kumar Halder
2022-12-16 9:57 ` Julien Grall
2022-12-16 10:49 ` Ayan Kumar Halder
2022-12-16 11:12 ` Julien Grall
2022-12-16 11:13 ` Julien Grall
2022-12-15 19:32 ` [XEN v1 4/9] xen/arm: Use translate_dt_address_size() to translate between device tree addr/size and paddr_t Ayan Kumar Halder
2022-12-15 19:32 ` [XEN v1 5/9] xen/arm: Use 'PRIpaddr' to display 'paddr_t' variable Ayan Kumar Halder
2022-12-15 19:32 ` [XEN v1 6/9] xen/arm: Use 'u64' to represent 'unsigned long long' Ayan Kumar Halder
2022-12-16 10:04 ` Julien Grall
2022-12-15 19:32 ` [XEN v1 7/9] xen/arm: Restrict zeroeth_table_offset for ARM_64 Ayan Kumar Halder
2022-12-15 22:08 ` Julien Grall
2022-12-15 19:32 ` [XEN v1 8/9] xen/arm: Other adaptations required to support 32bit paddr Ayan Kumar Halder
2022-12-16 10:23 ` Julien Grall
2022-12-20 15:24 ` Ayan Kumar Halder
2022-12-20 16:22 ` Julien Grall
2022-12-15 19:32 ` [XEN v1 9/9] xen/arm: Introduce ARM_PA_32 to support 32 bit physical address Ayan Kumar Halder
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