From: Taylor Simpson <tsimpson@quicinc.com>
To: qemu-devel@nongnu.org
Cc: tsimpson@quicinc.com, richard.henderson@linaro.org,
philmd@linaro.org, peter.maydell@linaro.org, bcain@quicinc.com,
quic_mathbern@quicinc.com, stefanha@redhat.com
Subject: [PULL 04/21] Hexagon (target/hexagon) Only use branch_taken when packet has multi cof
Date: Fri, 16 Dec 2022 12:48:28 -0800 [thread overview]
Message-ID: <20221216204845.19290-5-tsimpson@quicinc.com> (raw)
In-Reply-To: <20221216204845.19290-1-tsimpson@quicinc.com>
When a packet has more than one change-of-flow instruction, only the first
one to branch is considered. We use the branch_taken variable to keep
track of this.
However, when there is a single cof instruction, we don't need the same
amount of bookkeeping.
We add the pkt_has_multi_cof member to the Packet structure, and pass this
information to the needed functions.
When there is a generated helper function with cof, the generator will
pass this pkt_has_multi_cof as a runtime value.
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <20221108162906.3166-5-tsimpson@quicinc.com>
---
target/hexagon/insn.h | 1 +
target/hexagon/macros.h | 2 +-
target/hexagon/decode.c | 15 +++++++++++++--
target/hexagon/op_helper.c | 24 +++++++++++++++---------
target/hexagon/translate.c | 4 +++-
target/hexagon/gen_helper_funcs.py | 5 ++++-
target/hexagon/gen_helper_protos.py | 8 ++++++--
target/hexagon/gen_tcg_funcs.py | 5 +++++
target/hexagon/hex_common.py | 3 +++
9 files changed, 51 insertions(+), 16 deletions(-)
diff --git a/target/hexagon/insn.h b/target/hexagon/insn.h
index cb92586802..775c4c183d 100644
--- a/target/hexagon/insn.h
+++ b/target/hexagon/insn.h
@@ -57,6 +57,7 @@ struct Packet {
/* Pre-decodes about COF */
bool pkt_has_cof; /* Has any change-of-flow */
+ bool pkt_has_multi_cof; /* Has more than one change-of-flow */
bool pkt_has_endloop;
bool pkt_has_dczeroa;
diff --git a/target/hexagon/macros.h b/target/hexagon/macros.h
index 93ee4739a1..8fd8123cec 100644
--- a/target/hexagon/macros.h
+++ b/target/hexagon/macros.h
@@ -407,7 +407,7 @@ static inline TCGv gen_read_ireg(TCGv result, TCGv val, int shift)
#define fCHECK_PCALIGN(A)
-#define fWRITE_NPC(A) write_new_pc(env, A)
+#define fWRITE_NPC(A) write_new_pc(env, pkt_has_multi_cof != 0, A)
#define fBRANCH(LOC, TYPE) fWRITE_NPC(LOC)
#define fJUMPR(REGNO, TARGET, TYPE) fBRANCH(TARGET, COF_TYPE_JUMPR)
diff --git a/target/hexagon/decode.c b/target/hexagon/decode.c
index 6b73b5c60c..041c8de751 100644
--- a/target/hexagon/decode.c
+++ b/target/hexagon/decode.c
@@ -388,6 +388,7 @@ static void decode_set_insn_attr_fields(Packet *pkt)
uint16_t opcode;
pkt->pkt_has_cof = false;
+ pkt->pkt_has_multi_cof = false;
pkt->pkt_has_endloop = false;
pkt->pkt_has_dczeroa = false;
@@ -412,13 +413,23 @@ static void decode_set_insn_attr_fields(Packet *pkt)
}
}
- pkt->pkt_has_cof |= decode_opcode_can_jump(opcode);
+ if (decode_opcode_can_jump(opcode)) {
+ if (pkt->pkt_has_cof) {
+ pkt->pkt_has_multi_cof = true;
+ }
+ pkt->pkt_has_cof = true;
+ }
pkt->insn[i].is_endloop = decode_opcode_ends_loop(opcode);
pkt->pkt_has_endloop |= pkt->insn[i].is_endloop;
- pkt->pkt_has_cof |= pkt->pkt_has_endloop;
+ if (pkt->pkt_has_endloop) {
+ if (pkt->pkt_has_cof) {
+ pkt->pkt_has_multi_cof = true;
+ }
+ pkt->pkt_has_cof = true;
+ }
}
}
diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c
index 085afc3274..84391e25eb 100644
--- a/target/hexagon/op_helper.c
+++ b/target/hexagon/op_helper.c
@@ -104,20 +104,26 @@ static void log_store64(CPUHexagonState *env, target_ulong addr,
env->mem_log_stores[slot].data64 = val;
}
-static void write_new_pc(CPUHexagonState *env, target_ulong addr)
+static void write_new_pc(CPUHexagonState *env, bool pkt_has_multi_cof,
+ target_ulong addr)
{
HEX_DEBUG_LOG("write_new_pc(0x" TARGET_FMT_lx ")\n", addr);
- /*
- * If more than one branch is taken in a packet, only the first one
- * is actually done.
- */
- if (env->branch_taken) {
- HEX_DEBUG_LOG("INFO: multiple branches taken in same packet, "
- "ignoring the second one\n");
+ if (pkt_has_multi_cof) {
+ /*
+ * If more than one branch is taken in a packet, only the first one
+ * is actually done.
+ */
+ if (env->branch_taken) {
+ HEX_DEBUG_LOG("INFO: multiple branches taken in same packet, "
+ "ignoring the second one\n");
+ } else {
+ fCHECK_PCALIGN(addr);
+ env->next_PC = addr;
+ env->branch_taken = 1;
+ }
} else {
fCHECK_PCALIGN(addr);
- env->branch_taken = 1;
env->next_PC = addr;
}
}
diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c
index 0940d0f2c1..1d872d72b6 100644
--- a/target/hexagon/translate.c
+++ b/target/hexagon/translate.c
@@ -248,7 +248,9 @@ static void gen_start_packet(DisasContext *ctx)
tcg_gen_movi_tl(hex_slot_cancelled, 0);
}
if (pkt->pkt_has_cof) {
- tcg_gen_movi_tl(hex_branch_taken, 0);
+ if (pkt->pkt_has_multi_cof) {
+ tcg_gen_movi_tl(hex_branch_taken, 0);
+ }
tcg_gen_movi_tl(hex_next_PC, next_PC);
}
if (need_pred_written(pkt)) {
diff --git a/target/hexagon/gen_helper_funcs.py b/target/hexagon/gen_helper_funcs.py
index a446c45384..c4fc609b31 100755
--- a/target/hexagon/gen_helper_funcs.py
+++ b/target/hexagon/gen_helper_funcs.py
@@ -1,7 +1,7 @@
#!/usr/bin/env python3
##
-## Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
+## Copyright(c) 2019-2022 Qualcomm Innovation Center, Inc. All Rights Reserved.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
@@ -238,6 +238,9 @@ def gen_helper_function(f, tag, tagregs, tagimms):
gen_helper_arg_imm(f,immlett)
i += 1
+ if (hex_common.need_pkt_has_multi_cof(tag)):
+ f.write(", uint32_t pkt_has_multi_cof")
+
if hex_common.need_slot(tag):
if i > 0: f.write(", ")
f.write("uint32_t slot")
diff --git a/target/hexagon/gen_helper_protos.py b/target/hexagon/gen_helper_protos.py
index 3b4e993fd1..8c6b36d8d8 100755
--- a/target/hexagon/gen_helper_protos.py
+++ b/target/hexagon/gen_helper_protos.py
@@ -1,7 +1,7 @@
#!/usr/bin/env python3
##
-## Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
+## Copyright(c) 2019-2022 Qualcomm Innovation Center, Inc. All Rights Reserved.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
@@ -82,6 +82,7 @@ def gen_helper_prototype(f, tag, tagregs, tagimms):
## Figure out how many arguments the helper will take
if (numscalarresults == 0):
def_helper_size = len(regs)+len(imms)+numscalarreadwrite+1
+ if hex_common.need_pkt_has_multi_cof(tag): def_helper_size += 1
if hex_common.need_part1(tag): def_helper_size += 1
if hex_common.need_slot(tag): def_helper_size += 1
f.write('DEF_HELPER_%s(%s' % (def_helper_size, tag))
@@ -89,6 +90,7 @@ def gen_helper_prototype(f, tag, tagregs, tagimms):
f.write(', void' )
else:
def_helper_size = len(regs)+len(imms)+numscalarreadwrite
+ if hex_common.need_pkt_has_multi_cof(tag): def_helper_size += 1
if hex_common.need_part1(tag): def_helper_size += 1
if hex_common.need_slot(tag): def_helper_size += 1
f.write('DEF_HELPER_%s(%s' % (def_helper_size, tag))
@@ -126,7 +128,9 @@ def gen_helper_prototype(f, tag, tagregs, tagimms):
for immlett,bits,immshift in imms:
f.write(", s32")
- ## Add the arguments for the instruction slot and part1 (if needed)
+ ## Add the arguments for the instruction pkt_has_multi_cof, slot and
+ ## part1 (if needed)
+ if hex_common.need_pkt_has_multi_cof(tag): f.write(', i32')
if hex_common.need_slot(tag): f.write(', i32' )
if hex_common.need_part1(tag): f.write(' , i32' )
f.write(')\n')
diff --git a/target/hexagon/gen_tcg_funcs.py b/target/hexagon/gen_tcg_funcs.py
index ca5fde91cc..bd199dcbf1 100755
--- a/target/hexagon/gen_tcg_funcs.py
+++ b/target/hexagon/gen_tcg_funcs.py
@@ -622,6 +622,9 @@ def gen_tcg_func(f, tag, regs, imms):
## Generate the call to the helper
for immlett,bits,immshift in imms:
gen_helper_decl_imm(f,immlett)
+ if hex_common.need_pkt_has_multi_cof(tag):
+ f.write(" TCGv pkt_has_multi_cof = ")
+ f.write("tcg_constant_tl(ctx->pkt->pkt_has_multi_cof);\n")
if hex_common.need_part1(tag):
f.write(" TCGv part1 = tcg_constant_tl(insn->part1);\n")
if hex_common.need_slot(tag):
@@ -654,6 +657,8 @@ def gen_tcg_func(f, tag, regs, imms):
for immlett,bits,immshift in imms:
gen_helper_call_imm(f,immlett)
+ if hex_common.need_pkt_has_multi_cof(tag):
+ f.write(", pkt_has_multi_cof")
if hex_common.need_slot(tag): f.write(", slot")
if hex_common.need_part1(tag): f.write(", part1" )
f.write(");\n")
diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py
index d9ba7df786..f5b58501db 100755
--- a/target/hexagon/hex_common.py
+++ b/target/hexagon/hex_common.py
@@ -207,6 +207,9 @@ def need_part1(tag):
def need_ea(tag):
return re.compile(r"\bEA\b").search(semdict[tag])
+def need_pkt_has_multi_cof(tag):
+ return 'A_COF' in attribdict[tag]
+
def skip_qemu_helper(tag):
return tag in overrides.keys()
--
2.17.1
next prev parent reply other threads:[~2022-12-16 20:54 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-16 20:48 [PULL 00/21] Hexagon update: bug fixes, performance, idef-parser Taylor Simpson
2022-12-16 20:48 ` [PULL 01/21] Hexagon (target/hexagon) Add pkt and insn to DisasContext Taylor Simpson
2022-12-16 20:48 ` [PULL 02/21] Hexagon (target/hexagon) Fix predicated assignment to .tmp and .cur Taylor Simpson
2022-12-16 20:48 ` [PULL 03/21] Hexagon (target/hexagon) Add overrides for S2_asr_r_r_sat/S2_asl_r_r_sat Taylor Simpson
2022-12-16 20:48 ` Taylor Simpson [this message]
2022-12-16 20:48 ` [PULL 05/21] Hexagon (target/hexagon) Remove PC from the runtime state Taylor Simpson
2022-12-16 20:48 ` [PULL 06/21] Hexagon (target/hexagon) Remove next_PC from " Taylor Simpson
2022-12-16 20:48 ` [PULL 07/21] Hexagon (target/hexagon) Add overrides for direct call instructions Taylor Simpson
2022-12-16 20:48 ` [PULL 08/21] Hexagon (target/hexagon) Add overrides for compound compare and jump Taylor Simpson
2022-12-16 20:48 ` [PULL 09/21] Hexagon (target/hexagon) Add overrides for various forms of jump Taylor Simpson
2022-12-16 20:48 ` [PULL 10/21] Hexagon (target/hexagon) Use direct block chaining for direct jump/branch Taylor Simpson
2022-12-16 20:48 ` [PULL 11/21] Hexagon (target/hexagon) Use direct block chaining for tight loops Taylor Simpson
2022-12-16 20:48 ` [PULL 12/21] target/hexagon: update MAINTAINERS for idef-parser Taylor Simpson
2022-12-16 20:48 ` [PULL 13/21] target/hexagon: import README " Taylor Simpson
2022-12-16 20:48 ` [PULL 14/21] target/hexagon: make slot number an unsigned Taylor Simpson
2022-12-16 20:48 ` [PULL 15/21] target/hexagon: make helper functions non-static Taylor Simpson
2022-12-16 20:48 ` [PULL 16/21] target/hexagon: introduce new helper functions Taylor Simpson
2022-12-16 20:48 ` [PULL 17/21] target/hexagon: prepare input for the idef-parser Taylor Simpson
2022-12-29 10:41 ` Thomas Huth
2022-12-31 14:00 ` Alessandro Di Federico via
2022-12-16 20:48 ` [PULL 18/21] target/hexagon: import lexer for idef-parser Taylor Simpson
2022-12-16 20:48 ` [PULL 19/21] target/hexagon: import parser " Taylor Simpson
2023-06-23 12:50 ` Peter Maydell
2023-06-26 9:54 ` Anton Johansson via
2022-12-16 20:48 ` [PULL 20/21] target/hexagon: call idef-parser functions Taylor Simpson
2022-12-16 20:48 ` [PULL 21/21] target/hexagon: import additional tests Taylor Simpson
2022-12-17 21:21 ` [PULL 00/21] Hexagon update: bug fixes, performance, idef-parser Peter Maydell
2022-12-18 9:33 ` Anton Johansson via
2022-12-18 13:52 ` Peter Maydell
2022-12-18 15:34 ` Anton Johansson via
2022-12-18 16:53 ` Richard Henderson
2022-12-18 17:01 ` Peter Maydell
2022-12-19 11:18 ` Philippe Mathieu-Daudé
2022-12-19 10:28 ` Peter Maydell
2022-12-19 18:54 ` Taylor Simpson
2022-12-20 12:49 ` Alessandro Di Federico via
2022-12-19 23:19 ` Philippe Mathieu-Daudé
2022-12-20 7:30 ` Philippe Mathieu-Daudé
2022-12-20 12:51 ` Alessandro Di Federico via
2022-12-20 14:19 ` Philippe Mathieu-Daudé
2022-12-20 18:13 ` Taylor Simpson
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