From: Rob Herring <robh@kernel.org>
To: Eugen Hristev <eugen.hristev@microchip.com>
Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
luis.oliveira@synopsys.com
Subject: Re: [PATCH v5 2/4] dt-bindings: phy: Document the Synopsys MIPI DPHY Rx bindings
Date: Fri, 16 Dec 2022 17:42:20 -0600 [thread overview]
Message-ID: <20221216234220.GB80712-robh@kernel.org> (raw)
In-Reply-To: <20221216143717.1002015-3-eugen.hristev@microchip.com>
On Fri, Dec 16, 2022 at 04:37:15PM +0200, Eugen Hristev wrote:
> From: Luis Oliveira <Luis.Oliveira@synopsys.com>
>
> Add device-tree bindings documentation for SNPS DesignWare MIPI D-PHY in
> RX mode.
>
> Signed-off-by: Luis Oliveira <luis.oliveira@synopsys.com>
> ---
> .../bindings/phy/snps,dw-dphy-rx.txt | 29 +++++++++++++++++++
> 1 file changed, 29 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.txt
>
> diff --git a/Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.txt b/Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.txt
> new file mode 100644
> index 000000000000..ffb64fe5cbd1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.txt
> @@ -0,0 +1,29 @@
> +Synopsys DesignWare MIPI Rx D-PHY block details
> +
> +Description
> +-----------
> +
> +The Synopsys MIPI D-PHY controller supports MIPI-DPHY in receiver mode.
> +Please refer to phy-bindings.txt for more information.
> +
> +Required properties:
> +- compatible : Shall be "snps,dw-dphy-rx".
> +- #phy-cells : Must be 1.
There is more than 1 lane/phy for a single instance?
> +- bus-width : Size of the test interface data bus (8 bits->8 or
> + 12bits->12).
Do we need a test interface upstream?
If so, needs a vendor prefix.
> +- snps,dphy-frequency : Frequency at which D-PHY should start, configurable.
> + Check Synopsys databook. (-kHz)
Is this frequency of the link? We have properties for that. Or this
should somehow be using the clock binding.
And anything with units should have a unit suffix as defined in
property-units.yaml.
> +- reg : Test interface register. This correspondes to the
> + physical base address of the controller and size of
> + the device memory mapped registers; Check Synopsys
> + databook.
> +
> +Example:
> +
> + mipi_dphy_rx1: dphy@d00003040 {
> + compatible = "snps,dw-dphy-rx";
> + #phy-cells = <1>;
> + bus-width = <12>;
> + snps,dphy-frequency = <300000>;
> + reg = <0xd0003040 0x20>;
> + };
> --
> 2.25.1
>
>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Eugen Hristev <eugen.hristev@microchip.com>
Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
luis.oliveira@synopsys.com
Subject: Re: [PATCH v5 2/4] dt-bindings: phy: Document the Synopsys MIPI DPHY Rx bindings
Date: Fri, 16 Dec 2022 17:42:20 -0600 [thread overview]
Message-ID: <20221216234220.GB80712-robh@kernel.org> (raw)
In-Reply-To: <20221216143717.1002015-3-eugen.hristev@microchip.com>
On Fri, Dec 16, 2022 at 04:37:15PM +0200, Eugen Hristev wrote:
> From: Luis Oliveira <Luis.Oliveira@synopsys.com>
>
> Add device-tree bindings documentation for SNPS DesignWare MIPI D-PHY in
> RX mode.
>
> Signed-off-by: Luis Oliveira <luis.oliveira@synopsys.com>
> ---
> .../bindings/phy/snps,dw-dphy-rx.txt | 29 +++++++++++++++++++
> 1 file changed, 29 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.txt
>
> diff --git a/Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.txt b/Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.txt
> new file mode 100644
> index 000000000000..ffb64fe5cbd1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/snps,dw-dphy-rx.txt
> @@ -0,0 +1,29 @@
> +Synopsys DesignWare MIPI Rx D-PHY block details
> +
> +Description
> +-----------
> +
> +The Synopsys MIPI D-PHY controller supports MIPI-DPHY in receiver mode.
> +Please refer to phy-bindings.txt for more information.
> +
> +Required properties:
> +- compatible : Shall be "snps,dw-dphy-rx".
> +- #phy-cells : Must be 1.
There is more than 1 lane/phy for a single instance?
> +- bus-width : Size of the test interface data bus (8 bits->8 or
> + 12bits->12).
Do we need a test interface upstream?
If so, needs a vendor prefix.
> +- snps,dphy-frequency : Frequency at which D-PHY should start, configurable.
> + Check Synopsys databook. (-kHz)
Is this frequency of the link? We have properties for that. Or this
should somehow be using the clock binding.
And anything with units should have a unit suffix as defined in
property-units.yaml.
> +- reg : Test interface register. This correspondes to the
> + physical base address of the controller and size of
> + the device memory mapped registers; Check Synopsys
> + databook.
> +
> +Example:
> +
> + mipi_dphy_rx1: dphy@d00003040 {
> + compatible = "snps,dw-dphy-rx";
> + #phy-cells = <1>;
> + bus-width = <12>;
> + snps,dphy-frequency = <300000>;
> + reg = <0xd0003040 0x20>;
> + };
> --
> 2.25.1
>
>
next prev parent reply other threads:[~2022-12-16 23:43 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-16 14:37 [PATCH v5 0/4] media: dwc: add csi2host driver Eugen Hristev
2022-12-16 14:37 ` Eugen Hristev
2022-12-16 14:37 ` [PATCH v5 1/4] dt-bindings: media: Document bindings for DW MIPI CSI-2 Host Eugen Hristev
2022-12-16 14:37 ` Eugen Hristev
2022-12-16 23:35 ` Rob Herring
2022-12-16 23:35 ` Rob Herring
2022-12-20 14:16 ` Krzysztof Kozlowski
2022-12-20 14:16 ` Krzysztof Kozlowski
2022-12-20 14:36 ` Eugen.Hristev
2022-12-20 14:36 ` Eugen.Hristev
2022-12-16 14:37 ` [PATCH v5 2/4] dt-bindings: phy: Document the Synopsys MIPI DPHY Rx bindings Eugen Hristev
2022-12-16 14:37 ` Eugen Hristev
2022-12-16 23:37 ` Rob Herring
2022-12-16 23:37 ` Rob Herring
2022-12-20 14:38 ` Eugen.Hristev
2022-12-20 14:38 ` Eugen.Hristev
2022-12-16 23:42 ` Rob Herring [this message]
2022-12-16 23:42 ` Rob Herring
2022-12-16 14:37 ` [PATCH v5 3/4] media: platform: dwc: Add MIPI CSI-2 controller driver Eugen Hristev
2022-12-16 14:37 ` Eugen Hristev
2022-12-16 19:24 ` kernel test robot
2022-12-16 19:24 ` kernel test robot
2023-03-14 14:20 ` Sakari Ailus
2023-03-14 14:20 ` Sakari Ailus
2023-03-14 15:35 ` Conor Dooley
2023-03-14 15:35 ` Conor Dooley
2022-12-16 14:37 ` [PATCH v5 4/4] media: platform: dwc: Add DW MIPI DPHY Rx driver Eugen Hristev
2022-12-16 14:37 ` Eugen Hristev
2022-12-16 18:23 ` kernel test robot
2022-12-16 18:23 ` kernel test robot
2022-12-16 22:16 ` kernel test robot
2022-12-16 22:16 ` kernel test robot
2023-03-14 14:00 ` Sakari Ailus
2023-03-14 14:00 ` Sakari Ailus
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