From: Chester Lin <clin@suse.com>
To: "Linus Walleij" <linus.walleij@linaro.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Dong Aisheng" <aisheng.dong@nxp.com>,
"Fabio Estevam" <festevam@gmail.com>,
"Shawn Guo" <shawnguo@kernel.org>, "Jacky Bai" <ping.bai@nxp.com>,
"Andreas Färber" <afaerber@suse.de>
Cc: Chester Lin <clin@suse.com>,
s32@nxp.com, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Larisa Grigore <larisa.grigore@nxp.com>,
Ghennadi Procopciuc <Ghennadi.Procopciuc@oss.nxp.com>,
Andrei Stefanescu <andrei.stefanescu@nxp.com>,
Radu Pirea <radu-nicolae.pirea@nxp.com>,
Matthias Brugger <mbrugger@suse.com>
Subject: [PATCH v3 0/2] Add pinctrl support for S32 SoC family
Date: Wed, 21 Dec 2022 15:32:30 +0800 [thread overview]
Message-ID: <20221221073232.21888-1-clin@suse.com> (raw)
Hello,
Here I want to introduce a new patch series, which aims to support IOMUX
functions provided by SIUL2 [System Integration Unit Lite2] on S32 SoCs,
such as S32G2. This series is originally from NXP's implementation on
CodeAurora[1] and it will be required by upstream kernel for supporting
a variety of devices on S32 SoCs which need to config PINMUXs, such as
PHYs and MAC controllers.
Thanks,
Chester
Changes in v3:
- dt-bindings:
- Remove the minItems from reg because there's no optional item for
s32g2.
- List supported properties of pinmux-node and pincfg-node and add more
descriptions.
- Adjust the location of "required:".
- Fix descriptions and wordings.
- Rename the yaml file to nxp,s32g2-siul2-pinctrl.yaml.
- Rename pinctrl-s32g.c to pinctrl-s32g2.c
- Adjust Kconfig options [menu-invisible] and names [S32G -> S32G2].
- Add .suppress_bind_attrs
- Drop the .remove callback and replace the module_platform_driver() call
with builtin_platform_driver()
Changes in v2:
- Move the "nxp,pins" ID range information from DT to the driver.
- dt-bindings:
- Fix schema issues.
- Add descriptions for reg entries.
- Revise the example.
- Refine the compatible name from "nxp,s32g-..." to "nxp,s32g2-...".
- Fix the copyright format suggested by NXP.
[1] https://source.codeaurora.org/external/autobsps32/linux/tree/drivers/pinctrl/freescale?h=bsp34.0-5.10.120-rt
Chester Lin (2):
dt-bindings: pinctrl: add schema for NXP S32 SoCs
pinctrl: add NXP S32 SoC family support
.../pinctrl/nxp,s32g2-siul2-pinctrl.yaml | 129 +++
drivers/pinctrl/freescale/Kconfig | 14 +
drivers/pinctrl/freescale/Makefile | 2 +
drivers/pinctrl/freescale/pinctrl-s32.h | 76 ++
drivers/pinctrl/freescale/pinctrl-s32cc.c | 983 ++++++++++++++++++
drivers/pinctrl/freescale/pinctrl-s32g2.c | 773 ++++++++++++++
6 files changed, 1977 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml
create mode 100644 drivers/pinctrl/freescale/pinctrl-s32.h
create mode 100644 drivers/pinctrl/freescale/pinctrl-s32cc.c
create mode 100644 drivers/pinctrl/freescale/pinctrl-s32g2.c
--
2.37.3
WARNING: multiple messages have this Message-ID (diff)
From: Chester Lin <clin@suse.com>
To: "Linus Walleij" <linus.walleij@linaro.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Dong Aisheng" <aisheng.dong@nxp.com>,
"Fabio Estevam" <festevam@gmail.com>,
"Shawn Guo" <shawnguo@kernel.org>, "Jacky Bai" <ping.bai@nxp.com>,
"Andreas Färber" <afaerber@suse.de>
Cc: Chester Lin <clin@suse.com>,
s32@nxp.com, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Larisa Grigore <larisa.grigore@nxp.com>,
Ghennadi Procopciuc <Ghennadi.Procopciuc@oss.nxp.com>,
Andrei Stefanescu <andrei.stefanescu@nxp.com>,
Radu Pirea <radu-nicolae.pirea@nxp.com>,
Matthias Brugger <mbrugger@suse.com>
Subject: [PATCH v3 0/2] Add pinctrl support for S32 SoC family
Date: Wed, 21 Dec 2022 15:32:30 +0800 [thread overview]
Message-ID: <20221221073232.21888-1-clin@suse.com> (raw)
Hello,
Here I want to introduce a new patch series, which aims to support IOMUX
functions provided by SIUL2 [System Integration Unit Lite2] on S32 SoCs,
such as S32G2. This series is originally from NXP's implementation on
CodeAurora[1] and it will be required by upstream kernel for supporting
a variety of devices on S32 SoCs which need to config PINMUXs, such as
PHYs and MAC controllers.
Thanks,
Chester
Changes in v3:
- dt-bindings:
- Remove the minItems from reg because there's no optional item for
s32g2.
- List supported properties of pinmux-node and pincfg-node and add more
descriptions.
- Adjust the location of "required:".
- Fix descriptions and wordings.
- Rename the yaml file to nxp,s32g2-siul2-pinctrl.yaml.
- Rename pinctrl-s32g.c to pinctrl-s32g2.c
- Adjust Kconfig options [menu-invisible] and names [S32G -> S32G2].
- Add .suppress_bind_attrs
- Drop the .remove callback and replace the module_platform_driver() call
with builtin_platform_driver()
Changes in v2:
- Move the "nxp,pins" ID range information from DT to the driver.
- dt-bindings:
- Fix schema issues.
- Add descriptions for reg entries.
- Revise the example.
- Refine the compatible name from "nxp,s32g-..." to "nxp,s32g2-...".
- Fix the copyright format suggested by NXP.
[1] https://source.codeaurora.org/external/autobsps32/linux/tree/drivers/pinctrl/freescale?h=bsp34.0-5.10.120-rt
Chester Lin (2):
dt-bindings: pinctrl: add schema for NXP S32 SoCs
pinctrl: add NXP S32 SoC family support
.../pinctrl/nxp,s32g2-siul2-pinctrl.yaml | 129 +++
drivers/pinctrl/freescale/Kconfig | 14 +
drivers/pinctrl/freescale/Makefile | 2 +
drivers/pinctrl/freescale/pinctrl-s32.h | 76 ++
drivers/pinctrl/freescale/pinctrl-s32cc.c | 983 ++++++++++++++++++
drivers/pinctrl/freescale/pinctrl-s32g2.c | 773 ++++++++++++++
6 files changed, 1977 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml
create mode 100644 drivers/pinctrl/freescale/pinctrl-s32.h
create mode 100644 drivers/pinctrl/freescale/pinctrl-s32cc.c
create mode 100644 drivers/pinctrl/freescale/pinctrl-s32g2.c
--
2.37.3
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next reply other threads:[~2022-12-21 7:32 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-21 7:32 Chester Lin [this message]
2022-12-21 7:32 ` [PATCH v3 0/2] Add pinctrl support for S32 SoC family Chester Lin
2022-12-21 7:32 ` [PATCH v3 1/2] dt-bindings: pinctrl: add schema for NXP S32 SoCs Chester Lin
2022-12-21 7:32 ` Chester Lin
2022-12-21 12:28 ` Andrei Stefanescu
2022-12-21 12:28 ` Andrei Stefanescu
2022-12-21 12:30 ` Krzysztof Kozlowski
2022-12-21 12:30 ` Krzysztof Kozlowski
2022-12-21 13:52 ` Chester Lin
2022-12-21 13:52 ` Chester Lin
2022-12-22 11:28 ` Krzysztof Kozlowski
2022-12-22 11:28 ` Krzysztof Kozlowski
2023-01-09 7:04 ` Chester Lin
2023-01-09 7:04 ` Chester Lin
2023-01-09 9:08 ` Krzysztof Kozlowski
2023-01-09 9:08 ` Krzysztof Kozlowski
2022-12-21 7:32 ` [PATCH v3 2/2] pinctrl: add NXP S32 SoC family support Chester Lin
2022-12-21 7:32 ` Chester Lin
2023-01-09 13:29 ` Linus Walleij
2023-01-09 13:29 ` Linus Walleij
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