From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Bin Meng" <bin.meng@windriver.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Bin Meng" <bmeng@tinylab.org>
Subject: [PATCH v5 08/11] hw/riscv/boot.c: use MachineState in riscv_load_initrd()
Date: Mon, 2 Jan 2023 08:52:38 -0300 [thread overview]
Message-ID: <20230102115241.25733-9-dbarboza@ventanamicro.com> (raw)
In-Reply-To: <20230102115241.25733-1-dbarboza@ventanamicro.com>
'filename', 'mem_size' and 'fdt' from riscv_load_initrd() can all be
retrieved by the MachineState object for all callers.
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
---
hw/riscv/boot.c | 6 ++++--
hw/riscv/microchip_pfsoc.c | 3 +--
hw/riscv/sifive_u.c | 3 +--
hw/riscv/spike.c | 3 +--
hw/riscv/virt.c | 3 +--
include/hw/riscv/boot.h | 3 +--
6 files changed, 9 insertions(+), 12 deletions(-)
diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
index 6b948d1c9e..d3e780c3b6 100644
--- a/hw/riscv/boot.c
+++ b/hw/riscv/boot.c
@@ -208,9 +208,11 @@ target_ulong riscv_load_kernel(const char *kernel_filename,
exit(1);
}
-void riscv_load_initrd(const char *filename, uint64_t mem_size,
- uint64_t kernel_entry, void *fdt)
+void riscv_load_initrd(MachineState *machine, uint64_t kernel_entry)
{
+ const char *filename = machine->initrd_filename;
+ uint64_t mem_size = machine->ram_size;
+ void *fdt = machine->fdt;
hwaddr start, end;
ssize_t size;
diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c
index 593a799549..1e9b0a420e 100644
--- a/hw/riscv/microchip_pfsoc.c
+++ b/hw/riscv/microchip_pfsoc.c
@@ -633,8 +633,7 @@ static void microchip_icicle_kit_machine_init(MachineState *machine)
kernel_start_addr, NULL);
if (machine->initrd_filename) {
- riscv_load_initrd(machine->initrd_filename, machine->ram_size,
- kernel_entry, machine->fdt);
+ riscv_load_initrd(machine, kernel_entry);
}
if (machine->kernel_cmdline && *machine->kernel_cmdline) {
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 3e6df87b5b..c40885ed5c 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -602,8 +602,7 @@ static void sifive_u_machine_init(MachineState *machine)
kernel_start_addr, NULL);
if (machine->initrd_filename) {
- riscv_load_initrd(machine->initrd_filename, machine->ram_size,
- kernel_entry, machine->fdt);
+ riscv_load_initrd(machine, kernel_entry);
}
if (machine->kernel_cmdline && *machine->kernel_cmdline) {
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 60e2912be5..99dec74fe8 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -312,8 +312,7 @@ static void spike_board_init(MachineState *machine)
htif_symbol_callback);
if (machine->initrd_filename) {
- riscv_load_initrd(machine->initrd_filename, machine->ram_size,
- kernel_entry, machine->fdt);
+ riscv_load_initrd(machine, kernel_entry);
}
if (machine->kernel_cmdline && *machine->kernel_cmdline) {
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 6c946b6def..02f1369843 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -1285,8 +1285,7 @@ static void virt_machine_done(Notifier *notifier, void *data)
kernel_start_addr, NULL);
if (machine->initrd_filename) {
- riscv_load_initrd(machine->initrd_filename, machine->ram_size,
- kernel_entry, machine->fdt);
+ riscv_load_initrd(machine, kernel_entry);
}
if (machine->kernel_cmdline && *machine->kernel_cmdline) {
diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h
index e37e1d1238..cfd72ecabf 100644
--- a/include/hw/riscv/boot.h
+++ b/include/hw/riscv/boot.h
@@ -46,8 +46,7 @@ target_ulong riscv_load_firmware(const char *firmware_filename,
target_ulong riscv_load_kernel(const char *kernel_filename,
target_ulong firmware_end_addr,
symbol_fn_t sym_cb);
-void riscv_load_initrd(const char *filename, uint64_t mem_size,
- uint64_t kernel_entry, void *fdt);
+void riscv_load_initrd(MachineState *machine, uint64_t kernel_entry);
uint64_t riscv_load_fdt(hwaddr dram_start, uint64_t dram_size, void *fdt);
void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts,
hwaddr saddr,
--
2.39.0
next prev parent reply other threads:[~2023-01-02 11:53 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-02 11:52 [PATCH v5 00/11] riscv: OpenSBI boot test and cleanups Daniel Henrique Barboza
2023-01-02 11:52 ` [PATCH v5 01/11] tests/avocado: add RISC-V OpenSBI boot test Daniel Henrique Barboza
2023-01-10 22:28 ` Alistair Francis
2023-01-02 11:52 ` [PATCH v5 02/11] hw/riscv/spike: use 'fdt' from MachineState Daniel Henrique Barboza
2023-01-02 11:52 ` [PATCH v5 03/11] hw/riscv/sifive_u: " Daniel Henrique Barboza
2023-01-02 11:52 ` [PATCH v5 04/11] hw/riscv/boot.c: exit early if filename is NULL in load functions Daniel Henrique Barboza
2023-01-08 3:30 ` Bin Meng
2023-01-10 22:29 ` Alistair Francis
2023-01-02 11:52 ` [PATCH v5 05/11] hw/riscv/spike.c: load initrd right after riscv_load_kernel() Daniel Henrique Barboza
2023-01-02 11:52 ` [PATCH v5 06/11] hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd() Daniel Henrique Barboza
2023-01-10 22:35 ` Alistair Francis
2023-01-02 11:52 ` [PATCH v5 07/11] hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel() Daniel Henrique Barboza
2023-01-10 22:37 ` Alistair Francis
2023-01-02 11:52 ` Daniel Henrique Barboza [this message]
2023-01-10 22:39 ` [PATCH v5 08/11] hw/riscv/boot.c: use MachineState in riscv_load_initrd() Alistair Francis
2023-01-02 11:52 ` [PATCH v5 09/11] hw/riscv/boot.c: use MachineState in riscv_load_kernel() Daniel Henrique Barboza
2023-01-10 22:40 ` Alistair Francis
2023-01-02 11:52 ` [PATCH v5 10/11] hw/riscv/boot.c: consolidate all kernel init " Daniel Henrique Barboza
2023-01-08 3:33 ` Bin Meng
2023-01-10 11:43 ` Daniel Henrique Barboza
2023-01-10 20:20 ` Daniel Henrique Barboza
2023-01-10 22:45 ` Alistair Francis
2023-01-10 22:42 ` Alistair Francis
2023-01-12 0:34 ` Alistair Francis
2023-01-12 13:24 ` Daniel Henrique Barboza
2023-01-13 5:23 ` Bin Meng
2023-01-13 7:16 ` Philippe Mathieu-Daudé
2023-01-13 10:21 ` Daniel Henrique Barboza
2023-01-13 10:30 ` Bin Meng
2023-01-13 10:49 ` Daniel Henrique Barboza
2023-01-02 11:52 ` [PATCH v5 11/11] hw/riscv/boot.c: make riscv_load_initrd() static Daniel Henrique Barboza
2023-01-10 22:41 ` Alistair Francis
2023-01-11 5:08 ` [PATCH v5 00/11] riscv: OpenSBI boot test and cleanups Alistair Francis
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