From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH v2 2/6] dt-bindings: riscv: Document cboz-block-size
Date: Sun, 22 Jan 2023 20:13:24 +0100 [thread overview]
Message-ID: <20230122191328.1193885-3-ajones@ventanamicro.com> (raw)
In-Reply-To: <20230122191328.1193885-1-ajones@ventanamicro.com>
The Zicboz operates on a block-size defined for the cpu-core,
which does not necessarily match other cache-sizes used.
So add the necessary property for the system to know the core's
block-size.
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
Documentation/devicetree/bindings/riscv/cpus.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index c6720764e765..f4ee70f8e1cf 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -72,6 +72,11 @@ properties:
description:
The blocksize in bytes for the Zicbom cache operations.
+ riscv,cboz-block-size:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ The blocksize in bytes for the Zicboz cache operations.
+
riscv,isa:
description:
Identifies the specific RISC-V instruction set architecture
--
2.39.0
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: linux-riscv@lists.infradead.org, kvm-riscv@lists.infradead.org
Cc: 'Atish Patra ' <atishp@rivosinc.com>,
'Jisheng Zhang ' <jszhang@kernel.org>,
'Palmer Dabbelt ' <palmer@dabbelt.com>,
'Albert Ou ' <aou@eecs.berkeley.edu>,
'Paul Walmsley ' <paul.walmsley@sifive.com>,
'Conor Dooley ' <conor.dooley@microchip.com>,
'Heiko Stuebner ' <heiko@sntech.de>,
'Anup Patel ' <apatel@ventanamicro.com>,
Rob Herring <robh@kernel.org>
Subject: [PATCH v2 2/6] dt-bindings: riscv: Document cboz-block-size
Date: Sun, 22 Jan 2023 20:13:24 +0100 [thread overview]
Message-ID: <20230122191328.1193885-3-ajones@ventanamicro.com> (raw)
In-Reply-To: <20230122191328.1193885-1-ajones@ventanamicro.com>
The Zicboz operates on a block-size defined for the cpu-core,
which does not necessarily match other cache-sizes used.
So add the necessary property for the system to know the core's
block-size.
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
Documentation/devicetree/bindings/riscv/cpus.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index c6720764e765..f4ee70f8e1cf 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -72,6 +72,11 @@ properties:
description:
The blocksize in bytes for the Zicbom cache operations.
+ riscv,cboz-block-size:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ The blocksize in bytes for the Zicboz cache operations.
+
riscv,isa:
description:
Identifies the specific RISC-V instruction set architecture
--
2.39.0
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next prev parent reply other threads:[~2023-01-22 19:13 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-22 19:13 [PATCH v2 0/6] RISC-V: Apply Zicboz to clear_page Andrew Jones
2023-01-22 19:13 ` Andrew Jones
2023-01-22 19:13 ` [PATCH v2 1/6] RISC-V: Factor out body of riscv_init_cbom_blocksize loop Andrew Jones
2023-01-22 19:13 ` Andrew Jones
2023-01-22 19:13 ` Andrew Jones [this message]
2023-01-22 19:13 ` [PATCH v2 2/6] dt-bindings: riscv: Document cboz-block-size Andrew Jones
2023-01-23 8:10 ` Conor Dooley
2023-01-23 8:10 ` Conor Dooley
2023-01-23 9:44 ` Andrew Jones
2023-01-23 9:44 ` Andrew Jones
2023-01-23 9:44 ` Andrew Jones
2023-01-23 15:57 ` Krzysztof Kozlowski
2023-01-23 15:57 ` Krzysztof Kozlowski
2023-01-23 15:57 ` Krzysztof Kozlowski
2023-01-23 14:33 ` Rob Herring
2023-01-23 14:33 ` Rob Herring
2023-01-23 15:54 ` Andrew Jones
2023-01-23 15:54 ` Andrew Jones
2023-01-23 15:54 ` Andrew Jones
2023-01-23 18:25 ` Conor Dooley
2023-01-23 18:25 ` Conor Dooley
2023-01-23 18:25 ` Conor Dooley
2023-01-24 5:35 ` Andrew Jones
2023-01-24 5:35 ` Andrew Jones
2023-01-24 5:35 ` Andrew Jones
2023-01-22 19:13 ` [PATCH v2 3/6] RISC-V: Add Zicboz detection and block size parsing Andrew Jones
2023-01-22 19:13 ` Andrew Jones
2023-01-22 19:13 ` [PATCH v2 4/6] RISC-V: Use Zicboz in clear_page when available Andrew Jones
2023-01-22 19:13 ` Andrew Jones
2023-01-23 11:42 ` Conor Dooley
2023-01-23 11:42 ` Conor Dooley
2023-01-22 19:13 ` [PATCH v2 5/6] RISC-V: KVM: Provide UAPI for Zicboz block size Andrew Jones
2023-01-22 19:13 ` Andrew Jones
2023-01-22 19:13 ` [PATCH v2 6/6] RISC-V: KVM: Expose Zicboz to the guest Andrew Jones
2023-01-22 19:13 ` Andrew Jones
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