From: Maxime Chevallier <maxime.chevallier@bootlin.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>,
davem@davemloft.net, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, thomas.petazzoni@bootlin.com,
Jakub Kicinski <kuba@kernel.org>,
Eric Dumazet <edumazet@google.com>,
Paolo Abeni <pabeni@redhat.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
linux-arm-kernel@lists.infradead.org,
Ioana Ciornei <ioana.ciornei@nxp.com>
Subject: Re: [PATCH net-next] net: pcs: tse: port to pcs-lynx
Date: Tue, 21 Feb 2023 08:34:12 +0100 [thread overview]
Message-ID: <20230221083412.5e11db13@pc-7.home> (raw)
In-Reply-To: <Y+ai3zHMUCDcxqxP@lunn.ch>
Hi Vlad, Andrew,
On Fri, 10 Feb 2023 21:02:39 +0100
Andrew Lunn <andrew@lunn.ch> wrote:
> On Fri, Feb 10, 2023 at 09:31:59PM +0200, Vladimir Oltean wrote:
> > On Fri, Feb 10, 2023 at 08:09:49PM +0100, Maxime Chevallier wrote:
> > > When submitting the initial driver for the Altera TSE PCS,
> > > Russell King noted that the register layout for the TSE PCS is
> > > very similar to the Lynx PCS. The main difference being that TSE
> > > PCS's register space is memory-mapped, whereas Lynx's is exposed
> > > over MDIO.
> > >
> > > Convert the TSE PCS to reuse the whole logic from Lynx, by
> > > allowing the creation of a dummy MDIO bus, and a dummy MDIO
> > > device located at address 0 on that bus. The MAC driver that uses
> > > this PCS must provide callbacks to read/write the MMIO.
> > >
> > > Also convert the Altera TSE MAC driver to this new way of using
> > > the TSE PCS.
> > >
> > > Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
> > > ---
> > > drivers/net/ethernet/altera/altera_tse.h | 2 +-
> > > drivers/net/ethernet/altera/altera_tse_main.c | 50 ++++-
> > > drivers/net/pcs/Kconfig | 4 +
> > > drivers/net/pcs/pcs-altera-tse.c | 194
> > > +++++++----------- include/linux/pcs-altera-tse.h
> > > | 22 +- 5 files changed, 142 insertions(+), 130 deletions(-)
> >
> > The glue layer is larger than the duplicated PCS code? :(
>
> I was wondering if the glue could actually be made generic. The kernel
> has a number of reasonably generic MMIO device drivers, which are just
> given an address range and assume a logical mapping.
>
> Could this be made into a generic MDIO MMIO bus driver, which just
> gets configured with a base address, and maybe a stride between
> registers?
That would be ideal, I'll spin a new series prorotyping this, indeed
that can be interesting for other devices.
Thanks for the review,
Maxime
> Andrew
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WARNING: multiple messages have this Message-ID (diff)
From: Maxime Chevallier <maxime.chevallier@bootlin.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>,
davem@davemloft.net, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, thomas.petazzoni@bootlin.com,
Jakub Kicinski <kuba@kernel.org>,
Eric Dumazet <edumazet@google.com>,
Paolo Abeni <pabeni@redhat.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
linux-arm-kernel@lists.infradead.org,
Ioana Ciornei <ioana.ciornei@nxp.com>
Subject: Re: [PATCH net-next] net: pcs: tse: port to pcs-lynx
Date: Tue, 21 Feb 2023 08:34:12 +0100 [thread overview]
Message-ID: <20230221083412.5e11db13@pc-7.home> (raw)
In-Reply-To: <Y+ai3zHMUCDcxqxP@lunn.ch>
Hi Vlad, Andrew,
On Fri, 10 Feb 2023 21:02:39 +0100
Andrew Lunn <andrew@lunn.ch> wrote:
> On Fri, Feb 10, 2023 at 09:31:59PM +0200, Vladimir Oltean wrote:
> > On Fri, Feb 10, 2023 at 08:09:49PM +0100, Maxime Chevallier wrote:
> > > When submitting the initial driver for the Altera TSE PCS,
> > > Russell King noted that the register layout for the TSE PCS is
> > > very similar to the Lynx PCS. The main difference being that TSE
> > > PCS's register space is memory-mapped, whereas Lynx's is exposed
> > > over MDIO.
> > >
> > > Convert the TSE PCS to reuse the whole logic from Lynx, by
> > > allowing the creation of a dummy MDIO bus, and a dummy MDIO
> > > device located at address 0 on that bus. The MAC driver that uses
> > > this PCS must provide callbacks to read/write the MMIO.
> > >
> > > Also convert the Altera TSE MAC driver to this new way of using
> > > the TSE PCS.
> > >
> > > Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
> > > ---
> > > drivers/net/ethernet/altera/altera_tse.h | 2 +-
> > > drivers/net/ethernet/altera/altera_tse_main.c | 50 ++++-
> > > drivers/net/pcs/Kconfig | 4 +
> > > drivers/net/pcs/pcs-altera-tse.c | 194
> > > +++++++----------- include/linux/pcs-altera-tse.h
> > > | 22 +- 5 files changed, 142 insertions(+), 130 deletions(-)
> >
> > The glue layer is larger than the duplicated PCS code? :(
>
> I was wondering if the glue could actually be made generic. The kernel
> has a number of reasonably generic MMIO device drivers, which are just
> given an address range and assume a logical mapping.
>
> Could this be made into a generic MDIO MMIO bus driver, which just
> gets configured with a base address, and maybe a stride between
> registers?
That would be ideal, I'll spin a new series prorotyping this, indeed
that can be interesting for other devices.
Thanks for the review,
Maxime
> Andrew
next prev parent reply other threads:[~2023-02-21 7:35 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-10 19:09 [PATCH net-next] net: pcs: tse: port to pcs-lynx Maxime Chevallier
2023-02-10 19:09 ` Maxime Chevallier
2023-02-10 19:31 ` Vladimir Oltean
2023-02-10 19:31 ` Vladimir Oltean
2023-02-10 20:02 ` Andrew Lunn
2023-02-10 20:02 ` Andrew Lunn
2023-02-11 21:52 ` Vladimir Oltean
2023-02-11 21:52 ` Vladimir Oltean
2023-02-11 22:23 ` Andrew Lunn
2023-02-11 22:23 ` Andrew Lunn
2023-02-21 7:34 ` Maxime Chevallier [this message]
2023-02-21 7:34 ` Maxime Chevallier
2023-02-23 17:13 ` Sean Anderson
2023-02-23 17:13 ` Sean Anderson
2023-02-11 15:32 ` Andrew Lunn
2023-02-11 15:32 ` Andrew Lunn
2023-02-11 21:45 ` Vladimir Oltean
2023-02-11 21:45 ` Vladimir Oltean
2023-02-11 6:05 ` kernel test robot
2023-02-11 6:05 ` kernel test robot
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