All of lore.kernel.org
 help / color / mirror / Atom feed
From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Cc: James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Ricardo Koller <ricarkol@google.com>,
	Simon Veith <sveith@amazon.de>,
	Reiji Watanabe <reijiw@google.com>,
	Colton Lewis <coltonlewis@google.com>,
	Joey Gouly <joey.gouly@arm.com>,
	dwmw2@infradead.org
Subject: [PATCH v4 18/20] KVM: arm64: selftests: Add physical timer registers to the sysreg list
Date: Thu, 30 Mar 2023 18:47:58 +0100	[thread overview]
Message-ID: <20230330174800.2677007-19-maz@kernel.org> (raw)
In-Reply-To: <20230330174800.2677007-1-maz@kernel.org>

Now that KVM exposes CNTPCT_EL0, CNTP_CTL_EL0 and CNT_CVAL_EL0 to
userspace, add them to the get-reg-list selftest.

Reviewed-by: Colton Lewis <coltonlewis@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 tools/testing/selftests/kvm/aarch64/get-reg-list.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/tools/testing/selftests/kvm/aarch64/get-reg-list.c b/tools/testing/selftests/kvm/aarch64/get-reg-list.c
index d287dd2cac0a..1b976b333d2c 100644
--- a/tools/testing/selftests/kvm/aarch64/get-reg-list.c
+++ b/tools/testing/selftests/kvm/aarch64/get-reg-list.c
@@ -651,7 +651,7 @@ int main(int ac, char **av)
  * The current blessed list was primed with the output of kernel version
  * v4.15 with --core-reg-fixup and then later updated with new registers.
  *
- * The blessed list is up to date with kernel version v5.13-rc3
+ * The blessed list is up to date with kernel version v6.4 (or so we hope)
  */
 static __u64 base_regs[] = {
 	KVM_REG_ARM64 | KVM_REG_SIZE_U64 | KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(regs.regs[0]),
@@ -858,6 +858,9 @@ static __u64 base_regs[] = {
 	ARM64_SYS_REG(3, 2, 0, 0, 0),	/* CSSELR_EL1 */
 	ARM64_SYS_REG(3, 3, 13, 0, 2),	/* TPIDR_EL0 */
 	ARM64_SYS_REG(3, 3, 13, 0, 3),	/* TPIDRRO_EL0 */
+	ARM64_SYS_REG(3, 3, 14, 0, 1),	/* CNTPCT_EL0 */
+	ARM64_SYS_REG(3, 3, 14, 2, 1),	/* CNTP_CTL_EL0 */
+	ARM64_SYS_REG(3, 3, 14, 2, 2),	/* CNTP_CVAL_EL0 */
 	ARM64_SYS_REG(3, 4, 3, 0, 0),	/* DACR32_EL2 */
 	ARM64_SYS_REG(3, 4, 5, 0, 1),	/* IFSR32_EL2 */
 	ARM64_SYS_REG(3, 4, 5, 3, 0),	/* FPEXC32_EL2 */
-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Cc: James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Ricardo Koller <ricarkol@google.com>,
	Simon Veith <sveith@amazon.de>,
	Reiji Watanabe <reijiw@google.com>,
	Colton Lewis <coltonlewis@google.com>,
	Joey Gouly <joey.gouly@arm.com>,
	dwmw2@infradead.org
Subject: [PATCH v4 18/20] KVM: arm64: selftests: Add physical timer registers to the sysreg list
Date: Thu, 30 Mar 2023 18:47:58 +0100	[thread overview]
Message-ID: <20230330174800.2677007-19-maz@kernel.org> (raw)
In-Reply-To: <20230330174800.2677007-1-maz@kernel.org>

Now that KVM exposes CNTPCT_EL0, CNTP_CTL_EL0 and CNT_CVAL_EL0 to
userspace, add them to the get-reg-list selftest.

Reviewed-by: Colton Lewis <coltonlewis@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 tools/testing/selftests/kvm/aarch64/get-reg-list.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/tools/testing/selftests/kvm/aarch64/get-reg-list.c b/tools/testing/selftests/kvm/aarch64/get-reg-list.c
index d287dd2cac0a..1b976b333d2c 100644
--- a/tools/testing/selftests/kvm/aarch64/get-reg-list.c
+++ b/tools/testing/selftests/kvm/aarch64/get-reg-list.c
@@ -651,7 +651,7 @@ int main(int ac, char **av)
  * The current blessed list was primed with the output of kernel version
  * v4.15 with --core-reg-fixup and then later updated with new registers.
  *
- * The blessed list is up to date with kernel version v5.13-rc3
+ * The blessed list is up to date with kernel version v6.4 (or so we hope)
  */
 static __u64 base_regs[] = {
 	KVM_REG_ARM64 | KVM_REG_SIZE_U64 | KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(regs.regs[0]),
@@ -858,6 +858,9 @@ static __u64 base_regs[] = {
 	ARM64_SYS_REG(3, 2, 0, 0, 0),	/* CSSELR_EL1 */
 	ARM64_SYS_REG(3, 3, 13, 0, 2),	/* TPIDR_EL0 */
 	ARM64_SYS_REG(3, 3, 13, 0, 3),	/* TPIDRRO_EL0 */
+	ARM64_SYS_REG(3, 3, 14, 0, 1),	/* CNTPCT_EL0 */
+	ARM64_SYS_REG(3, 3, 14, 2, 1),	/* CNTP_CTL_EL0 */
+	ARM64_SYS_REG(3, 3, 14, 2, 2),	/* CNTP_CVAL_EL0 */
 	ARM64_SYS_REG(3, 4, 3, 0, 0),	/* DACR32_EL2 */
 	ARM64_SYS_REG(3, 4, 5, 0, 1),	/* IFSR32_EL2 */
 	ARM64_SYS_REG(3, 4, 5, 3, 0),	/* FPEXC32_EL2 */
-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2023-03-30 17:56 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-30 17:47 [PATCH v4 00/20] KVM: arm64: Rework timer offsetting for fun and profit Marc Zyngier
2023-03-30 17:47 ` Marc Zyngier
2023-03-30 17:47 ` [PATCH v4 01/20] KVM: arm64: timers: Use a per-vcpu, per-timer accumulator for fractional ns Marc Zyngier
2023-03-30 17:47   ` Marc Zyngier
2023-03-30 17:47 ` [PATCH v4 02/20] arm64: Add CNTPOFF_EL2 register definition Marc Zyngier
2023-03-30 17:47   ` Marc Zyngier
2023-03-30 17:47 ` [PATCH v4 03/20] arm64: Add HAS_ECV_CNTPOFF capability Marc Zyngier
2023-03-30 17:47   ` Marc Zyngier
2023-03-30 17:47 ` [PATCH v4 04/20] KVM: arm64: timers: Use CNTPOFF_EL2 to offset the physical timer Marc Zyngier
2023-03-30 17:47   ` Marc Zyngier
2023-04-10 15:48   ` Reiji Watanabe
2023-04-10 15:48     ` Reiji Watanabe
2023-03-30 17:47 ` [PATCH v4 05/20] KVM: arm64: timers: Allow physical offset without CNTPOFF_EL2 Marc Zyngier
2023-03-30 17:47   ` Marc Zyngier
2023-04-10 15:34   ` Reiji Watanabe
2023-04-10 15:34     ` Reiji Watanabe
2023-04-13 12:47     ` Marc Zyngier
2023-04-13 12:47       ` Marc Zyngier
2023-04-17  3:34       ` Reiji Watanabe
2023-04-17  3:34         ` Reiji Watanabe
2025-07-09  8:12   ` Zenghui Yu
2025-07-19 12:04     ` Marc Zyngier
2023-03-30 17:47 ` [PATCH v4 06/20] KVM: arm64: Expose {un,}lock_all_vcpus() to the rest of KVM Marc Zyngier
2023-03-30 17:47   ` Marc Zyngier
2023-03-30 17:47 ` [PATCH v4 07/20] KVM: arm64: timers: Allow userspace to set the global counter offset Marc Zyngier
2023-03-30 17:47   ` Marc Zyngier
2023-03-30 17:47 ` [PATCH v4 08/20] KVM: arm64: timers: Allow save/restoring of the physical timer Marc Zyngier
2023-03-30 17:47   ` Marc Zyngier
2023-03-30 17:47 ` [PATCH v4 09/20] KVM: arm64: timers: Rationalise per-vcpu timer init Marc Zyngier
2023-03-30 17:47   ` Marc Zyngier
2023-03-30 17:47 ` [PATCH v4 10/20] KVM: arm64: timers: Abstract per-timer IRQ access Marc Zyngier
2023-03-30 17:47   ` Marc Zyngier
2023-03-30 17:47 ` [PATCH v4 11/20] KVM: arm64: timers: Move the timer IRQs into arch_timer_vm_data Marc Zyngier
2023-03-30 17:47   ` Marc Zyngier
2023-03-30 17:47 ` [PATCH v4 12/20] KVM: arm64: Elide kern_hyp_va() in VHE-specific parts of the hypervisor Marc Zyngier
2023-03-30 17:47   ` Marc Zyngier
2023-03-30 17:47 ` [PATCH v4 13/20] KVM: arm64: timers: Fast-track CNTPCT_EL0 trap handling Marc Zyngier
2023-03-30 17:47   ` Marc Zyngier
2023-03-30 17:47 ` [PATCH v4 14/20] KVM: arm64: timers: Abstract the number of valid timers per vcpu Marc Zyngier
2023-03-30 17:47   ` Marc Zyngier
2023-03-30 17:47 ` [PATCH v4 15/20] KVM: arm64: Document KVM_ARM_SET_CNT_OFFSETS and co Marc Zyngier
2023-03-30 17:47   ` Marc Zyngier
2023-03-30 17:47 ` [PATCH v4 16/20] KVM: arm64: nv: timers: Add a per-timer, per-vcpu offset Marc Zyngier
2023-03-30 17:47   ` Marc Zyngier
2023-03-30 17:47 ` [PATCH v4 17/20] KVM: arm64: nv: timers: Support hyp timer emulation Marc Zyngier
2023-03-30 17:47   ` Marc Zyngier
2023-03-30 17:47 ` Marc Zyngier [this message]
2023-03-30 17:47   ` [PATCH v4 18/20] KVM: arm64: selftests: Add physical timer registers to the sysreg list Marc Zyngier
2023-03-30 17:47 ` [PATCH v4 19/20] KVM: arm64: selftests: Deal with spurious timer interrupts Marc Zyngier
2023-03-30 17:47   ` Marc Zyngier
2023-03-30 17:48 ` [PATCH v4 20/20] KVM: arm64: selftests: Augment existing timer test to handle variable offset Marc Zyngier
2023-03-30 17:48   ` Marc Zyngier

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230330174800.2677007-19-maz@kernel.org \
    --to=maz@kernel.org \
    --cc=coltonlewis@google.com \
    --cc=dwmw2@infradead.org \
    --cc=james.morse@arm.com \
    --cc=joey.gouly@arm.com \
    --cc=kvm@vger.kernel.org \
    --cc=kvmarm@lists.linux.dev \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=oliver.upton@linux.dev \
    --cc=reijiw@google.com \
    --cc=ricarkol@google.com \
    --cc=suzuki.poulose@arm.com \
    --cc=sveith@amazon.de \
    --cc=yuzenghui@huawei.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.