From: Anup Patel <apatel@ventanamicro.com>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH v5 0/1] RISC-V KVM ONE_REG interface for SBI
Date: Mon, 3 Apr 2023 17:45:26 +0530 [thread overview]
Message-ID: <20230403121527.2286489-1-apatel@ventanamicro.com> (raw)
This series first does few cleanups/fixes (PATCH1 to PATCH5) and adds
ONE-REG interface for customizing the SBI interface visible to the
Guest/VM.
The testing of this series has been done with KVMTOOL changes in
riscv_sbi_imp_v1 branch at:
https://github.com/avpatel/kvmtool.git
These patches can also be found in the riscv_kvm_sbi_imp_v5 branch at:
https://github.com/avpatel/linux.git
Changes since v4:
- Rebased on Linux-6.3-rc5
- Removed redundant semi-colons after switch cases
Changes since v3:
- Added missing switch case for KVM_REG_RISCV_SBI_EXT in
kvm_riscv_vcpu_get_reg().
- Return a bit mask of disabled extensions for
GET(KVM_REG_RISCV_SBI_MULTI_DIS).
Changes since v2:
- Improve ONE_REG interface to allow enabling/disabling multiple SBI
extensions in one ioctl().
Changes since v1:
- Dropped patches 1 to 8 since these are already merged.
- Rebased on Linux-6.3-rc4
Anup Patel (1):
RISC-V: KVM: Add ONE_REG interface to enable/disable SBI extensions
arch/riscv/include/asm/kvm_vcpu_sbi.h | 8 +-
arch/riscv/include/uapi/asm/kvm.h | 32 ++++
arch/riscv/kvm/vcpu.c | 4 +
arch/riscv/kvm/vcpu_sbi.c | 247 ++++++++++++++++++++++++--
arch/riscv/kvm/vcpu_sbi_base.c | 2 +-
5 files changed, 274 insertions(+), 19 deletions(-)
--
2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <apatel@ventanamicro.com>
To: Paolo Bonzini <pbonzini@redhat.com>, Atish Patra <atishp@atishpatra.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Andrew Jones <ajones@ventanamicro.com>,
Anup Patel <anup@brainfault.org>,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH v5 0/1] RISC-V KVM ONE_REG interface for SBI
Date: Mon, 3 Apr 2023 17:45:26 +0530 [thread overview]
Message-ID: <20230403121527.2286489-1-apatel@ventanamicro.com> (raw)
This series first does few cleanups/fixes (PATCH1 to PATCH5) and adds
ONE-REG interface for customizing the SBI interface visible to the
Guest/VM.
The testing of this series has been done with KVMTOOL changes in
riscv_sbi_imp_v1 branch at:
https://github.com/avpatel/kvmtool.git
These patches can also be found in the riscv_kvm_sbi_imp_v5 branch at:
https://github.com/avpatel/linux.git
Changes since v4:
- Rebased on Linux-6.3-rc5
- Removed redundant semi-colons after switch cases
Changes since v3:
- Added missing switch case for KVM_REG_RISCV_SBI_EXT in
kvm_riscv_vcpu_get_reg().
- Return a bit mask of disabled extensions for
GET(KVM_REG_RISCV_SBI_MULTI_DIS).
Changes since v2:
- Improve ONE_REG interface to allow enabling/disabling multiple SBI
extensions in one ioctl().
Changes since v1:
- Dropped patches 1 to 8 since these are already merged.
- Rebased on Linux-6.3-rc4
Anup Patel (1):
RISC-V: KVM: Add ONE_REG interface to enable/disable SBI extensions
arch/riscv/include/asm/kvm_vcpu_sbi.h | 8 +-
arch/riscv/include/uapi/asm/kvm.h | 32 ++++
arch/riscv/kvm/vcpu.c | 4 +
arch/riscv/kvm/vcpu_sbi.c | 247 ++++++++++++++++++++++++--
arch/riscv/kvm/vcpu_sbi_base.c | 2 +-
5 files changed, 274 insertions(+), 19 deletions(-)
--
2.34.1
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linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <apatel@ventanamicro.com>
To: Paolo Bonzini <pbonzini@redhat.com>, Atish Patra <atishp@atishpatra.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Andrew Jones <ajones@ventanamicro.com>,
Anup Patel <anup@brainfault.org>,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH v5 0/1] RISC-V KVM ONE_REG interface for SBI
Date: Mon, 3 Apr 2023 17:45:26 +0530 [thread overview]
Message-ID: <20230403121527.2286489-1-apatel@ventanamicro.com> (raw)
This series first does few cleanups/fixes (PATCH1 to PATCH5) and adds
ONE-REG interface for customizing the SBI interface visible to the
Guest/VM.
The testing of this series has been done with KVMTOOL changes in
riscv_sbi_imp_v1 branch at:
https://github.com/avpatel/kvmtool.git
These patches can also be found in the riscv_kvm_sbi_imp_v5 branch at:
https://github.com/avpatel/linux.git
Changes since v4:
- Rebased on Linux-6.3-rc5
- Removed redundant semi-colons after switch cases
Changes since v3:
- Added missing switch case for KVM_REG_RISCV_SBI_EXT in
kvm_riscv_vcpu_get_reg().
- Return a bit mask of disabled extensions for
GET(KVM_REG_RISCV_SBI_MULTI_DIS).
Changes since v2:
- Improve ONE_REG interface to allow enabling/disabling multiple SBI
extensions in one ioctl().
Changes since v1:
- Dropped patches 1 to 8 since these are already merged.
- Rebased on Linux-6.3-rc4
Anup Patel (1):
RISC-V: KVM: Add ONE_REG interface to enable/disable SBI extensions
arch/riscv/include/asm/kvm_vcpu_sbi.h | 8 +-
arch/riscv/include/uapi/asm/kvm.h | 32 ++++
arch/riscv/kvm/vcpu.c | 4 +
arch/riscv/kvm/vcpu_sbi.c | 247 ++++++++++++++++++++++++--
arch/riscv/kvm/vcpu_sbi_base.c | 2 +-
5 files changed, 274 insertions(+), 19 deletions(-)
--
2.34.1
next reply other threads:[~2023-04-03 12:15 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-03 12:15 Anup Patel [this message]
2023-04-03 12:15 ` [PATCH v5 0/1] RISC-V KVM ONE_REG interface for SBI Anup Patel
2023-04-03 12:15 ` Anup Patel
2023-04-03 12:15 ` [PATCH v5 1/1] RISC-V: KVM: Add ONE_REG interface to enable/disable SBI extensions Anup Patel
2023-04-03 12:15 ` Anup Patel
2023-04-03 12:15 ` Anup Patel
2023-04-07 11:52 ` Anup Patel
2023-04-07 11:52 ` Anup Patel
2023-04-07 11:52 ` Anup Patel
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