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* [PATCH] target/riscv: fix invalid riscv,event-to-mhpmcounters entry
@ 2023-04-04 17:33 Conor Dooley
  2023-04-05  3:42 ` [PATCH] target/riscv: fix invalid riscv, event-to-mhpmcounters entry Alistair Francis
  2023-04-05  3:56 ` Alistair Francis
  0 siblings, 2 replies; 3+ messages in thread
From: Conor Dooley @ 2023-04-04 17:33 UTC (permalink / raw)
  To: Palmer Dabbelt, Alistair Francis, Bin Meng, Weiwei Li,
	Daniel Henrique Barboza, Liu Zhiwei, Atish Kumar Patra,
	qemu-riscv, qemu-devel
  Cc: conor, Conor Dooley

From: Conor Dooley <conor.dooley@microchip.com>

dt-validate complains:
> soc: pmu: {'riscv,event-to-mhpmcounters':
> [[1, 1, 524281], [2, 2, 524284], [65561, 65561, 524280],
> [65563, 65563, 524280], [65569, 65569, 524280], [0, 0, 0], [0, 0]],
> pmu: riscv,event-to-mhpmcounters:6: [0, 0] is too short

There are bogus 0 entries added at the end, of which one is of
insufficient length. This happens because only 15 of
fdt_event_ctr_map[]'s 20 elements are populated & qemu_fdt_setprop() is
called using the size of the array.
Reduce the array to 15 elements to make the error go away.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
I dunno if I am missing something intentional here, feel free to scream
if so!
---
 target/riscv/pmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/riscv/pmu.c b/target/riscv/pmu.c
index b8e56d2b7b..fa1e1484c2 100644
--- a/target/riscv/pmu.c
+++ b/target/riscv/pmu.c
@@ -35,7 +35,7 @@
  */
 void riscv_pmu_generate_fdt_node(void *fdt, int num_ctrs, char *pmu_name)
 {
-    uint32_t fdt_event_ctr_map[20] = {};
+    uint32_t fdt_event_ctr_map[15] = {};
     uint32_t cmask;
 
     /* All the programmable counters can map to any event */
-- 
2.39.2



^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] target/riscv: fix invalid riscv, event-to-mhpmcounters entry
  2023-04-04 17:33 [PATCH] target/riscv: fix invalid riscv,event-to-mhpmcounters entry Conor Dooley
@ 2023-04-05  3:42 ` Alistair Francis
  2023-04-05  3:56 ` Alistair Francis
  1 sibling, 0 replies; 3+ messages in thread
From: Alistair Francis @ 2023-04-05  3:42 UTC (permalink / raw)
  To: Conor Dooley
  Cc: Palmer Dabbelt, Alistair Francis, Bin Meng, Weiwei Li,
	Daniel Henrique Barboza, Liu Zhiwei, Atish Kumar Patra,
	qemu-riscv, qemu-devel, Conor Dooley

On Wed, Apr 5, 2023 at 3:35 AM Conor Dooley <conor@kernel.org> wrote:
>
> From: Conor Dooley <conor.dooley@microchip.com>
>
> dt-validate complains:
> > soc: pmu: {'riscv,event-to-mhpmcounters':
> > [[1, 1, 524281], [2, 2, 524284], [65561, 65561, 524280],
> > [65563, 65563, 524280], [65569, 65569, 524280], [0, 0, 0], [0, 0]],
> > pmu: riscv,event-to-mhpmcounters:6: [0, 0] is too short
>
> There are bogus 0 entries added at the end, of which one is of
> insufficient length. This happens because only 15 of
> fdt_event_ctr_map[]'s 20 elements are populated & qemu_fdt_setprop() is
> called using the size of the array.
> Reduce the array to 15 elements to make the error go away.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
> I dunno if I am missing something intentional here, feel free to scream
> if so!
> ---
>  target/riscv/pmu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/pmu.c b/target/riscv/pmu.c
> index b8e56d2b7b..fa1e1484c2 100644
> --- a/target/riscv/pmu.c
> +++ b/target/riscv/pmu.c
> @@ -35,7 +35,7 @@
>   */
>  void riscv_pmu_generate_fdt_node(void *fdt, int num_ctrs, char *pmu_name)
>  {
> -    uint32_t fdt_event_ctr_map[20] = {};
> +    uint32_t fdt_event_ctr_map[15] = {};
>      uint32_t cmask;
>
>      /* All the programmable counters can map to any event */
> --
> 2.39.2
>
>


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] target/riscv: fix invalid riscv, event-to-mhpmcounters entry
  2023-04-04 17:33 [PATCH] target/riscv: fix invalid riscv,event-to-mhpmcounters entry Conor Dooley
  2023-04-05  3:42 ` [PATCH] target/riscv: fix invalid riscv, event-to-mhpmcounters entry Alistair Francis
@ 2023-04-05  3:56 ` Alistair Francis
  1 sibling, 0 replies; 3+ messages in thread
From: Alistair Francis @ 2023-04-05  3:56 UTC (permalink / raw)
  To: Conor Dooley
  Cc: Palmer Dabbelt, Alistair Francis, Bin Meng, Weiwei Li,
	Daniel Henrique Barboza, Liu Zhiwei, Atish Kumar Patra,
	qemu-riscv, qemu-devel, Conor Dooley

On Wed, Apr 5, 2023 at 3:35 AM Conor Dooley <conor@kernel.org> wrote:
>
> From: Conor Dooley <conor.dooley@microchip.com>
>
> dt-validate complains:
> > soc: pmu: {'riscv,event-to-mhpmcounters':
> > [[1, 1, 524281], [2, 2, 524284], [65561, 65561, 524280],
> > [65563, 65563, 524280], [65569, 65569, 524280], [0, 0, 0], [0, 0]],
> > pmu: riscv,event-to-mhpmcounters:6: [0, 0] is too short
>
> There are bogus 0 entries added at the end, of which one is of
> insufficient length. This happens because only 15 of
> fdt_event_ctr_map[]'s 20 elements are populated & qemu_fdt_setprop() is
> called using the size of the array.
> Reduce the array to 15 elements to make the error go away.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

Thanks!

Applied to riscv-to-apply.next

Alistair

> ---
> I dunno if I am missing something intentional here, feel free to scream
> if so!
> ---
>  target/riscv/pmu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/pmu.c b/target/riscv/pmu.c
> index b8e56d2b7b..fa1e1484c2 100644
> --- a/target/riscv/pmu.c
> +++ b/target/riscv/pmu.c
> @@ -35,7 +35,7 @@
>   */
>  void riscv_pmu_generate_fdt_node(void *fdt, int num_ctrs, char *pmu_name)
>  {
> -    uint32_t fdt_event_ctr_map[20] = {};
> +    uint32_t fdt_event_ctr_map[15] = {};
>      uint32_t cmask;
>
>      /* All the programmable counters can map to any event */
> --
> 2.39.2
>
>


^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2023-04-05  3:57 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-04-04 17:33 [PATCH] target/riscv: fix invalid riscv,event-to-mhpmcounters entry Conor Dooley
2023-04-05  3:42 ` [PATCH] target/riscv: fix invalid riscv, event-to-mhpmcounters entry Alistair Francis
2023-04-05  3:56 ` Alistair Francis

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